JPS5587464A - Integrated circuit package - Google Patents

Integrated circuit package

Info

Publication number
JPS5587464A
JPS5587464A JP16402078A JP16402078A JPS5587464A JP S5587464 A JPS5587464 A JP S5587464A JP 16402078 A JP16402078 A JP 16402078A JP 16402078 A JP16402078 A JP 16402078A JP S5587464 A JPS5587464 A JP S5587464A
Authority
JP
Japan
Prior art keywords
terminal
input signal
pattern
package
super
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16402078A
Other languages
Japanese (ja)
Other versions
JPS5832786B2 (en
Inventor
Katsuhiko Suyama
Hirotsugu Kusakawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP53164020A priority Critical patent/JPS5832786B2/en
Publication of JPS5587464A publication Critical patent/JPS5587464A/en
Publication of JPS5832786B2 publication Critical patent/JPS5832786B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched

Landscapes

  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE: To obtain faulty action-free IC package for super-high speed operation by short-circuiting input signal terminal and end earthing terminal with the assistance of conductive pattern on the ceramic substrate.
CONSTITUTION: MoMn pattern 12 is created on the ceramic substrate 11 with copal lead terminal 13 bonded at one end. The pattern 12 and terminal 13 are plated with gold. Input signal terminal 13 and an adjacent terminal 13" are connected by means of the pattern 12. Next, IC chip 4 is installed and wire-connected as prearranged, and is sealed with a ceramic cap. After this procedure, if an input signal line is connected to the terminal 13 and terminal 13" is connected to an earthing line through terminal resistance with a connection line, an input signal pulse in the super-high speed logical circuit is absorbed by the terminal resistance. Thus faulty action due to reflection is prevented and a package of high reliability is obtained.
COPYRIGHT: (C)1980,JPO&Japio
JP53164020A 1978-12-25 1978-12-25 integrated circuit package Expired JPS5832786B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP53164020A JPS5832786B2 (en) 1978-12-25 1978-12-25 integrated circuit package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP53164020A JPS5832786B2 (en) 1978-12-25 1978-12-25 integrated circuit package

Publications (2)

Publication Number Publication Date
JPS5587464A true JPS5587464A (en) 1980-07-02
JPS5832786B2 JPS5832786B2 (en) 1983-07-15

Family

ID=15785253

Family Applications (1)

Application Number Title Priority Date Filing Date
JP53164020A Expired JPS5832786B2 (en) 1978-12-25 1978-12-25 integrated circuit package

Country Status (1)

Country Link
JP (1) JPS5832786B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6021286U (en) * 1983-07-21 1985-02-14 ブラザー工業株式会社 washing machine

Also Published As

Publication number Publication date
JPS5832786B2 (en) 1983-07-15

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