JPS5469390A - Production of semiconductor device - Google Patents

Production of semiconductor device

Info

Publication number
JPS5469390A
JPS5469390A JP13705377A JP13705377A JPS5469390A JP S5469390 A JPS5469390 A JP S5469390A JP 13705377 A JP13705377 A JP 13705377A JP 13705377 A JP13705377 A JP 13705377A JP S5469390 A JPS5469390 A JP S5469390A
Authority
JP
Japan
Prior art keywords
substrate
type
layer
reverse face
region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13705377A
Other languages
Japanese (ja)
Inventor
Teruo Iino
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP13705377A priority Critical patent/JPS5469390A/en
Publication of JPS5469390A publication Critical patent/JPS5469390A/en
Pending legal-status Critical Current

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  • Element Separation (AREA)

Abstract

PURPOSE: To improve the yield of IC generation by growing an epitaxial layer on the semiconductor substrate and forming an element group on the reverse face of this substrate.
CONSTITUTION: Oxide film 3 is caused to adhere onto N-type Si substrate 1, and a prescribed region is removed to form N+-type collector buried region 4 by diffiusion. Next, when oxide film 3' generated at this time is made remain and other film 3 is removed to grow epitaxially a Si layer including P-type impurity throughout the surface, the Si layer becomes P-type single crystal layer 5 and P-type polycrystal Si layer 6 on substrate 1 and film 3' on region 4 respectively. After that, reverse face 7 of substrate 1 is etched with fluoric nitric acid-system etching liquid, and further, the thickness of substrate 1 is made smaller by mechanical polishing. Next, P-type impurity is diffused in a prescrived region of generated reverse face 7' until it reaches layer 5, thereby forming element separation regions 8 and 8'. After that, P-type resistance regions 9 and 9' and N-type transistor regions 10 and 10' are formed on reverse face 7' by diffusion. Thus, the substrate with crystal defects reduced in used for IC.
COPYRIGHT: (C)1979,JPO&Japio
JP13705377A 1977-11-14 1977-11-14 Production of semiconductor device Pending JPS5469390A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13705377A JPS5469390A (en) 1977-11-14 1977-11-14 Production of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13705377A JPS5469390A (en) 1977-11-14 1977-11-14 Production of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5469390A true JPS5469390A (en) 1979-06-04

Family

ID=15189768

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13705377A Pending JPS5469390A (en) 1977-11-14 1977-11-14 Production of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5469390A (en)

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