JPS5577134A - Formation of fine pattern - Google Patents
Formation of fine patternInfo
- Publication number
- JPS5577134A JPS5577134A JP15178578A JP15178578A JPS5577134A JP S5577134 A JPS5577134 A JP S5577134A JP 15178578 A JP15178578 A JP 15178578A JP 15178578 A JP15178578 A JP 15178578A JP S5577134 A JPS5577134 A JP S5577134A
- Authority
- JP
- Japan
- Prior art keywords
- film
- substrate
- etching
- layer
- sio
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Element Separation (AREA)
- Weting (AREA)
Abstract
PURPOSE: To improve the integration level of IC by utilizing a pattern of Si3N4 film provided on the surface of Si substrate for a separation region with the surface of the substrate exposed to the interface with an SiO2 film covered on other portions because this section is susceptible to the etching.
CONSTITUTION: An Si3N4 film 2 is made to grow in the vapor phase on a wafer 1 comprising a p-type Si substrate 1a having an n-type epitaxial layer 1b and a photoetching is made to remove all parts of the film but the region intended to form the elements. With the film 2 as the mask, an SiO2 film 3 is arranged surrounding the film by the thermal oxidation and a etching liquid of HF series is used to reduce the thickness thereof to the half while a thin groove 4 measuring 1μ or so is formed therein depending on the susceptibility of the interface between the film 3 and 2 to etching. In this manner, the surface of the layer 1b is exposed to a frame or a loop mold so than an isolation pattern 5 is formed thereon reaching the layer 1a by diffusing a p-type impurity.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15178578A JPS5577134A (en) | 1978-12-07 | 1978-12-07 | Formation of fine pattern |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15178578A JPS5577134A (en) | 1978-12-07 | 1978-12-07 | Formation of fine pattern |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5577134A true JPS5577134A (en) | 1980-06-10 |
Family
ID=15526233
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15178578A Pending JPS5577134A (en) | 1978-12-07 | 1978-12-07 | Formation of fine pattern |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5577134A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5893343A (en) * | 1981-11-30 | 1983-06-03 | Toshiba Corp | Forming method for isolation region of semiconductor integrated circuit |
-
1978
- 1978-12-07 JP JP15178578A patent/JPS5577134A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5893343A (en) * | 1981-11-30 | 1983-06-03 | Toshiba Corp | Forming method for isolation region of semiconductor integrated circuit |
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