JPH11330308A - Ceramic circuit board and manufacture thereof - Google Patents
Ceramic circuit board and manufacture thereofInfo
- Publication number
- JPH11330308A JPH11330308A JP10130196A JP13019698A JPH11330308A JP H11330308 A JPH11330308 A JP H11330308A JP 10130196 A JP10130196 A JP 10130196A JP 13019698 A JP13019698 A JP 13019698A JP H11330308 A JPH11330308 A JP H11330308A
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- ceramic
- metal
- ceramic circuit
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
- H01L2924/3511—Warping
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明はセラミックス回路基
板に係り、特に曲げ強度特性を改善し、取付時および使
用時における割れの発生を効果的に防止できるセラミッ
クス回路基板に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a ceramic circuit board, and more particularly to a ceramic circuit board having improved bending strength characteristics and capable of effectively preventing cracking during mounting and use.
【０００２】[0002]
【従来の技術】近年、パワートランジスタモジュール用
基板やスイッチング電源モジュール用基板等の回路基板
として、セラミックス基板上に銅板等の金属板を接合し
たセラミックス回路基板が広く使用されている。また、
上記セラミックス基板としては、電気絶縁性を有すると
共に、熱伝導性に優れた窒化アルミニウム基板や窒化け
い素基板等が一般的に使用されている。2. Description of the Related Art In recent years, a ceramic circuit board in which a metal plate such as a copper plate is joined to a ceramic substrate has been widely used as a circuit substrate such as a substrate for a power transistor module or a substrate for a switching power supply module. Also,
As the ceramic substrate, an aluminum nitride substrate, a silicon nitride substrate, and the like, which have electrical insulation and excellent thermal conductivity, are generally used.
【０００３】上述したような銅板で回路を構成したセラ
ミックス回路基板１１は、例えば図２〜図４に示すよう
にセラミックス基板１２の一方の表面に金属回路板１４
としての銅板を接合する一方、他方の表面に裏金属板１
４としての銅板を接合して形成される。上記セラミック
ス基板１２表面に各種金属板を一体に形成する手法とし
ては、下記のような直接接合法，高融点金属メタライズ
法，活性金属法などが使用されている。直接接合法は、
例えばセラミックス基板１２上に銅板を、Ｃｕ−Ｃｕ2
Ｏ等の共晶液相を利用して直接接合する、いわゆる銅直
接接合法（ＤＢＣ法：Direct Bonding Copper 法）であ
り、高融点金属メタライズ法はＭｏやＷなどの高融点金
属をセラミックス基板表面に焼き付けて形成する方法で
ある。また、活性金属法は、４Ａ族元素や５Ａ族元素の
ような活性金属を含むろう材層を介してセラミックス基
板１２上に金属板を一体に接合する方法である。A ceramic circuit board 11 having a circuit formed of a copper plate as described above has a metal circuit board 14 on one surface of a ceramic substrate 12 as shown in FIGS.
While joining the copper plate as the back metal plate 1 on the other surface
4 is formed by joining copper plates. As a method of integrally forming various metal plates on the surface of the ceramic substrate 12, the following direct bonding method, refractory metal metallizing method, active metal method, and the like are used. The direct joining method is
For example, a copper plate is formed on a ceramic substrate 12 by Cu-Cu 2
This is a so-called direct bonding copper method (DBC method) in which a eutectic liquid phase such as O is used for direct bonding. In the refractory metal metallization method, a refractory metal such as Mo or W is coated on the surface of a ceramic substrate. It is a method of forming by baking. The active metal method is a method of integrally joining a metal plate on the ceramic substrate 12 via a brazing material layer containing an active metal such as a 4A group element or a 5A group element.
【０００４】また、具体的な回路の形成方法としては、
予めプレス加工やエッチング加工によりパターニングし
た銅板を用いたり、接合後にエッチング等の手法により
パターニングする等の方法が知られている。これらＤＢ
Ｃ法や活性金属ろう付け法により得られるセラミックス
回路基板は、いずれも単純構造で熱抵抗が小さく、大電
流型や高集積型の半導体チップに対応できる等の利点を
有している。Further, as a specific method of forming a circuit,
There are known methods of using a copper plate that has been patterned by press working or etching in advance, and performing patterning by a technique such as etching after bonding. These DB
Each of the ceramic circuit boards obtained by the C method or the active metal brazing method has advantages such as a simple structure, low thermal resistance, and compatibility with a large current type or highly integrated semiconductor chip.
【０００５】近年、セラミックス回路基板を使用した半
導体装置の高出力化，半導体素子の高集積化が急速に進
行し、セラミックス回路基板に繰り返して作用する熱応
力や熱負荷も増加する傾向にあり、セラミックス回路基
板に対しても上記熱応力や熱サイクルに対して十分な接
合強度と耐久性が要求されている。In recent years, the output of semiconductor devices using ceramic circuit boards and the integration of semiconductor elements have been rapidly increasing, and the thermal stress and thermal load repeatedly acting on the ceramic circuit boards have tended to increase. Ceramic circuit boards are also required to have sufficient bonding strength and durability against the above thermal stress and thermal cycle.
【０００６】[0006]
【発明が解決しようとする課題】しかしながら、従来の
セラミックス回路基板においては、セラミックス基板の
種類や金属板の接合方法を改良することにより高い接合
強度は得られていたが、耐熱サイクル性および曲げ強度
が十分に得られず、セラミックス回路基板を用いた半導
体装置の信頼性や製品歩留りが低くなるという問題点が
あった。However, in the conventional ceramic circuit board, high bonding strength has been obtained by improving the type of the ceramic substrate and the bonding method of the metal plate, but the heat cycle resistance and the bending strength have been improved. However, there has been a problem that the reliability and product yield of a semiconductor device using a ceramic circuit board are lowered.
【０００７】すなわち、セラミックス回路基板に搭載す
る半導体素子の高集積化および高出力化に対応して熱サ
イクル負荷も大幅に上昇し、熱応力によって基板に割れ
が発生して回路基板の機能が喪失されてしまう問題点が
あった。また、セラミックス回路基板の曲げ強度が小さ
くたわみ量も少ないため、組立時にセラミックス回路基
板を実装ボードにねじで締着固定しようとすると、ねじ
の僅かな締着力によってセラミックス基板が破壊してし
まう場合があり、回路基板を使用した半導体装置の製品
歩留りが低下してしまう問題点もあった。さらに、使用
時に発生する熱応力によって割れが発生する場合も多く
半導体装置の信頼性が低下する難点もあった。That is, the thermal cycle load greatly increases in response to the higher integration and higher output of the semiconductor elements mounted on the ceramic circuit board, and cracks occur in the board due to thermal stress, and the function of the circuit board is lost. There was a problem that was done. Also, since the bending strength of the ceramic circuit board is small and the amount of deflection is small, if the ceramic circuit board is screwed and fixed to the mounting board during assembly, the ceramic substrate may be broken by the slight fastening force of the screw. There is also a problem that the product yield of the semiconductor device using the circuit board is reduced. In addition, cracks often occur due to thermal stress generated during use, and the reliability of the semiconductor device is disadvantageously reduced.
【０００８】本発明は上記問題点を解決するためになさ
れたものであり、高い接合強度および優れた耐熱サイク
ル特性に加えて、高い曲げ強度（抗折強度）を有し、大
きな曲げ荷重が作用した場合においても割れや破壊を招
くことなく、大きくたわむことが可能なセラミックス回
路基板を提供することを目的とする。The present invention has been made to solve the above problems, and has high bending strength (flexural strength) in addition to high joining strength and excellent heat cycle resistance, and a large bending load is applied. It is an object of the present invention to provide a ceramic circuit board that can bend greatly without causing cracking or destruction even in the case where it is performed.
【０００９】[0009]
【課題を解決するための手段】上記目的を達成するた
め、本願発明者らは、特にセラミックス回路基板の取付
時および使用時に発生する割れを防止するための構造を
種々検討した。その結果、特にセラミックス基板に金属
回路板を一体に接合したセラミックス回路基板におい
て、金属回路板の接合面側が凹形状となるように所定の
反り量を有するように形成したときに、セラミックス回
路基板全体の曲げ強度およびたわみ量を大きくすること
ができ、割れの発生が少ないセラミックス回路基板が得
られるという知見を得た。また、ビッカース硬度（Ｈ
ｖ）が５００Ｎ／mm2 以下の金属回路板を使用すること
により、回路基板全体の曲げ強度およびたわみ量を、さ
らに向上させることができるという知見を得た。Means for Solving the Problems To achieve the above object, the present inventors have studied various structures especially for preventing cracks that occur when a ceramic circuit board is mounted and used. As a result, when the ceramic circuit board is formed so as to have a predetermined amount of warpage so that the joining surface side of the metal circuit board is concave, particularly when the metal circuit board is integrally joined to the ceramic substrate. It has been found that the bending strength and the amount of deflection of the ceramic circuit board can be increased, and a ceramic circuit board with less occurrence of cracks can be obtained. In addition, Vickers hardness (H
It has been found that the use of a metal circuit board having v) of 500 N / mm 2 or less can further improve the bending strength and the amount of deflection of the entire circuit board.
【００１０】本発明は上記知見に基づいて完成されたも
のである。すなわち、本発明に係るセラミックス回路基
板は、セラミックス基板に金属回路板を接合したセラミ
ックス回路基板において、上記セラミックス回路基板が
金属回路板側に凹形状に反っており、その反り量が１０
０μｍ以下（ゼロを含まず）であることを特徴とする。The present invention has been completed based on the above findings. That is, in the ceramic circuit board according to the present invention, in a ceramic circuit board in which a metal circuit board is bonded to a ceramic substrate, the ceramic circuit board is warped in a concave shape toward the metal circuit board, and the amount of warpage is 10%.
It is not more than 0 μm (not including zero).
【００１１】また、反り量が１０μｍ以上８０μｍ以下
であることが好ましい。さらに、金属回路板が、Ｔｉ，
Ｚｒ，Ｈｆから選択される少なくとも１種を含有する活
性金属層を介してセラミックス基板と接合されるように
構成してもよい。また、金属回路板が直接接合法により
セラミックス基板に接合されるように構成してもよい。
さらに、金属回路板のビッカース硬度（Ｈｖ）が５００
Ｎ／mm2 以下であることを特徴とする。また、セラミッ
クス回路基板に曲げ応力を付加し破断に至る際の上記セ
ラミックス回路基板の長手方向両縁部を含む平面を基準
とする金属回路板方向へのたわみ量が、セラミックス回
路基板の長辺方向の単位長さ１mm当り０．０１mm以上で
あることを特徴とする。It is preferable that the amount of warpage is 10 μm or more and 80 μm or less. Further, the metal circuit board is made of Ti,
It may be configured to be joined to the ceramic substrate via an active metal layer containing at least one selected from Zr and Hf. Further, the metal circuit board may be configured to be bonded to the ceramic substrate by a direct bonding method.
Further, the Vickers hardness (Hv) of the metal circuit board is 500
N / mm 2 or less. In addition, when a bending stress is applied to the ceramic circuit board and the ceramic circuit board is broken, the amount of deflection in the direction of the metal circuit board with respect to a plane including both longitudinal edges of the ceramic circuit board is determined in the long side direction of the ceramic circuit board. Is not less than 0.01 mm per unit length of 1 mm.
【００１２】本発明に係るセラミックス回路基板の製造
方法は、金属回路板とセラミックス基板とを接合してセ
ラミックス回路基板を形成した後に、このセラミックス
回路基板に荷重を負荷することによりセラミックス回路
基板を金属回路板側に凹形状に反らせるとともに、その
反り量を１００μｍ以下（ゼロを含まず）以下の範囲と
することを特徴とする。In a method of manufacturing a ceramic circuit board according to the present invention, a ceramic circuit board is formed by joining a metal circuit board and a ceramic substrate, and then a load is applied to the ceramic circuit board so that the ceramic circuit board is made of metal. The circuit board is warped in a concave shape toward the circuit board, and the amount of warpage is within a range of 100 μm or less (not including zero).
【００１３】また、他の態様としてのセラミックス回路
基板の製造方法は、セラミックス基板の片面にホーニン
グ加工または研磨加工を施すことにより反り量が５０〜
１５０μｍの範囲となる凹形状面を有するセラミックス
基板を形成し、この凹形状面に金属回路板を接合するこ
とによりセラミックス回路基板を形成し、このセラミッ
クス回路基板の反り量が１００μｍ以下（ゼロを含ま
ず）の範囲となるように金属回路板側に凹形状に反らせ
ることを特徴とする。In another aspect of the present invention, a method for manufacturing a ceramic circuit board is provided in which one side of the ceramic substrate is subjected to honing or polishing to reduce the warp amount to 50 to 50%.
A ceramic substrate having a concave surface in the range of 150 μm is formed, and a metal circuit board is joined to the concave surface to form a ceramic circuit substrate. The warpage of the ceramic circuit substrate is 100 μm or less (including zero). The characteristic feature is to warp the metal circuit board side in a concave shape so as to fall within the range of (z).
【００１４】本発明に係るセラミックス回路基板に使用
されるセラミックス基板としては、特に限定されるもの
ではなく、酸化アルミニウム（アルミナ：Ａｌ2 Ｏ3 ）
等の酸化物系セラミックス基板の他に、窒化アルミニウ
ム（ＡｌＮ），窒化けい素（Ｓｉ3 Ｎ4 ），窒化チタン
（ＴｉＮ）等の窒化物、炭化けい素（ＳｉＣ），炭化チ
タン（ＴｉＣ）等の炭化物、またはほう化ランタン等の
ほう化物等の非酸化物系セラミックス基板でもよい。こ
れらのセラミックス基板には酸化イットリウムなどの焼
結助剤等が含有されていてもよい。The ceramic substrate used for the ceramic circuit board according to the present invention is not particularly limited, and may be aluminum oxide (alumina: Al 2 O 3 ).
In addition to oxide-based ceramic substrates such as aluminum nitride (AlN), nitrides such as silicon nitride (Si 3 N 4 ) and titanium nitride (TiN), silicon carbide (SiC), titanium carbide (TiC), etc. Or a non-oxide ceramic substrate such as a boride such as lanthanum boride. These ceramic substrates may contain a sintering aid such as yttrium oxide.
【００１５】また上記金属回路板を構成する金属として
は、銅，アルミニウム，鉄，ニッケル，クロム，銀，モ
リブデン，コバルトの単体またはその合金など、基板成
分との共晶化合物を生成し、直接接合法や活性金属法を
適用できる金属であれば特に限定されないが、特に導電
性および価格の観点から銅，アルミニウムまたはその合
金が好ましい。As the metal constituting the metal circuit board, a eutectic compound with a substrate component such as a simple substance of copper, aluminum, iron, nickel, chromium, silver, molybdenum, or cobalt or an alloy thereof is formed, and is directly contacted. The metal is not particularly limited as long as it is a metal to which a legal method or an active metal method can be applied, but copper, aluminum or an alloy thereof is particularly preferable from the viewpoint of conductivity and cost.
【００１６】金属回路板の厚さは、通電容量等を勘案し
て決定されるが、セラミックス基板の厚さを０．２５〜
１．２mmの範囲とする一方、金属回路板の厚さを０．１
〜０．５mmの範囲に設定して両者を組み合せると熱膨張
差による変形などの影響を受けにくくなる。The thickness of the metal circuit board is determined in consideration of the current carrying capacity and the like.
While the thickness of the metal circuit board is set to 0.1 mm,
If they are set in the range of about 0.5 mm and they are combined, the influence of deformation due to a difference in thermal expansion becomes less likely.
【００１７】特に金属回路板として銅回路板を使用し直
接接合法によって接合する場合には、酸素を１００〜１
０００ｐｐｍ含有するタフピッチ電解銅から成る銅回路
板を使用し、さらに後述するように銅回路板表面に所定
厚さの酸化銅層を予め形成することにより、直接接合時
に、発生するＣｕ−Ｏ共晶の量を増加させ、基板と銅回
路板との接合強度を、より向上させることができる。In particular, when a copper circuit board is used as a metal circuit board and bonded by a direct bonding method, oxygen is supplied in an amount of 100 to 1%.
Cu-O eutectic generated at the time of direct bonding by using a copper circuit board made of tough pitch electrolytic copper containing 000 ppm and further forming a copper oxide layer of a predetermined thickness in advance on the surface of the copper circuit board as described later. And the bonding strength between the substrate and the copper circuit board can be further improved.
【００１８】上記酸化銅層などの酸化物層は、例えば金
属回路板を大気中において温度１５０〜３６０℃の範囲
にて２０〜１２０秒間加熱する表面酸化処理を実施する
ことによって形成される。ここで、酸化銅層の厚さが１
μｍ未満の場合は、Ｃｕ−Ｏ共晶の発生量が少なくなる
ため、基板と銅回路板との未接合部分が多く、接合強度
を向上させる効果は少ない。一方、酸化銅層の厚さが１
０μｍを超えるように過大にしても、接合強度の改善効
果が少なく、却って銅回路板の導電特性を阻害すること
になる。したがって、銅回路板表面に形成する酸化銅層
の厚さは１〜１０μｍの範囲が好ましい。そして同様の
理由により２〜５μｍの範囲がより望ましい。The oxide layer such as the copper oxide layer is formed, for example, by performing a surface oxidation treatment in which the metal circuit board is heated in the atmosphere at a temperature of 150 to 360 ° C. for 20 to 120 seconds. Here, the thickness of the copper oxide layer is 1
If it is less than μm, the amount of Cu—O eutectic generated is small, so that there are many unjoined portions between the substrate and the copper circuit board, and the effect of improving the joining strength is small. On the other hand, when the thickness of the copper oxide layer is 1
Even if the thickness is excessively larger than 0 μm, the effect of improving the bonding strength is small and the conductive properties of the copper circuit board are rather hindered. Therefore, the thickness of the copper oxide layer formed on the surface of the copper circuit board is preferably in the range of 1 to 10 μm. And for the same reason, the range of 2 to 5 μm is more desirable.
【００１９】なお、直接接合法はＡｌ2 Ｏ3 などの酸化
物系セラミックス基板のみについては直ちに適用可能で
あり、窒化アルミニウムや窒化けい素などの非酸化物系
セラミックス基板にそのまま適用しても基板に対する濡
れ性が低いため、金属回路板の充分な接合強度が得られ
ない。The direct bonding method can be immediately applied to only an oxide-based ceramic substrate such as Al 2 O 3 , and can be directly applied to a non-oxide-based ceramic substrate such as aluminum nitride or silicon nitride. Owing to low wettability to the metal circuit board, sufficient bonding strength of the metal circuit board cannot be obtained.
【００２０】そこでセラミックス基板として非酸化物系
セラミックスを使用する場合には、その非酸化物系セラ
ミックス基板の表面に予め酸化物層を形成し、基板に対
する濡れ性を高める必要がある。この酸化物層は上記非
酸化物系セラミックス基板を、空気中などの酸化雰囲気
中で温度１０００〜１４００℃程度で２〜１５時間加熱
して形成される。この酸化物層の厚さが０．５μｍ未満
の場合には、上記濡れ性の改善効果が少ない一方、１０
μｍを超えるように厚く形成しても改善効果が飽和する
ため、酸化物層の厚さは０．５〜１０μｍの範囲が必要
であり、より好ましくは１〜５μｍの範囲が望ましい。Therefore, when a non-oxide ceramic is used as the ceramic substrate, it is necessary to form an oxide layer on the surface of the non-oxide ceramic substrate in advance to enhance the wettability to the substrate. The oxide layer is formed by heating the non-oxide ceramic substrate in an oxidizing atmosphere such as air at a temperature of about 1000 to 1400 ° C. for 2 to 15 hours. When the thickness of the oxide layer is less than 0.5 μm, the effect of improving the wettability is small,
Since the improvement effect is saturated even if the thickness is increased to exceed μm, the oxide layer needs to have a thickness in the range of 0.5 to 10 μm, more preferably 1 to 5 μm.
【００２１】本発明に係るセラミックス回路基板におい
て、活性金属法によって金属回路板を接合する際に形成
される活性金属層は、Ｔｉ，Ｚｒ，Ｈｆから選択される
少なくとも１種の活性金属を含有し適切な組成比を有す
るＡｇ−Ｃｕ系ろう材等で構成され、このろう材組成物
を有機溶媒中に分散して調製した接合用組成物ペースト
をセラミックス基板表面にスクリーン印刷する等の方法
で形成される。In the ceramic circuit board according to the present invention, the active metal layer formed when the metal circuit board is joined by the active metal method contains at least one active metal selected from Ti, Zr and Hf. It is composed of an Ag-Cu-based brazing material having an appropriate composition ratio, and formed by a method such as screen-printing a bonding composition paste prepared by dispersing this brazing material composition in an organic solvent on the surface of a ceramic substrate. Is done.
【００２２】上記接合用組成物ペーストの具体例として
は、下記のようなものがある。すなわち重量％でＣｕを
１５〜３５％、Ｔｉ、Ｚｒ、Ｈｆから選択される少くと
も１種の活性金属を１〜１０％、残部が実質的にＡｇか
ら成る組成物を有機溶媒中に分散して調製した接合用組
成物ペーストを使用するとよい。Specific examples of the bonding composition paste include the following. That is, a composition consisting of 15 to 35% by weight of Cu, 1 to 10% of at least one active metal selected from Ti, Zr, and Hf and a balance substantially composed of Ag is dispersed in an organic solvent. It is good to use the bonding composition paste prepared in this way.
【００２３】上記活性金属はセラミックス基板に対する
ろう材の濡れ性を改善するための成分であり、特に窒化
アルミニウム（ＡｌＮ）基板に対して有効である。上記
の活性金属の配合量は、接合用組成物全体に対して１〜
１０重量％が適量である。The active metal is a component for improving the wettability of the brazing material to the ceramic substrate, and is particularly effective for an aluminum nitride (AlN) substrate. The amount of the above active metal is 1 to 1 with respect to the whole bonding composition.
10% by weight is an appropriate amount.
【００２４】また本発明に係るセラミックス回路基板は
金属回路側に凹形状に反っており、その反り量が１００
μｍ以下に調整されている。この反り量が１００μｍ以
下であれば、反りの凹面側端部を２点支持して凸面側中
央に荷重を付加して測定した３点曲げ強度を大きく向上
させることができ、たわみ量を大きく増加させることが
できる。しかし、反り量が１００μｍを超える場合に
は、反対方向にたわむ際に基板が割れ易くなり、割れを
発生することなく変形できる範囲が狭くなるため、反り
量は１００μｍ以下とされるが、特に１０μｍ以上８０
μｍ以下の範囲が好ましい。The ceramic circuit board according to the present invention is warped in a concave shape toward the metal circuit, and the warpage is 100%.
It is adjusted to be less than μm. If the amount of warpage is 100 μm or less, the three-point bending strength measured by supporting the concave end of the warp at two points and applying a load to the center of the convex side can be greatly improved, and the amount of deflection can be greatly increased. Can be done. However, when the amount of warpage exceeds 100 μm, the substrate is easily cracked when bent in the opposite direction, and the range that can be deformed without cracking is narrowed. Therefore, the amount of warpage is set to 100 μm or less. More than 80
The range of not more than μm is preferred.
【００２５】また、ビッカース硬度（Ｈｖ）が５００Ｎ
／mm2 以下の金属回路板を使用することにより、セラミ
ックス回路基板の曲げによるたわみ量を、さらに改善す
ることができる。セラミックス回路基板の曲げによるた
わみ量は、セラミックス基板自体の曲げ強度，ヤング
率，厚さに加えて、金属回路板の硬度にも大きく依存す
る。本発明では、特に金属回路板のビッカース硬度（Ｈ
ｖ）とセラミックス回路基板の曲げ強度特性との関係か
ら、上記金属回路板のビッカース硬度（Ｈｖ）が５００
Ｎ／mm2 以下であれば、セラミックス回路基板全体のた
わみ量を大きく増加させることができる。The Vickers hardness (Hv) is 500N.
By using a metal circuit board of not more than / mm 2, the amount of bending of the ceramic circuit board due to bending can be further improved. The amount of deflection of the ceramic circuit board due to bending largely depends on the hardness of the metal circuit board in addition to the bending strength, Young's modulus and thickness of the ceramic board itself. In the present invention, the Vickers hardness (H
From the relation between v) and the bending strength characteristics of the ceramic circuit board, the Vickers hardness (Hv) of the metal circuit board was 500.
If it is N / mm 2 or less, the amount of deflection of the entire ceramic circuit board can be greatly increased.
【００２６】なお、上記セラミックス回路基板の取付時
および使用時における割れや破壊を防止できるたわみ量
は回路基板の寸法の大小によって変化するが、下記の基
準を満足することが望ましい。すなわち、セラミックス
回路基板に曲げ応力を付加し破断に至る際のセラミック
ス回路基板の長手方向両縁部を含む平面を基準とする金
属回路板方向へのたわみ量が、セラミックス回路基板の
長辺方向の単位長さ１mm当り０．０１mm以上であること
が望ましい。この単位長さ１mm当りのたわみ量が０．０
１mm未満では、割れの発生を防止する効果が不十分であ
るためである。The amount of flexure that can prevent cracking and destruction during the mounting and use of the ceramic circuit board varies depending on the size of the circuit board, but it is desirable that the following criteria be satisfied. That is, the amount of deflection in the direction of the metal circuit board with respect to the plane including both longitudinal edges of the ceramic circuit board when bending stress is applied to the ceramic circuit board and the fracture occurs is determined in the long side direction of the ceramic circuit board. It is desirable that the thickness be 0.01 mm or more per 1 mm of unit length. The deflection amount per unit length of 1 mm is 0.0
If it is less than 1 mm, the effect of preventing the occurrence of cracks is insufficient.
【００２７】また、セラミックス回路基板全体に所定の
反り量を付与する方法としては、前記製造方法において
示すように、まず、金属回路板とセラミックス基板とを
接合してセラミックス回路基板を予め形成した後に、こ
のセラミックス回路基板に強制的に荷重を負荷すること
によりセラミックス回路基板を金属回路板側に凹形状に
反らせる方法、またはセラミックス基板の片面にホーニ
ング加工または研磨加工を施すことにより反り量が５０
〜１５０μｍの範囲となる凹形状面を有するセラミック
ス基板を予め形成し、この凹形状面に金属回路板を接合
することによりセラミックス回路基板を形成し、このセ
ラミックス回路基板の反り量が１００μｍ以下（ゼロを
含まず）の範囲となるように金属回路板側に凹形状に反
らせる方法になどを使用することができる。As a method for imparting a predetermined amount of warpage to the entire ceramic circuit board, as shown in the above manufacturing method, first, a metal circuit board and a ceramic substrate are joined to form a ceramic circuit board in advance. For example, a method of forcibly applying a load to the ceramic circuit board to warp the ceramic circuit board into a concave shape toward the metal circuit board, or applying a honing process or a polishing process to one surface of the ceramic circuit board to reduce the amount of warpage by 50%.
A ceramic substrate having a concave surface within a range of about 150 μm is formed in advance, and a metal circuit board is bonded to the concave surface to form a ceramic circuit substrate. The warpage of the ceramic circuit substrate is 100 μm or less (zero). And the like) can be used in a method of warping the metal circuit board side into a concave shape so as to fall within the range of (excluding).
【００２８】上記構成に係るセラミックス回路基板によ
れば、所定の反り量の範囲内において金属回路板側に反
った凹形状に形成されているため、曲げ強度が大きく、
かつ十分なたわみ特性を有するセラミックス回路基板が
得られる。また、ビッカース硬度（Ｈｖ）が５００Ｎ／
mm2 以下の金属回路板を使用することにより、上記たわ
み特性を、さらに改善することができる。そして、この
セラミックス回路基板を使用することにより、割れの発
生が少なく耐久性および信頼性に優れた半導体装置を高
い製造歩留りで量産することが可能になる。According to the ceramic circuit board having the above-described structure, since the ceramic circuit board is formed in a concave shape warped toward the metal circuit board within a predetermined warpage range, the bending strength is high,
In addition, a ceramic circuit board having sufficient bending characteristics can be obtained. Vickers hardness (Hv) is 500N /
By using a metal circuit board having a size of not more than mm 2 , the above-described bending characteristics can be further improved. By using this ceramic circuit board, it becomes possible to mass-produce a semiconductor device with less occurrence of cracks and excellent in durability and reliability with a high production yield.
【００２９】[0029]
【発明の実施の形態】次に本発明の実施形態について添
付図面を参照して以下の実施例に基づいて、より具体的
に説明する。DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, embodiments of the present invention will be described more specifically with reference to the accompanying drawings based on the following examples.
【００３０】セラミックス基板として、図２〜図３に示
す寸法を有し、３点曲げ強度が６００ＭＰａ，たわみ量
が１．６０mmである窒化けい素（Ｓｉ3 Ｎ4 ）基板と、
３点曲げ強度が３００ＭＰａ，たわみ量が０．５０mmで
ある窒化アルミニウム（ＡｌＮ）基板とを多数用意し
た。As a ceramic substrate, a silicon nitride (Si 3 N 4 ) substrate having dimensions shown in FIGS. 2 to 3 and having a three-point bending strength of 600 MPa and a deflection of 1.60 mm;
A large number of aluminum nitride (AlN) substrates having a three-point bending strength of 300 MPa and a deflection of 0.50 mm were prepared.
【００３１】一方、金属板として図３に示す形状および
厚さを有し、Ｃｕ（無酸素銅），Ｎｉ，Ａｌ，コバール
合金（２８％Ｎｉ−１８Ｃｏ−Ｆｅ）の各金属材から成
る金属板路板（厚さ０．３mm）および裏金属板（厚さ
０．２５mm）をそれぞれ調製した。なお上記金属材は窒
素ガス（Ｎ2 ）雰囲気中において温度４００℃でアニー
ル処理を実施して、そのビッカース硬度を表１に示す値
に調製されたものを使用した。On the other hand, a metal plate having the shape and thickness shown in FIG. 3 and made of each metal material of Cu (oxygen-free copper), Ni, Al, and Kovar alloy (28% Ni-18Co-Fe) A road plate (thickness 0.3 mm) and a back metal plate (thickness 0.25 mm) were prepared. The above-mentioned metal material was subjected to an annealing treatment at a temperature of 400 ° C. in a nitrogen gas (N 2 ) atmosphere, and its Vickers hardness was adjusted to a value shown in Table 1.
【００３２】一方、重量比でＴｉ粉末を３％、Ａｇ粉末
を２７％、Ｃｕ粉末を７０％含有する粉末混合体１００
重量部に対して、溶媒としてのテレピネオールにバイン
ダーとしてのエチルセルロースを溶解したバインダー溶
液を２０重量部添加して、擂回機で混合後、三段ロール
で混練してペースト状の接合用組成物を調製した。On the other hand, a powder mixture 100 containing 3% of Ti powder, 27% of Ag powder and 70% of Cu powder by weight ratio.
20 parts by weight of a binder solution obtained by dissolving ethyl cellulose as a binder in terpineol as a solvent is added to parts by weight, mixed with a mortar, and kneaded with a three-stage roll to form a paste-like bonding composition. Prepared.
【００３３】実施例１〜６および比較例１〜３ 表１に示すように窒化けい素（Ｓｉ3 Ｎ4 ）基板（実施
例１〜５および比較例１〜２）および窒化アルミニウム
（ＡｌＮ）基板（実施例６および比較例３）の両面に前
記ペースト状接合用組成物を介在させて、それぞれ金属
回路板および裏金属板を接触配置して３層構造の積層体
とし、この各積層体を加熱炉内に配置し、炉内を１．３
×１０-8ＭＰａの真空度に調整した後に温度８５０℃に
て１５分間加熱して図２〜図４に示すように、各セラミ
ックス基板１２に金属回路板１３および裏金属板１４を
一体に接合して、多数の接合体を得た。そして各接合体
についてエッチング処理を実施して所定の回路パターン
を有するセラミックス回路基板とした。 Examples 1 to 6 and Comparative Examples 1 to 3 As shown in Table 1, silicon nitride (Si 3 N 4 ) substrates (Examples 1 to 5 and Comparative Examples 1 to 2) and aluminum nitride (AlN) substrates A metal circuit board and a back metal plate are disposed in contact with each other with the paste-form bonding composition interposed on both surfaces of (Example 6 and Comparative Example 3) to form a three-layer laminate. Placed in a heating furnace, 1.3
After adjusting to a degree of vacuum of × 10 −8 MPa, heating is performed at a temperature of 850 ° C. for 15 minutes, and a metal circuit board 13 and a back metal board 14 are integrally joined to each ceramic substrate 12 as shown in FIGS. As a result, a large number of joined bodies were obtained. Then, an etching process was performed on each joined body to obtain a ceramic circuit board having a predetermined circuit pattern.
【００３４】実施例７および比較例４ 窒化アルミニウム（ＡｌＮ）基板を空気雰囲気の加熱炉
中で温度１３００℃で１２時間加熱することにより、基
板全表面を酸化し厚さ２μｍの酸化物層（Ａｌ2 Ｏ3 皮
膜）を形成した。 Example 7 and Comparative Example 4 An aluminum nitride (AlN) substrate was heated in a heating furnace in an air atmosphere at a temperature of 1300 ° C. for 12 hours to oxidize the entire surface of the substrate to form an oxide layer (Al) having a thickness of 2 μm. 2 O 3 film) was formed.
【００３５】次に酸化物層を形成した各ＡｌＮ基板の表
面側に表１に示す厚さ０．３mmのタフピッチ電解銅から
成る金属回路板としての銅回路板を接触配置する一方、
背面側に厚さ０．２５mmのタフピッチ銅から成る裏金属
板としての銅板を接触配置して積層体とし、この積層体
を窒素ガス雰囲気に調整し、温度１０７５℃に設定した
加熱炉に挿入して１分間加熱することにより、各ＡｌＮ
基板の両面に金属回路板（Ｃｕ板）または裏銅板を直接
接合法（ＤＢＣ法）によって接合した接合体をそれぞれ
調製した。さらに各接合体をエッチング処理することに
より、所定の回路パターンを有するセラミックス回路基
板とした。Next, a copper circuit board as a metal circuit board made of tough pitch electrolytic copper having a thickness of 0.3 mm as shown in Table 1 is arranged in contact with the surface side of each AlN substrate on which the oxide layer is formed.
A copper plate as a back metal plate made of tough pitch copper having a thickness of 0.25 mm was contacted and arranged on the back side to form a laminate. The laminate was adjusted to a nitrogen gas atmosphere, and inserted into a heating furnace set to a temperature of 1075 ° C. And heating for 1 minute, each AlN
Bonded bodies in which a metal circuit board (Cu board) or a back copper board was bonded to both sides of the substrate by a direct bonding method (DBC method) were prepared. Further, each of the joined bodies was subjected to an etching process to obtain a ceramic circuit board having a predetermined circuit pattern.
【００３６】こうして調製した実施例１〜７および比較
例１〜４のセラミックス回路基板のエッチング処理後に
おける反り量を測定したところ、全て金属回路板１３側
に凸になるような形状であった。そこで比較例１を除く
各実施例１〜７および比較例２〜４に係るセラミックス
回路基板について、反り方向が反対になるように強制荷
重を付加し、図１に示すように表側（金属回路板側）が
凹形状になるように変形させ、かつ反り量が表１に示す
値となるように調整した。なお、上記反り量は金属回路
板側が凹面となる場合は正（＋）の値である一方、凸面
となる場合は負（−）の値となる。When the amount of warpage of the thus-prepared ceramic circuit boards of Examples 1 to 7 and Comparative Examples 1 to 4 after the etching treatment was measured, all the shapes were convex toward the metal circuit board 13 side. Therefore, a forced load was applied to the ceramic circuit boards according to Examples 1 to 7 and Comparative Examples 2 to 4 except for Comparative Example 1 so that the warping directions were opposite to each other, and as shown in FIG. Side) was deformed so as to have a concave shape, and the amount of warpage was adjusted to the value shown in Table 1. The amount of warpage is a positive (+) value when the metal circuit board side has a concave surface, and a negative (-) value when the metal circuit board side has a convex surface.
【００３７】こうして反り量を調整したセラミックス回
路基板１は、図１に模式的に示すように湾曲したセラミ
ックス基板２の凹面側に金属回路板３が一体に接合され
る一方、背面側（凸面側）に裏金属板４が一体に接合し
た構造を有する。そして、セラミックス基板２の両縁部
を含む平面からセラミックス基板２の中央部までの間隙
Ｄが反り量に相当する。In the ceramic circuit board 1 whose warpage has been adjusted in this manner, the metal circuit board 3 is integrally joined to the concave side of the curved ceramic substrate 2 as schematically shown in FIG. ) Has a structure in which the back metal plate 4 is integrally joined. The gap D from the plane including both edges of the ceramic substrate 2 to the center of the ceramic substrate 2 corresponds to the amount of warpage.
【００３８】上記のように反り量（Ｄ）を調整した各実
施例および比較例に係るセラミックス回路基板につい
て、凹面側の両端部を２点で支持する一方、背面側（凸
側）の中央部の１点に荷重を付加して３点曲げ強度を測
定するとともにセラミックス基板の両縁部を含む平面に
対する最大たわみ量を測定して下記表１に示す結果を得
た。With respect to the ceramic circuit boards according to Examples and Comparative Examples in which the amount of warpage (D) was adjusted as described above, both ends on the concave side were supported at two points, while the center on the rear side (convex side). The load was applied to one of the points to measure the three-point bending strength, and at the same time, the maximum deflection amount of the ceramic substrate with respect to the plane including both edges was measured, and the results shown in Table 1 below were obtained.
【００３９】[0039]
【表１】 [Table 1]
【００４０】上記表１に示す結果から明らかなように、
金属回路板側に所定の反り量をもって凹形状に形成する
とともに、ビッカース硬度（Ｈｖ）が５００Ｎ／mm2 以
下の金属回路板を使用した各実施例に係るセラミックス
回路基板においては、セラミックス基板の母材強度とほ
ぼ同等か、若干低下した程度の高い曲げ強度を有してお
り、特に最大たわみ量が、従来構造のものと比較して大
幅に増加しており、割れの発生量が極めて低くなる効果
が得られている。As is clear from the results shown in Table 1 above,
In the ceramic circuit board according to each embodiment using a metal circuit board having a Vickers hardness (Hv) of 500 N / mm 2 or less while forming a concave shape with a predetermined amount of warpage on the metal circuit board side, Has a high bending strength that is almost the same as or slightly lower than the material strength, especially the maximum deflection is greatly increased compared to the conventional structure, and the amount of cracking is extremely low The effect has been obtained.
【００４１】一方、本願発明で規定する方向とは逆の方
向に反った比較例１に係るセラミックス回路基板や高硬
度の金属回路板を使用した比較例２〜４に係るセラミッ
クス回路基板では、曲げ強度およびたわみ量がいずれも
セラミックス基板の母材よりもかなり劣化することが再
確認できた。On the other hand, the ceramic circuit boards according to Comparative Example 1 and the ceramic circuit boards according to Comparative Examples 2 to 4 using a high-hardness metal circuit board warped in a direction opposite to the direction defined in the present invention, and were bent. It was again confirmed that both the strength and the amount of deflection were considerably deteriorated compared to the base material of the ceramic substrate.
【００４２】次に予め湾曲させて所定量の反りを付与し
たセラミックス基板に金属回路板を一体に接合した場合
について、以下の実施例を参照して説明する。Next, a case where a metal circuit board is integrally joined to a ceramic substrate which has been previously curved and imparted a predetermined amount of warp will be described with reference to the following embodiments.
【００４３】実施例８〜１１および比較例５〜７ 前記実施例１〜７において用意したＳｉ3 Ｎ4 基板およ
びＡｌＮ基板で反り直し処理を実施して平坦化した各セ
ラミックス基板について、表１に示すように、セラミッ
クス基板の片面のみをホーニング加工（実施例８，１
０）または研磨加工（実施例９，１１）する一方、両面
とも研磨加工（比較例７）して、所定の反りを形成し
た、それぞれのセラミックス基板を形成した。一方、反
り直し処理を実施せず、また両面ともに加工処理を実施
しないセラミックス基板も比較例５，６として用意し
た。各セラミックス基板の反り量を測定して表２に示す
結果を得た。 Examples 8 to 11 and Comparative Examples 5 to 7 Table 1 shows the ceramic substrates which were flattened by performing the warping process on the Si 3 N 4 substrate and the AlN substrate prepared in the above Examples 1 to 7. As shown, only one side of the ceramic substrate was honed (Examples 8 and 1).
0) or polishing (Examples 9 and 11), while both sides were polished (Comparative Example 7) to form respective ceramic substrates having predetermined warpage. On the other hand, ceramic substrates which were not subjected to the re-warping treatment and were not subjected to the processing treatment on both surfaces were prepared as Comparative Examples 5 and 6. The amount of warpage of each ceramic substrate was measured, and the results shown in Table 2 were obtained.
【００４４】こうして調製した各セラミックス基板両面
に、前記活性金属法により金属回路板（Ｃｕ板）および
裏金属板（Ｃｕ板）を一体に接合した。すなわち、各セ
ラミックス基板の両面に実施例１〜６で使用した、活性
金属を含有するペースト状接合用組成物（Ａｇ−Ｃｕ−
Ｔｉ系ろう材）を塗布した後に、各セラミックス基板の
凹面側表面に金属回路板としてのＣｕ板（厚さ０．３m
m）を接触配置する一方、凸面側表面に裏金属板として
のＣｕ板（厚さ０．２５mm）を接触配置した状態で実施
例１と同一の加熱条件で接合処理を実施することによ
り、セラミックス基板に金属回路板と裏金属板とを一体
に接合した接合体を製造した。さらに、各接合体をエッ
チング処理することにより、所定の回路パターンを有す
る実施例８〜１１および比較例５〜７に係るセラミック
ス回路基板をそれぞれ調製した。A metal circuit board (Cu plate) and a back metal plate (Cu plate) were integrally joined to both surfaces of each of the thus prepared ceramic substrates by the active metal method. That is, the active metal-containing paste bonding composition (Ag-Cu-) used in Examples 1 to 6 was used on both surfaces of each ceramic substrate.
After applying a Ti-based brazing material, a Cu plate (0.3 m thick) as a metal circuit board is formed on the concave side surface of each ceramic substrate.
m) in contact with a Cu plate (thickness: 0.25 mm) as a back metal plate on the convex side surface, and performing a bonding process under the same heating conditions as in Example 1 to obtain a ceramic. A joined body in which a metal circuit board and a back metal plate were integrally joined to a substrate was manufactured. Furthermore, the ceramic circuit boards according to Examples 8 to 11 and Comparative Examples 5 to 7 having a predetermined circuit pattern were prepared by subjecting each joined body to an etching treatment.
【００４５】上記エッチング処理後における各セラミッ
クス回路基板の反り量を測定して表２に示す結果を得
た。表２に示す加工後（エッチング処理前）の反り量と
エッチング処理後の反り量との比較から明らかなよう
に、エッチング処理前においては実施例および比較例の
接合体の反り量が全て金属回路板側が凹形状となるよう
に形成されているが、この段階で反り量が５０μｍ未満
である各比較例の接合体は、エッチング処理すると、本
願発明で規定する方向とは逆の方向に反りを生じてしま
うことが判明する。The amount of warpage of each ceramic circuit board after the above etching treatment was measured, and the results shown in Table 2 were obtained. As is clear from the comparison between the amount of warpage after processing (before the etching process) and the amount of warpage after the etching process shown in Table 2, before the etching process, the warpage amounts of the joined bodies of the examples and the comparative examples are all equal to those of the metal circuit. Although the plate side is formed so as to have a concave shape, the bonded body of each comparative example in which the amount of warpage is less than 50 μm at this stage, warps in a direction opposite to the direction defined by the present invention when etched. It turns out that it will happen.
【００４６】次に、上記のようにエッチング処理して形
成した各セラミックス回路基板について、実施例１と同
様にして３点曲げ強度および最大たわみ量を測定して下
記表２に示す結果を得た。Next, the three-point bending strength and the maximum flexure of each of the ceramic circuit boards formed by the etching treatment as described above were measured in the same manner as in Example 1, and the results shown in Table 2 below were obtained. .
【００４７】[0047]
【表２】 [Table 2]
【００４８】上記表２示す結果から明らかなように、金
属回路板側に所定の反り量をもって凹形状に形成された
各実施例に係るセラミックス回路基板においては、逆方
向に反った形状を有する各比較例に係るセラミックス回
路基板と比較して、曲げ強度が大きく、破壊に至るまで
の最大たわみ量が大きく、割れに対して優れた耐性が発
揮されることが判明した。As is clear from the results shown in Table 2, in the ceramic circuit board according to each of the embodiments, which is formed in a concave shape with a predetermined amount of warp on the metal circuit board side, each of the ceramic circuit boards having a shape warped in the opposite direction is formed. Compared with the ceramic circuit board according to the comparative example, it was found that the flexural strength was large, the maximum amount of deflection before breaking was large, and excellent resistance to cracking was exhibited.
【００４９】また各実施例および比較例に係るセラミッ
クス回路基板の耐久性および信頼性を評価するために、
各回路基板を−４０℃で３０分間保持し、次に室温（Ｒ
Ｔ：２５℃）で１０分間保持し、さらに１２５℃で３０
分間保持し、さらに室温で１０分間保持するという加熱
−冷却する操作を１サイクルとするヒートサイクル試験
（熱衝撃試験）を繰り返して実施した。その結果を表
１，２に健全率η（％）として併記した。ここで健全率
ηとは、ファインクラックが発生し得る基板上の金属回
路板の周辺長の合計をＬｏ，ヒートサイクル試験により
実際に発生したファインクラックの長さの合計をＬとし
た際に、In order to evaluate the durability and reliability of the ceramic circuit boards according to the examples and comparative examples,
Each circuit board is kept at -40 ° C for 30 minutes, then at room temperature (R
T: 25 ° C) for 10 minutes, and further at 125 ° C for 30 minutes.
The heat cycle test (thermal shock test) was repeated, in which the heating / cooling operation of holding for 10 minutes and holding at room temperature for 10 minutes was one cycle. The results are also shown in Tables 1 and 2 as the soundness factor η (%). Here, the soundness factor η is defined as Lo when the sum of the peripheral lengths of the metal circuit boards on the substrate where the fine crack can occur is L and the sum of the lengths of the fine cracks actually generated by the heat cycle test is L.
【数１】 で表わされる。すなわち、健全率ηが１００％ではファ
インクラックは全く発生しておらず、ηが１００％より
小さくなるに従ってファインクラックが増加することを
示す指数である。(Equation 1) Is represented by That is, when the soundness factor η is 100%, no fine crack occurs at all, and the index indicates that the fine crack increases as η becomes smaller than 100%.
【００５０】表１，２に示す結果から、同一材料のセラ
ミックス回路基板同士を比較すると、明らかに実施例は
比較例よりファインクラックの発生量が少ないことを示
している。From the results shown in Tables 1 and 2, when the ceramic circuit boards made of the same material are compared with each other, it is clear that the example has a smaller amount of fine cracks than the comparative example.
【００５１】このように、回路基板の反り量が１００μ
ｍ以下であり、かつ金属回路板側に凹形状に形成した各
実施例に係るセラミックス回路基板においては、セラミ
ックス基板と金属回路板等との接合端の角部における集
中残留応力が小さくなり、耐熱サイクル特性が大幅に向
上することが判明した。As described above, the warpage of the circuit board is 100 μm.
m or less, and in the ceramic circuit board according to each embodiment formed in a concave shape on the side of the metal circuit board, the concentrated residual stress at the corner of the joint end between the ceramic substrate and the metal circuit board becomes small, and the heat resistance is reduced. It was found that the cycle characteristics were significantly improved.
【００５２】[0052]
【発明の効果】以上説明の通り、本発明に係るセラミッ
クス回路基板によれば、所定の反り量の範囲内において
金属回路板側に反った凹形状に形成されているため、曲
げ強度が大きく、かつ十分なたわみ特性を有するセラミ
ックス回路基板が得られる。また、ビッカース硬度（Ｈ
ｖ）が５００Ｎ／mm2 以下の金属回路板を使用すること
により、上記たわみ特性を、さらに改善することができ
る。そして、このセラミックス回路基板を使用すること
により、割れの発生が少なく耐久性および信頼性に優れ
た半導体装置を高い製造歩留りで量産することが可能に
なる。As described above, according to the ceramic circuit board according to the present invention, since it is formed in a concave shape warped toward the metal circuit board within a predetermined warpage range, the bending strength is large. In addition, a ceramic circuit board having sufficient bending characteristics can be obtained. In addition, Vickers hardness (H
By using a metal circuit board whose v) is 500 N / mm 2 or less, the above-mentioned bending characteristics can be further improved. By using this ceramic circuit board, it becomes possible to mass-produce a semiconductor device with less occurrence of cracks and excellent in durability and reliability with a high production yield.
【図１】本発明に係るセラミックス回路基板の一実施例
を模式的に示す断面図。FIG. 1 is a cross-sectional view schematically showing one embodiment of a ceramic circuit board according to the present invention.
【図２】セラミックス回路基板の平面図。FIG. 2 is a plan view of a ceramic circuit board.
【図３】図２に示すセラミックス回路基板の断面図。FIG. 3 is a sectional view of the ceramic circuit board shown in FIG. 2;
【図４】図２に示すセラミックス回路基板の底面図。FIG. 4 is a bottom view of the ceramic circuit board shown in FIG. 2;
１，１１ セラミックス回路基板 ２，１２ セラミックス基板 ３，１３ 金属回路板（銅回路板） ４，１４ 裏金属板（裏銅板） Ｄ 反り量 1,11 ceramic circuit board 2,12 ceramic board 3,13 metal circuit board (copper circuit board) 4,14 back metal plate (back copper plate) D warp amount
Claims (8)
たセラミックス回路基板において、上記セラミックス回
路基板が金属回路板側に凹形状に反っており、その反り
量が１００μｍ以下（ゼロを含まず）であることを特徴
とするセラミックス回路基板。1. A ceramic circuit board in which a metal circuit board is joined to a ceramic substrate, wherein the ceramic circuit board is warped in a concave shape toward the metal circuit board, and the warpage is 100 μm or less (not including zero). A ceramic circuit board, characterized in that:
ることを特徴とする請求項１記載のセラミックス回路基
板。2. The ceramic circuit board according to claim 1, wherein the amount of warpage is 10 μm or more and 80 μm or less.
択される少なくとも１種を含有する活性金属層を介して
セラミックス基板と接合されていることを特徴とする請
求項１記載のセラミックス回路基板。3. The ceramic circuit according to claim 1, wherein the metal circuit board is joined to the ceramic substrate via an active metal layer containing at least one selected from Ti, Zr and Hf. substrate.
クス基板に接合されていることを特徴とする請求項１記
載のセラミックス回路基板。4. The ceramic circuit board according to claim 1, wherein the metal circuit board is joined to the ceramic substrate by a direct joining method.
５００Ｎ／mm2 以下であることを特徴とする請求項１記
載のセラミックス回路基板。5. The ceramic circuit board according to claim 1, wherein the Vickers hardness (Hv) of the metal circuit board is 500 N / mm 2 or less.
し破断に至る際の上記セラミックス回路基板の長手方向
両縁部を含む平面を基準とする金属回路板方向へのたわ
み量が、セラミックス回路基板の長辺方向の単位長さ１
mm当り０．０１mm以上であることを特徴とする請求項１
記載のセラミックス回路基板。6. The amount of deflection of a ceramic circuit board in the direction of a metal circuit board with respect to a plane including both longitudinal edges of the ceramic circuit board when a bending stress is applied to the ceramic circuit board and the fracture occurs. Unit length 1 in the long side direction
2. The method according to claim 1, wherein the distance is 0.01 mm or more per mm.
The ceramic circuit board as described.
してセラミックス回路基板を形成した後に、このセラミ
ックス回路基板に荷重を負荷することによりセラミック
ス回路基板を金属回路板側に凹形状に反らせるととも
に、その反り量を１００μｍ以下（ゼロを含まず）以下
の範囲とすることを特徴とするセラミックス回路基板の
製造方法。7. After joining a metal circuit board and a ceramic substrate to form a ceramic circuit board, a load is applied to the ceramic circuit board to cause the ceramic circuit board to warp in a concave shape toward the metal circuit board. A method for manufacturing a ceramic circuit board, wherein the amount of warpage is within a range of 100 μm or less (not including zero).
工または研磨加工を施すことにより反り量が５０〜１５
０μｍの範囲となる凹形状面を有するセラミックス基板
を形成し、この凹形状面に金属回路板を接合することに
よりセラミックス回路基板を形成し、このセラミックス
回路基板の反り量が１００μｍ以下（ゼロを含まず）の
範囲となるように金属回路板側に凹形状に反らせること
を特徴とするセラミックス回路基板の製造方法。8. A warp amount of 50 to 15 by performing honing or polishing on one surface of the ceramic substrate.
A ceramic substrate having a concave surface within a range of 0 μm is formed, and a metal circuit board is joined to the concave surface to form a ceramic circuit substrate. The warpage of the ceramic circuit substrate is 100 μm or less (including zero). A method for manufacturing a ceramic circuit board, comprising: warping a metal circuit board side in a concave shape so as to fall within the range of (c).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13019698A JP3949270B2 (en) | 1998-05-13 | 1998-05-13 | Manufacturing method of ceramic circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13019698A JP3949270B2 (en) | 1998-05-13 | 1998-05-13 | Manufacturing method of ceramic circuit board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH11330308A true JPH11330308A (en) | 1999-11-30 |
| JP3949270B2 JP3949270B2 (en) | 2007-07-25 |
Family
ID=15028393
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13019698A Expired - Fee Related JP3949270B2 (en) | 1998-05-13 | 1998-05-13 | Manufacturing method of ceramic circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3949270B2 (en) |
Cited By (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002252433A (en) * | 2001-02-23 | 2002-09-06 | Dowa Mining Co Ltd | Ceramic circuit board and its manufacturing method |
| JP2003197824A (en) * | 2001-12-25 | 2003-07-11 | Toshiba Corp | Ceramic circuit board |
| EP1345480A2 (en) | 2002-03-15 | 2003-09-17 | Dowa Mining Co., Ltd. | Ceramic circuit board and power module |
| JP2007036263A (en) * | 2001-03-01 | 2007-02-08 | Dowa Holdings Co Ltd | Insulating substrate board for semiconductor and power module |
| JP2007116111A (en) * | 2006-09-15 | 2007-05-10 | Toshiba Corp | Method of manufacturing ceramic circuit substrate |
| US7387945B2 (en) | 2004-05-11 | 2008-06-17 | Seiko Epson Corporation | Semiconductor chip, semiconductor device and electronic equipment including warpage control film, and manufacturing method of same |
| JP2010183585A (en) * | 2010-02-26 | 2010-08-19 | Ricoh Co Ltd | Semiconductor device, image reader and image forming apparatus |
| JP2010267997A (en) * | 2010-08-04 | 2010-11-25 | Dowa Holdings Co Ltd | Ceramics circuit substrate and power module |
| WO2016125635A1 (en) * | 2015-02-02 | 2016-08-11 | 株式会社東芝 | Silicon nitride circuit substrate and electronic component module using same |
| CN106486426A (en) * | 2015-08-26 | 2017-03-08 | 比亚迪股份有限公司 | Metal-ceramic plate for welding chip and the thereon method of welding chip |
| JPWO2016021645A1 (en) * | 2014-08-06 | 2017-05-25 | デンカ株式会社 | Heat dissipation component and manufacturing method thereof |
| US11094648B2 (en) | 2017-08-04 | 2021-08-17 | Denka Company Limited | Power module |
| CN114026967A (en) * | 2019-05-17 | 2022-02-08 | 阿莫善斯有限公司 | Method for manufacturing ceramic substrate |
| WO2023033116A1 (en) * | 2021-09-01 | 2023-03-09 | 住友ベークライト株式会社 | Laminate plate, circuit board, and method for manufacturing laminate plate |
-
1998
- 1998-05-13 JP JP13019698A patent/JP3949270B2/en not_active Expired - Fee Related
Cited By (22)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002252433A (en) * | 2001-02-23 | 2002-09-06 | Dowa Mining Co Ltd | Ceramic circuit board and its manufacturing method |
| JP2007036263A (en) * | 2001-03-01 | 2007-02-08 | Dowa Holdings Co Ltd | Insulating substrate board for semiconductor and power module |
| JP2003197824A (en) * | 2001-12-25 | 2003-07-11 | Toshiba Corp | Ceramic circuit board |
| JP4692708B2 (en) * | 2002-03-15 | 2011-06-01 | Ｄｏｗａメタルテック株式会社 | Ceramic circuit board and power module |
| EP1345480A3 (en) * | 2002-03-15 | 2005-06-01 | Dowa Mining Co., Ltd. | Ceramic circuit board and power module |
| JP2003273289A (en) * | 2002-03-15 | 2003-09-26 | Dowa Mining Co Ltd | Ceramic circuit board and power module |
| EP1345480A2 (en) | 2002-03-15 | 2003-09-17 | Dowa Mining Co., Ltd. | Ceramic circuit board and power module |
| US7387945B2 (en) | 2004-05-11 | 2008-06-17 | Seiko Epson Corporation | Semiconductor chip, semiconductor device and electronic equipment including warpage control film, and manufacturing method of same |
| JP2007116111A (en) * | 2006-09-15 | 2007-05-10 | Toshiba Corp | Method of manufacturing ceramic circuit substrate |
| JP2010183585A (en) * | 2010-02-26 | 2010-08-19 | Ricoh Co Ltd | Semiconductor device, image reader and image forming apparatus |
| JP2010267997A (en) * | 2010-08-04 | 2010-11-25 | Dowa Holdings Co Ltd | Ceramics circuit substrate and power module |
| US11682604B2 (en) | 2014-08-06 | 2023-06-20 | Denka Company Limited | Heat dissipation component and method for manufacturing same |
| US10636723B2 (en) | 2014-08-06 | 2020-04-28 | Denka Company Limited | Heat dissipation component and method for manufacturing same |
| JPWO2016021645A1 (en) * | 2014-08-06 | 2017-05-25 | デンカ株式会社 | Heat dissipation component and manufacturing method thereof |
| US10366938B2 (en) | 2015-02-02 | 2019-07-30 | Kabushiki Kaisha Toshiba | Silicon nitride circuit board and electronic component module using the same |
| US10109555B2 (en) | 2015-02-02 | 2018-10-23 | Kabushiki Kaisha Toshiba | Silicon nitride circuit board and electronic component module using the same |
| JPWO2016125635A1 (en) * | 2015-02-02 | 2017-11-09 | 株式会社東芝 | Silicon nitride circuit board and electronic component module using the same |
| WO2016125635A1 (en) * | 2015-02-02 | 2016-08-11 | 株式会社東芝 | Silicon nitride circuit substrate and electronic component module using same |
| CN106486426A (en) * | 2015-08-26 | 2017-03-08 | 比亚迪股份有限公司 | Metal-ceramic plate for welding chip and the thereon method of welding chip |
| US11094648B2 (en) | 2017-08-04 | 2021-08-17 | Denka Company Limited | Power module |
| CN114026967A (en) * | 2019-05-17 | 2022-02-08 | 阿莫善斯有限公司 | Method for manufacturing ceramic substrate |
| WO2023033116A1 (en) * | 2021-09-01 | 2023-03-09 | 住友ベークライト株式会社 | Laminate plate, circuit board, and method for manufacturing laminate plate |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3949270B2 (en) | 2007-07-25 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US5672848A (en) | Ceramic circuit board | |
| JP4168114B2 (en) | Metal-ceramic joint | |
| JP4649027B2 (en) | Ceramic circuit board | |
| EP1039539B1 (en) | Method for producing a ceramic circuit board | |
| JP3845925B2 (en) | Semiconductor device member using aluminum nitride substrate and method for manufacturing the same | |
| JP3949270B2 (en) | Manufacturing method of ceramic circuit board | |
| JP2000323618A (en) | Copper circuit clad substrate and manufacture thereof | |
| US6197435B1 (en) | Substrate | |
| JP3847954B2 (en) | Manufacturing method of ceramic circuit board | |
| JP4467659B2 (en) | Ceramic circuit board | |
| JPH09162325A (en) | Nitride silicon circuit board and its manufacturing method | |
| JP3863067B2 (en) | Method for producing metal-ceramic bonded body | |
| JPH08102570A (en) | Ceramic circuit board | |
| JP4557398B2 (en) | Electronic element | |
| JP3833410B2 (en) | Ceramic circuit board | |
| JPH10247763A (en) | Circuit board and manufacture thereof | |
| JP3192911B2 (en) | Ceramic circuit board | |
| JP4476428B2 (en) | Aluminum nitride circuit board and manufacturing method thereof | |
| JP2003192462A (en) | Silicon nitride circuit board and method of producing the same | |
| JPH10167804A (en) | Ceramic substrate, circuit board using same and its production | |
| JPH0477369A (en) | Production of metal-ceramic laminated substrate | |
| JP2006199584A (en) | Method for producing ceramic circuit board | |
| JP2000349098A (en) | Bonded body of ceramic substrate and semiconductor device, and its manufacture | |
| JP2000031609A (en) | Circuit board | |
| JPH07115252A (en) | Circuit board |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20050421 |
|
| A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20070118 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20070123 |
|
| A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20070314 |
|
| TRDD | Decision of grant or rejection written | ||
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20070410 |
|
| A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20070418 |
|
| A711 | Notification of change in applicant |
Free format text: JAPANESE INTERMEDIATE CODE: A711 Effective date: 20070808 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20100427 Year of fee payment: 3 |
|
| S111 | Request for change of ownership or part of ownership |
Free format text: JAPANESE INTERMEDIATE CODE: R313111 Free format text: JAPANESE INTERMEDIATE CODE: R313114 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20100427 Year of fee payment: 3 |
|
| R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
| A072 | Dismissal of procedure |
Free format text: JAPANESE INTERMEDIATE CODE: A072 Effective date: 20071204 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20100427 Year of fee payment: 3 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20110427 Year of fee payment: 4 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20130427 Year of fee payment: 6 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20140427 Year of fee payment: 7 |
|
| LAPS | Cancellation because of no payment of annual fees |