JPH0546978B2 - - Google Patents

Info

Publication number
JPH0546978B2
JPH0546978B2 JP61275912A JP27591286A JPH0546978B2 JP H0546978 B2 JPH0546978 B2 JP H0546978B2 JP 61275912 A JP61275912 A JP 61275912A JP 27591286 A JP27591286 A JP 27591286A JP H0546978 B2 JPH0546978 B2 JP H0546978B2
Authority
JP
Japan
Prior art keywords
aluminum
pad
electrode
film
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP61275912A
Other languages
English (en)
Other versions
JPS63128634A (ja
Inventor
Eiji Hagimoto
Seiichi Nishino
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP61275912A priority Critical patent/JPS63128634A/ja
Publication of JPS63128634A publication Critical patent/JPS63128634A/ja
Publication of JPH0546978B2 publication Critical patent/JPH0546978B2/ja
Granted legal-status Critical Current

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Classifications

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    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
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    • H01L2224/0212—Auxiliary members for bonding areas, e.g. spacers
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  • Wire Bonding (AREA)

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体装置の製造方法、特に半導体基
板上面のアルミニウム電極表面を完全に保護した
構造の半導体装置を製造する方法に関する。
〔従来の技術〕
一般に半導体チツプの表面はシリコンの酸化膜
や窒化膜等によつて覆われ、外部からの汚れ、水
分の浸入を防いでいる。しかし、半導体チツプを
外部回路と接続するために設けた電極部分（以下
パツド部分と称する。）は電気的導通のため露出
している。通常はアルミニウムで構成されている
前記パツド部分は水分等によつて腐食されること
があり、半導体装置の信頼性上問題となつてい
た。
〔発明が解決しようとする問題点〕 そこで、耐食性に乏しいパツド部分、例えば、
アルミニウムパツド部分を保護すべく、ワイヤボ
ンデイング後に化成処理によりアルミニウムパツ
ド表面に耐食性の無孔性アルミナを形成する方法
や、CVD法やスパツタリング法等によつて電気
絶縁性の金属酸化膜で覆う方法が知られている。
しかし、化成処理は陽極酸化処理で湿式処理であ
るため半導体装置の諸特性の経時変化を促し、そ
の信頼性を低下させる欠点があつた。また、チツ
プマウント、ボンデイング後に水分にさらす処理
はチツプマウント材や、パツケージ部材からのイ
オン性不純物溶出を促してチツプに好ましくな
い。CVD法やスパツタリング法では処理温度が
高温過ぎて半導体装置の組立に使用する樹脂や低
融点ろう材の融点を越えるので使用できないか、
あるいは半導体装置の諸特性を劣化させてしま
う。
〔問題点を解決するための手段〕
上記問題点を解決する為に本発明では、金属細
線によつて結線後に、水蒸気により半導体チツプ
上の電極表面に水和酸化物を形成するのである。
〔実施例〕
以下本発明を実施例を用いて説明する。
第１図は本発明の一実施例である半導体装置の
製造方法を示す断面図である。同図において、素
子の形成を終えたシリコン基板１の表面にシリコ
ン酸化膜２が形成され、この上にアルミニウムパ
ツド３とアルミニウム配線４が形成され、これら
の上にCVDシリコン酸化膜や窒化膜などの表面
保護５がアルミニウムパツド３上の一部を除いて
全面的に形成される。これらは公知の製造方法で
製造することができる。アルミニウムパツド３
に、超音波ボンデイング法ではアルミニウムや銅
など、熱圧着ボンデイング法では金の細線６を固
着する。TAB（Tape，Autmated Bonding）の
場合には、銅のビームリード８を第２図の断面図
に示すように熱圧着する。その後露出したパツド
表面を過飽和蒸気に晒すとちみつで耐食性の水和
酸化物が得られる。アルミニウムの場合には前記
水和酸化物の組成構造は明らかではないが、ベー
マイト被膜と推定される。金属細線としてアルミ
ニウムをもちいればこの細線の表面もアルミナと
なり、耐湿性とさらに向上する。蒸気は純水を
100℃以上に加熱したものを用いれば効果はある
が一定の厚みの水和酸化物を得るには時間がかか
る。過飽和蒸気のほうが短時間で所定の被膜厚み
を得ることができる。蒸気発生装置は公知のボイ
ラー等でよく、蒸気中に不純物、特にイオン性の
不純物を含まないようにステンレス材料を使用す
るなど使用材料に留意する。生成する被膜の速度
や無孔性に強く影響を与えるからである。水蒸気
は吹きつけてもよく、蒸気吹きつけによりチツプ
表面の異物、焼きついた汚れ等が除去されるの
で、耐湿性のみならず信頼性に好影響を与える。
蒸気雰囲気にさらす際、シリコン基板側は蒸気が
結露して半導体チツプに水分が作用することのな
いように100℃以上の温度に維持しておく。組立
に使用している材料、例えば、樹脂材料は耐熱温
度が低いのでモールド製品に適用する場合にはリ
ードフレームのまま加熱テーブル上をすべらして
搬送できるので従来の製造工程に蒸気処理工程を
付加するだけでよい。高温水でも耐食効果を期待
できるが、高温水は常温の水に比較して活性度が
高く温水中に組立後、特にボンテイング後の半製
品を漬けるのはチツプマウント材や、パツケージ
部材からのイオン性不純物溶出を促してチツプに
好ましくないばかりか、樹脂材料は膨潤して強度
劣化や特性変動を生じる欠点がある。
本実施例では、４メグオームの純水を使用し、
150℃〜170℃で数分間の処理で数100オングスト
ロームの耐湿性の被膜を得た。
本発明の次の実施例は水蒸気雰囲気に化成化を
促進する薬品を添加した雰囲気としたなかでボン
デイング後の半製品をさらす方法である。化成化
促進剤として弱アルカリ性の薬品があげられる。
例えば、アンモニア、アミン、アルコールアミン
等である。これらの薬品を水蒸気雰囲気に〜１％
含ませると被膜の生成速度が早く、化成化促進剤
を使用した場合にはそうでない場合に比較して数
倍となる。しかし、同時に多孔質化も促進するの
で耐食性を劣化させないよう条件を設定しなけれ
ばならないのは当然である。
〔発明の効果〕
耐食性のアルミナによつて保護されたアルミニ
ウムパツド３は外部からの水分の浸入によつて腐
食することもなく、あるいはパツド間にリーク電
流が流れてその近傍の素子の信頼性を劣化させる
ことなく、この領域でのエレクトロマイグレーシ
ヨンの発生が皆無になる。
【図面の簡単な説明】
第１図は、本発明の半導体装置の製造方法によ
る半導体装置の断面図である。第２図は本発明の
半導体装置の製造方法による他の半導体装置の断
面図である。 １……シリコン基板、２……シリコン酸化膜、
３……アルミニウムパツド、４……アルミニウム
配線、５……表面保護膜、６……金属細線、７…
…耐食性のアルミナ、８……ビームリード。

Claims (1)

  1. 【特許請求の範囲】 １ 半導体チツプ上の電極に金属細線を接続した
    後、前記電極の表面を水和酸化物生成促進剤を添
    加した過飽和水蒸気を含む雰囲気に晒す工程を有
    することを特徴とする半導体装置の製造方法。 ２ 前記水和酸化物生成促進剤は、アンモニア、
    アミン、アルコールアミンのなかから選ばれたも
    のであることを特徴とする特許請求の範囲第１項
    に記載の半導体装置の製造方法。
JP61275912A 1986-11-18 1986-11-18 半導体装置の製造方法 Granted JPS63128634A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61275912A JPS63128634A (ja) 1986-11-18 1986-11-18 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61275912A JPS63128634A (ja) 1986-11-18 1986-11-18 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS63128634A JPS63128634A (ja) 1988-06-01
JPH0546978B2 true JPH0546978B2 (ja) 1993-07-15

Family

ID=17562157

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61275912A Granted JPS63128634A (ja) 1986-11-18 1986-11-18 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS63128634A (ja)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW426980B (en) * 1999-01-23 2001-03-21 Lucent Technologies Inc Wire bonding to copper
JPWO2010147187A1 (ja) 2009-06-18 2012-12-06 ローム株式会社 半導体装置
US20120032354A1 (en) * 2010-08-06 2012-02-09 National Semiconductor Corporation Wirebonding method and device enabling high-speed reverse wedge bonding of wire bonds
JP6579653B2 (ja) * 2015-06-24 2019-09-25 ローム株式会社 半導体装置および半導体装置の製造方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56116634A (en) * 1980-02-20 1981-09-12 Hitachi Ltd Semiconductor device
JPS56162844A (en) * 1980-05-19 1981-12-15 Hitachi Ltd Semiconductor device and manufacture thereof
JPS59150460A (ja) * 1983-01-31 1984-08-28 Toshiba Corp 半導体装置の製造方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56116634A (en) * 1980-02-20 1981-09-12 Hitachi Ltd Semiconductor device
JPS56162844A (en) * 1980-05-19 1981-12-15 Hitachi Ltd Semiconductor device and manufacture thereof
JPS59150460A (ja) * 1983-01-31 1984-08-28 Toshiba Corp 半導体装置の製造方法

Also Published As

Publication number Publication date
JPS63128634A (ja) 1988-06-01

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