JPH0465463U - - Google Patents

Info

Publication number
JPH0465463U
JPH0465463U JP1990109010U JP10901090U JPH0465463U JP H0465463 U JPH0465463 U JP H0465463U JP 1990109010 U JP1990109010 U JP 1990109010U JP 10901090 U JP10901090 U JP 10901090U JP H0465463 U JPH0465463 U JP H0465463U
Authority
JP
Japan
Prior art keywords
insulating substrate
led chip
transparent resin
mold structure
view
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1990109010U
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1990109010U priority Critical patent/JPH0465463U/ja
Publication of JPH0465463U publication Critical patent/JPH0465463U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Description

【図面の簡単な説明】
第１図は本考案に係るモジユールタイプＬＥＤ
のモールド構造の一実施例を示す第２図の−
線断面図、第２図は平面図、第３図は正面図、第
４図は第１図の−線断面図、第５図および第
６図はモールド樹脂のモールド方法を示す断面図
および―線断面図、第７図および第８図は本
考案の他の実施例を示す断面図および―線断
面図、第９図は従来のモジユールタイプＬＥＤの
モールド構造を示す第１０図の―線断面図、
第１０図は平面図、第１１図は第１０図の−
線断面図である。 １……絶縁基板、２……光学反射用凹部、３…
…導電パターン、３ａ，３ｂ……外部電極取出し
部、４……ＬＥＤチツプ、５……金線、６……モ
ールド樹脂、６Ａ……回り込み部、７……樹脂注
入用孔、１１ａ〜１１ｄ……側面、１２……モー
ルド用金型、１４……隙間。

Claims (1)

    【実用新案登録請求の範囲】
  1. 絶縁基板上に導電パターンを形成し、その上に
    ＬＥＤチツプを実装してワイヤボンデイングし、
    かつ前記ＬＥＤチツプを透明樹脂によつてモール
    ドしてなり、この透明樹脂は前記絶縁基板の側面
    または裏面にまで回り込む回り込み部を有してい
    ることを特徴とするモジユールタイプＬＥＤのモ
    ールド構造。
JP1990109010U 1990-10-19 1990-10-19 Pending JPH0465463U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1990109010U JPH0465463U (ja) 1990-10-19 1990-10-19

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1990109010U JPH0465463U (ja) 1990-10-19 1990-10-19

Publications (1)

Publication Number Publication Date
JPH0465463U true JPH0465463U (ja) 1992-06-08

Family

ID=31856164

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1990109010U Pending JPH0465463U (ja) 1990-10-19 1990-10-19

Country Status (1)

Country Link
JP (1) JPH0465463U (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013033905A (ja) * 2011-07-29 2013-02-14 Lg Innotek Co Ltd 発光素子パッケージ及びこれを具備した照明システム
JP2016511546A (ja) * 2013-03-05 2016-04-14 オスラム オプト セミコンダクターズ ゲゼルシャフト ミット ベシュレンクテル ハフツングＯｓｒａｍ Ｏｐｔｏ Ｓｅｍｉｃｏｎｄｕｃｔｏｒｓ ＧｍｂＨ オプトエレクトロニクス部品およびオプトエレクトロニクス部品を有する電子装置

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS611067A (ja) * 1984-06-13 1986-01-07 Stanley Electric Co Ltd プリント基板に装着されたｌｅｄチツプのモ−ルド方法

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS611067A (ja) * 1984-06-13 1986-01-07 Stanley Electric Co Ltd プリント基板に装着されたｌｅｄチツプのモ−ルド方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013033905A (ja) * 2011-07-29 2013-02-14 Lg Innotek Co Ltd 発光素子パッケージ及びこれを具備した照明システム
JP2016511546A (ja) * 2013-03-05 2016-04-14 オスラム オプト セミコンダクターズ ゲゼルシャフト ミット ベシュレンクテル ハフツングＯｓｒａｍ Ｏｐｔｏ Ｓｅｍｉｃｏｎｄｕｃｔｏｒｓ ＧｍｂＨ オプトエレクトロニクス部品およびオプトエレクトロニクス部品を有する電子装置

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