JPH0465463U - - Google Patents
Info
- Publication number
- JPH0465463U JPH0465463U JP1990109010U JP10901090U JPH0465463U JP H0465463 U JPH0465463 U JP H0465463U JP 1990109010 U JP1990109010 U JP 1990109010U JP 10901090 U JP10901090 U JP 10901090U JP H0465463 U JPH0465463 U JP H0465463U
- Authority
- JP
- Japan
- Prior art keywords
- insulating substrate
- led chip
- transparent resin
- mold structure
- view
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000011347 resin Substances 0.000 claims description 4
- 229920005989 resin Polymers 0.000 claims description 4
- 239000000758 substrate Substances 0.000 claims description 3
- 238000000605 extraction Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Description
第1図は本考案に係るモジユールタイプLED
のモールド構造の一実施例を示す第2図の−
線断面図、第2図は平面図、第3図は正面図、第
4図は第1図の−線断面図、第5図および第
6図はモールド樹脂のモールド方法を示す断面図
および―線断面図、第7図および第8図は本
考案の他の実施例を示す断面図および―線断
面図、第9図は従来のモジユールタイプLEDの
モールド構造を示す第10図の―線断面図、
第10図は平面図、第11図は第10図の−
線断面図である。
1……絶縁基板、2……光学反射用凹部、3…
…導電パターン、3a,3b……外部電極取出し
部、4……LEDチツプ、5……金線、6……モ
ールド樹脂、6A……回り込み部、7……樹脂注
入用孔、11a〜11d……側面、12……モー
ルド用金型、14……隙間。
Figure 1 shows a module type LED according to the present invention.
Figure 2 shows an example of the mold structure of -
2 is a plan view, FIG. 3 is a front view, FIG. 4 is a sectional view taken along the - line in FIG. 7 and 8 are cross-sectional views and - line cross-sectional views showing other embodiments of the present invention, and Fig. 9 is a - line cross-sectional view of Fig. 10 showing the mold structure of a conventional module type LED. cross section,
Fig. 10 is a plan view, Fig. 11 is - of Fig. 10.
FIG. 1... Insulating substrate, 2... Optical reflection recess, 3...
...Conductive pattern, 3a, 3b...External electrode extraction part, 4...LED chip, 5...Gold wire, 6...Mold resin, 6A...Wrap around part, 7...Resin injection hole, 11a to 11d... ...Side surface, 12...Mold die, 14...Gap.
Claims (1)
LEDチツプを実装してワイヤボンデイングし、
かつ前記LEDチツプを透明樹脂によつてモール
ドしてなり、この透明樹脂は前記絶縁基板の側面
または裏面にまで回り込む回り込み部を有してい
ることを特徴とするモジユールタイプLEDのモ
ールド構造。 A conductive pattern is formed on an insulating substrate, an LED chip is mounted on it, and wire bonded.
A modular type LED mold structure, characterized in that the LED chip is molded with a transparent resin, and the transparent resin has a wrap-around portion that wraps around to the side or back surface of the insulating substrate.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1990109010U JPH0465463U (en) | 1990-10-19 | 1990-10-19 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1990109010U JPH0465463U (en) | 1990-10-19 | 1990-10-19 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0465463U true JPH0465463U (en) | 1992-06-08 |
Family
ID=31856164
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1990109010U Pending JPH0465463U (en) | 1990-10-19 | 1990-10-19 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0465463U (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2013033905A (en) * | 2011-07-29 | 2013-02-14 | Lg Innotek Co Ltd | Light emitting device package and lighting system including the same |
JP2016511546A (en) * | 2013-03-05 | 2016-04-14 | オスラム オプト セミコンダクターズ ゲゼルシャフト ミット ベシュレンクテル ハフツングOsram Opto Semiconductors GmbH | Electronic device having optoelectronic component and optoelectronic component |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS611067A (en) * | 1984-06-13 | 1986-01-07 | Stanley Electric Co Ltd | Molding method of led chip mounted on printed board |
-
1990
- 1990-10-19 JP JP1990109010U patent/JPH0465463U/ja active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS611067A (en) * | 1984-06-13 | 1986-01-07 | Stanley Electric Co Ltd | Molding method of led chip mounted on printed board |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2013033905A (en) * | 2011-07-29 | 2013-02-14 | Lg Innotek Co Ltd | Light emitting device package and lighting system including the same |
JP2016511546A (en) * | 2013-03-05 | 2016-04-14 | オスラム オプト セミコンダクターズ ゲゼルシャフト ミット ベシュレンクテル ハフツングOsram Opto Semiconductors GmbH | Electronic device having optoelectronic component and optoelectronic component |