JPH03140030A - Low noise oscillating circuit - Google Patents
Low noise oscillating circuitInfo
- Publication number
- JPH03140030A JPH03140030A JP1277219A JP27721989A JPH03140030A JP H03140030 A JPH03140030 A JP H03140030A JP 1277219 A JP1277219 A JP 1277219A JP 27721989 A JP27721989 A JP 27721989A JP H03140030 A JPH03140030 A JP H03140030A
- Authority
- JP
- Japan
- Prior art keywords
- output
- phase
- delay device
- voltage
- vco
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000010355 oscillation Effects 0.000 claims description 12
- 230000010363 phase shift Effects 0.000 claims 1
- 230000000694 effects Effects 0.000 description 3
- 230000035945 sensitivity Effects 0.000 description 3
- 230000032683 aging Effects 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
- 230000003111 delayed effect Effects 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000001788 irregular Effects 0.000 description 1
- 230000002123 temporal effect Effects 0.000 description 1
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Noise Elimination (AREA)
Abstract
Description
【発明の詳細な説明】
（産業上の利用分野）
本発明は、マイクロ波発振回路やマイクロ波シンセサイ
ザにおける位相雑音の低減化に関する。DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to reducing phase noise in microwave oscillation circuits and microwave synthesizers.
（従来の技術）
従来の低雑音発振回路の例（文献二作用、車重、開帳、
頭出「発振器の位相雑音の低減法ｊ電子情報通信学会春
季全国大会（１９８９年）第１分冊、Ａ−５６頁（平成
元年３月））を第４図に示す。(Prior art) Examples of conventional low-noise oscillator circuits (References: two-effect, vehicle weight, opening,
Figure 4 shows the introduction ``Method for Reducing Oscillator Phase Noise, IEICE Spring National Conference (1989) Volume 1, page A-56 (March 1989).
この文献によると、遅延検波を利用して位相雑音を検出
し、それを電圧制御発振器（ＶＣＯ）に帰還することに
より位相雑音を低減することができると述べられている
。According to this document, it is stated that phase noise can be reduced by detecting phase noise using delayed detection and feeding it back to a voltage controlled oscillator (VCO).
（発明が解決しようとする課題）
ところでこの回路では文献で述べられているように、動
作の前提条件として、遅延器の通過位相を（２ｍ−１）
π／２どなるように遅延時間でか限定される（ｍは整数
）。(Problem to be solved by the invention) In this circuit, as stated in the literature, as a prerequisite for operation, the passing phase of the delay device is set to (2m-1).
The delay time is limited to π/2 (m is an integer).
実施する上で、
■実際の遅延器では、周囲温度変化や経年変化で遅延器
の通過位相か初期設定値からずれてしまうので、通過位
相＝ （２ｍ−１）π／２の条件が成立せず、十分な雑
音低減効果が得られない。In implementation, ■In an actual delay device, the passing phase of the delay device deviates from the initial setting value due to changes in ambient temperature or changes over time, so the condition of passing phase = (2m-1)π/2 does not hold. Therefore, a sufficient noise reduction effect cannot be obtained.
■遅延時間でがたとえ一定であったと仮定しても、この
発振回路をシンセサイザのようにｖＣＯの周波数が変え
て運用する場合にはそのつど通過位相が（２ｍ−１）π
／２の条件からずれ、やはり、十分な雑音低減効果が得
られない。■Even if it is assumed that the delay time is constant, if this oscillation circuit is operated by changing the vCO frequency like a synthesizer, the passing phase will be (2m-1)π each time.
/2, and a sufficient noise reduction effect cannot be obtained.
という２つの欠点がある。There are two drawbacks.
本発明の目的はこれら欠点を除去し、実際の回路装置で
起こりうる周囲温度変化や素子の経年変化に左右される
ことなく、かつ、シンセサイザのようにＶＣＯの周波数
が変わる場合にも安定してＶＣＯの位相雑音を低減でき
る発振回路を提供することにある。The purpose of the present invention is to eliminate these drawbacks, and to maintain stability even when the VCO frequency changes as in a synthesizer, without being affected by ambient temperature changes or aging of elements that may occur in actual circuit devices. An object of the present invention is to provide an oscillation circuit that can reduce the phase noise of a VCO.
（課題を解決するための手段）
前記目的を達成するだめの本発明の特徴は、電圧制御発
振器と、その出力に接続され、遅延時間が制御可能な遅
延器と該遅延器の出力と前記電圧制御発振器の出力とを
入力とする位相比較器を有し、出力信号を前記電圧制御
発振器の周波数制御入力に帰還する遅延検波器と、電圧
制御発振器の出力に結合する発振出力端子とを有し、前
記遅延器の遅延時間は前記位相比較器の出力により制御
される低雑音発振回路にある。(Means for Solving the Problems) The features of the present invention for achieving the above object include: a voltage controlled oscillator; a delay device connected to the output of the oscillator and capable of controlling delay time; and an output of the delay device and the voltage a phase comparator that receives the output of the controlled oscillator as an input, a delay detector that feeds back the output signal to the frequency control input of the voltage controlled oscillator, and an oscillation output terminal coupled to the output of the voltage controlled oscillator. , the delay time of the delay device is in a low noise oscillator circuit controlled by the output of the phase comparator.
（作用）
本発明による位相同期発振回路は、遅延時間が制御でき
る遅延器を備え、位相比較器の出力をｖＣＯに帰還する
のみならず、その直流成分を電圧制御遅延器にも帰還し
ていることが特徴であり、この点が遅延器の遅延時間が
固定となっている従来の低雑音発振回路と異なる。(Function) The phase-locked oscillator circuit according to the present invention includes a delay device that can control the delay time, and not only feeds back the output of the phase comparator to vCO, but also feeds back its DC component to the voltage-controlled delay device. This feature is different from conventional low-noise oscillation circuits in which the delay time of the delay device is fixed.
（実施例） 本発明の実施例を第１図〜第３図に示す。(Example) Examples of the present invention are shown in FIGS. 1 to 3.
第１図は、遅延器として通過位相を制御できる電圧制御
遅延器としたものであり、通過位相のずれ量を位相比較
器の出力端子で検出し、その直流成分なＬＰＦでとりだ
して該電圧制御遅延器を制御することにより常に所望の
通過位相を保持するしくみである。Figure 1 shows a voltage-controlled delay device that can control the passing phase as a delay device.The amount of shift in the passing phase is detected by the output terminal of the phase comparator, and the DC component is taken out by the LPF to control the voltage. The mechanism is such that a desired passing phase is always maintained by controlling the delay device.
第１図で、ｌＯは電圧制御発振器、２０は遅延検波器、
２２は位相比較器、２４は遅延時間の制御可能な電圧制
御遅延器、２６はローパスフィルタを示す。In FIG. 1, lO is a voltage controlled oscillator, 20 is a delay detector,
22 is a phase comparator, 24 is a voltage-controlled delay device whose delay time can be controlled, and 26 is a low-pass filter.
第１図について動作を詳しく説明する。The operation will be explained in detail with reference to FIG.
ＶＣＯの発信出力を
Ｖ（ｔ） ＝ Ａｃｏｓ［ωｔ ＋ φ（ｔ））
・・（１）とする。ここで、Ａとωとφ（１）は
ｖＣＯの出力振幅と周波数と位相である。φ（１）は位
相の不規則な時間的微小ゆらぎすなわち位相雑音を含ん
でいる。The transmission output of the VCO is V(t) = Acos[ωt + φ(t))
...(1). Here, A, ω, and φ(1) are the output amplitude, frequency, and phase of vCO. φ(1) includes irregular temporal minute fluctuations in phase, that is, phase noise.
位相比較器の２つの入力電力は、それぞれ、どなる。こ
こで、では遅延器の遅延時間である。The two input powers of the phase comparator are respectively. Here, is the delay time of the delay device.
位相比ｌ！５ｉ器はアナログ回路では二重平衡ミクサ、
デジタル回路では排他的論理和なとて実現できる。ここ
では、アナログ回路で動作を説明する。二重平衡ミクサ
はその動作としては乗算器であるので、その出力ψ（１
）は２つの入力信号電圧の平貴すなわち、
ψ（１）
＝Ａｃｏｓ［ωｔ＋φ（ｔ）］
ＸＡｃｏｓ［ω（ｔ−ｚ） ＋φ（ｔ−ｒ）］＝域Ａ２
ｃｏｓ ［ωｔ＋φ（１）
＋ω（を−τ）＋φ（を−で）１
＋イＡ”ｃｏｓ ［ωｔ＋φ（１）
−ω（ｔ−で）−φ（Ｌ−で）］
＝％Ａ”ｃｏｓ ［２ωを一ωτ＋φ（１）＋φ（ｔ−
で）１＋ ％ Ａ”ｃｏｓ ［（ＩＪ ｔ＋φ（ｔ）
−φ（ｔ−テ）］＝％Ａ”ｃｏｓ ［２ωｔ −ω
で＋ φ （１） ＋ φ （し−で）１＋ ％Ａ
”ｃｏｓ ωτ・ｃｏｓ［φ（１） −φ（ｔ−ｚ）
］−％Ａ”ｓｉｎ （ＩＪ Ｚ： ・ｓｉｎ［φ（１）
−φ（ｔ−テ）］（４）
となる。位相雑音のゆらぎφ（１）−φ（七−で）は１
ラジアンに比べて非常に小さいので、ｃｏｓ ［φ（１
）−φ（を−で）１岬１ｓｉｎ［φ（１） −φ（ｔ
−ｔ：）］Ｌ９φ（ｔ） −φ（ｔ −Ｔ）と近似で
き、これを上式に適用すると、甲（１）
＝展Ａ２ｃｏｓ ［２ωを一ωτ＋φ（１）＋φ（を−
で）１＋％Ａ”ＣＯ３ωて
４局Ａ”［φ（１，）−φ（ｔ −τ）ｌｓｉｎ ωｖ
・・（５）となる。上式のうち第１項はマイクロ波
周波数成分、第２項は直流成分、第３項は雑音成分であ
る。ローパスフィルタ（ＬＰＦ）で直流成分のみ抽出す
るどＬＰＦの出力は、
局Ａ２ｃｏｓωで
となる。ここで、電圧制御遅延器はＬＰＦの出力で制御
され、その制御感度をｋとすると遅延時間では、
ｒ−＝ｋ ｘ′ＡＡ２ｃｏｓ （ｔＪｌ：となる。この
式を変形すると、
となる。そこで制御感度ｋを十分大きくしておけば、通
過位相ωては、ｖＣＯの周波数にかかわりなく常に、
ωて＝ （２ｍ−１）π／２ ・・（
６）が保持される。制御感度ｋが不足するときはＬＰＦ
の次段に直流増幅器を挿入しておけばよい。Phase ratio l! The 5i device is a double balanced mixer in analog circuits.
In digital circuits, this can be realized as an exclusive OR. Here, the operation will be explained using an analog circuit. Since the double-balanced mixer operates as a multiplier, its output ψ(1
) is the normal of the two input signal voltages, i.e., ψ(1) = Acos[ωt+φ(t)] XAcos[ω(t-z) +φ(t-r)] = area A2
cos [ωt+φ(1) +ω(at −τ)+φ(at −) 1 +IA”cos [ωt+φ(1) −ω(at t−)−φ(at L−)] =%A”cos [ 2ω is 1ωτ+φ(1)+φ(t-
) 1+% A”cos [(IJ t+φ(t)
−φ(t−te)]=%A”cos [2ωt −ω
+ φ (1) + φ (shi-de)1+ %A
”cos ωτ・cos[φ(1) −φ(tz)
]-%A”sin (IJ Z: ・sin[φ(1)
-φ(t-te)] (4) The phase noise fluctuation φ(1)−φ(7−) is 1
Since it is very small compared to radians, cos [φ(1
) −φ (with −) 1 cape 1 sin [φ(1) −φ(t
−t:)]L9φ(t) −φ(t −T), and applying this to the above equation, we get A2cos [2ω=1ωτ+φ(1)+φ(−
) 1+% A"CO3ω and 4 stations A" [φ(1,)−φ(t −τ)lsin ωv
...(5). In the above equation, the first term is a microwave frequency component, the second term is a DC component, and the third term is a noise component. When only the DC component is extracted using a low-pass filter (LPF), the output of the LPF will be at station A2cosω. Here, the voltage-controlled delay device is controlled by the output of the LPF, and if its control sensitivity is k, then the delay time is r-=k If the sensitivity k is made large enough, the passing phase ω will always be ωt = (2m-1)π/2 ・・(
6) is held. When control sensitivity k is insufficient, LPF
It is sufficient to insert a DC amplifier at the next stage.
実施例の第２図は、第１図とほとんど同様に動作するが
、この例では遅延器と反対側の枝に電圧制御移相器２４
ａを挿入することにより、位相比較器に入力される２つ
の信号の位相差を保持している。The embodiment shown in FIG. 2 operates much the same as in FIG.
By inserting a, the phase difference between the two signals input to the phase comparator is maintained.
本発明は従来の位相同期回路（ＰＬＬ）や自動周波数制
御回路（ＡＦＣ）と組み合わせて実施することも可能で
ある。第３図にその構成を示す。この実施例では、ｖＣ
Ｏの発振周波数のゆっくりした変動はＰＬＬまたはＡＦ
Ｃで抑えられ、はやい変動（位相雑音）は本発明の回路
で抑えている。したがって、ｖＣＯの出力として、安定
でかつ低位相雑音のマイクロ波信号が得られる。The present invention can also be implemented in combination with a conventional phase locked loop (PLL) or automatic frequency control circuit (AFC). Figure 3 shows its configuration. In this example, vC
The slow fluctuation of the oscillation frequency of O is a PLL or AF
C, and rapid fluctuations (phase noise) are suppressed by the circuit of the present invention. Therefore, a stable microwave signal with low phase noise can be obtained as the output of the vCO.
（発明の効果）
以上説明したように、本発明の低雑音発振回路は、実際
の回路装置で起こりつる周囲温度変化や素子の経年変化
に左右されることなく ＶＣＯの位相雑音を低減できる
。また、本発明によればシンセサイザのようにｖＣＯの
周波数が変わる場合にも汎用的に位相雑音を低減できる
。よって、比較的雑音の多いｖＣＯを用いた場合にも、
低雑音のマイクロは発振器やシンセサイザを構成するこ
とができる。(Effects of the Invention) As explained above, the low-noise oscillation circuit of the present invention can reduce the phase noise of a VCO without being affected by changes in ambient temperature or aging of elements that occur in actual circuit devices. Further, according to the present invention, it is possible to reduce phase noise in a general-purpose manner even when the frequency of the vCO changes as in a synthesizer. Therefore, even when using relatively noisy vCO,
Low-noise micros can form oscillators and synthesizers.
第１図、第２図及び第３図は本発明による低雑音発振回
路のブロック図、第４図は従来の低雑音発振回路の例で
ある。
（符号の説明；第１図）
ｌＯ：電圧制御発振器、 ２０；遅延検波器、２２；位
相比較器、 ２４；電圧制御遅延器、２６；ローパ
スフィルタ。1, 2, and 3 are block diagrams of a low-noise oscillation circuit according to the present invention, and FIG. 4 is an example of a conventional low-noise oscillation circuit. (Explanation of symbols; FIG. 1) 10: Voltage controlled oscillator, 20: Delay detector, 22: Phase comparator, 24: Voltage controlled delay device, 26: Low pass filter.
Claims (2)
遅延器の出力と前記電圧制御発振器の出力とを入力とす
る位相比較器を有し、出力信号を前記電圧制御発振器の
周波数制御入力に帰還する遅延検波器と、 電圧制御発振器の出力に結合する発振出力端子とを有し
、 前記遅延器の遅延時間は前記位相比較器の出力により制
御されることを特徴とする低雑音発振回路。(1) A voltage-controlled oscillator, a delay device connected to the output of the voltage-controlled oscillator and capable of controlling delay time, and a phase comparator that receives the output of the delay device and the output of the voltage-controlled oscillator as inputs, and outputs an output signal. a delay detector feeding back to the frequency control input of the voltage controlled oscillator; and an oscillation output terminal coupled to the output of the voltage controlled oscillator, the delay time of the delay device being controlled by the output of the phase comparator. A low-noise oscillation circuit featuring
らの出力を入力とする位相比較器とを有する遅延検波器
と、 電圧制御発振器の出力に結合する発振出力端子とを有し
、 前記電圧制御移相器の移相量は前記位相比較器の出力に
より制御されることを特徴とする低雑音発振回路。(2) a voltage-controlled oscillator; a delay detector connected to the output thereof and having a delay device, a voltage-controlled phase shifter, and a phase comparator having the outputs thereof as input; and an oscillation coupled to the output of the voltage-controlled oscillator. an output terminal, wherein a phase shift amount of the voltage controlled phase shifter is controlled by an output of the phase comparator.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1277219A JP2800047B2 (en) | 1989-10-26 | 1989-10-26 | Low noise oscillation circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1277219A JP2800047B2 (en) | 1989-10-26 | 1989-10-26 | Low noise oscillation circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH03140030A true JPH03140030A (en) | 1991-06-14 |
| JP2800047B2 JP2800047B2 (en) | 1998-09-21 |
Family
ID=17580474
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1277219A Expired - Lifetime JP2800047B2 (en) | 1989-10-26 | 1989-10-26 | Low noise oscillation circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2800047B2 (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06291645A (en) * | 1993-03-31 | 1994-10-18 | Nec Corp | Frequency synthesizer |
| US5521557A (en) * | 1995-01-19 | 1996-05-28 | Japan Radio Co. Ltd. | Delay detection circuit and low-noise oscillation circuit using the same |
| JP2008154231A (en) * | 2006-12-13 | 2008-07-03 | Advantest Corp | Oscillation circuit, pll circuit, semiconductor chip, and testing device |
| JP4528870B1 (en) * | 2009-06-05 | 2010-08-25 | 日本高周波株式会社 | Magnetron oscillation apparatus and plasma processing apparatus |
| FR2967500A1 (en) * | 2010-11-12 | 2012-05-18 | St Microelectronics Sa | DEVICE FOR TRANSMITTING / RECEIVING RADAR WAVES |
| JP2014053710A (en) * | 2012-09-06 | 2014-03-20 | Anritsu Corp | Microwave signal generator and frequency control method thereof |
-
1989
- 1989-10-26 JP JP1277219A patent/JP2800047B2/en not_active Expired - Lifetime
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06291645A (en) * | 1993-03-31 | 1994-10-18 | Nec Corp | Frequency synthesizer |
| US5521557A (en) * | 1995-01-19 | 1996-05-28 | Japan Radio Co. Ltd. | Delay detection circuit and low-noise oscillation circuit using the same |
| EP0723340A1 (en) * | 1995-01-19 | 1996-07-24 | Japan Radio Co., Ltd | Delay detection circuit and low-noise oscillation circuit using the same |
| AU693964B2 (en) * | 1995-01-19 | 1998-07-09 | Japan Radio Co., Ltd. | Delay detection circuit and low-noise oscillation circuit using the same |
| JP2008154231A (en) * | 2006-12-13 | 2008-07-03 | Advantest Corp | Oscillation circuit, pll circuit, semiconductor chip, and testing device |
| JP4528870B1 (en) * | 2009-06-05 | 2010-08-25 | 日本高周波株式会社 | Magnetron oscillation apparatus and plasma processing apparatus |
| JP2010283678A (en) * | 2009-06-05 | 2010-12-16 | Nihon Koshuha Co Ltd | Magnetron oscillator and plasma treatment device |
| FR2967500A1 (en) * | 2010-11-12 | 2012-05-18 | St Microelectronics Sa | DEVICE FOR TRANSMITTING / RECEIVING RADAR WAVES |
| EP2512028A1 (en) * | 2010-11-12 | 2012-10-17 | Stmicroelectronics Sa | Device for transmitting/receiving radar waves |
| JP2014053710A (en) * | 2012-09-06 | 2014-03-20 | Anritsu Corp | Microwave signal generator and frequency control method thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2800047B2 (en) | 1998-09-21 |
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