JP2800047B2 - Low noise oscillation circuit - Google Patents
Low noise oscillation circuitInfo
- Publication number
- JP2800047B2 JP2800047B2 JP1277219A JP27721989A JP2800047B2 JP 2800047 B2 JP2800047 B2 JP 2800047B2 JP 1277219 A JP1277219 A JP 1277219A JP 27721989 A JP27721989 A JP 27721989A JP 2800047 B2 JP2800047 B2 JP 2800047B2
- Authority
- JP
- Japan
- Prior art keywords
- output
- voltage
- delay
- phase
- controlled oscillator
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Landscapes
- Noise Elimination (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Description
【発明の詳細な説明】 （産業上の利用分野） 本発明は、マイクロ波発振回路やマイクロ波シンセサ
イザにおける位相雑音の低減化に関する。Description: TECHNICAL FIELD The present invention relates to reduction of phase noise in a microwave oscillation circuit and a microwave synthesizer.
（従来の技術） 従来の低雑音発振回路の例（文献：作田、市毛、関
根、須山「発振器の位相雑音の低減法」電子情報通信学
会春季全国大会（1989年）第１分冊、Ａ−56頁（平成元
年３月））を第４図に示す。この文献によると、遅延検
波を利用して位相雑音を検出し、それを電圧制御発振器
（VCO）に帰還することにより位相雑音を低減すること
ができると述べられている。(Prior art) Examples of conventional low-noise oscillation circuits (documents: Sakuta, Ichige, Sekine, Suyama, "Methods for reducing oscillator phase noise", IEICE Spring National Convention (1989) First Volume, A- Page 56 (March 1989) is shown in Fig. 4. According to this document, phase noise can be reduced by detecting phase noise using differential detection and feeding it back to a voltage controlled oscillator (VCO).
（発明が解決しようとする課題） ところでこの回路では文献で述べられているように、
動作の前提条件として、遅延器の通過位相を（2m−１）
π/2となるように遅延時間τが限定される（ｍは整
数）。(Problems to be solved by the invention) By the way, as described in the literature,
As a prerequisite for operation, the passing phase of the delay unit should be (2m-1)
The delay time τ is limited so as to be π / 2 (m is an integer).
実施する上で、 実際の遅延器では、周囲温度変化や経年変化で遅延器
の通過位相が初期設定値からずれてしまうので、通過位
相＝（2m−１）π/2の条件が成立せず、十分な雑音低減
効果が得られない。In actual implementation, in the actual delay unit, the passing phase of the delay unit deviates from the initial set value due to a change in ambient temperature or aging, so that the condition of passing phase = (2m-1) π / 2 is not satisfied. , A sufficient noise reduction effect cannot be obtained.
遅延時間τがたとえ一定であったと仮定しても、この
発振回路をシンセサイザのようにVCOの周波数が変えて
運用する場合にはそのつど通過位相が（2m−１）π/2の
条件からずれ、やはり、十分な雑音低減効果が得られな
い。Even if it is assumed that the delay time τ is constant, when this oscillator circuit is operated by changing the frequency of the VCO like a synthesizer, the passing phase deviates from the condition of (2m-1) π / 2 each time. Again, a sufficient noise reduction effect cannot be obtained.
という２つの欠点がある。There are two drawbacks.
本発明の目的はこれら欠点を除去し、実際の回路装置
で起こりうる周囲温度変化や素子の経年変化に左右され
ることなく、かつ、シンセサイザのようにVCOの周波数
が変わる場合にも安定してVCOの位相雑音を低減できる
発振回路を提供することにある。The object of the present invention is to eliminate these drawbacks, and is not affected by ambient temperature changes and element aging that can occur in actual circuit devices, and is stable even when the frequency of the VCO changes like a synthesizer. An object of the present invention is to provide an oscillation circuit that can reduce the phase noise of a VCO.
（課題を解決するための手段） 前記目的を達成するための本発明の特徴は、電圧制御
発振器と、その出力に接続され、遅延時間が制御可能な
遅延器と該遅延器の出力と前記電圧制御発振器の出力と
を入力とする位相比較器を有し、出力信号を前記電圧制
御発振器の周波数制御入力に帰還する遅延検波器と、電
圧制御発振器の出力に結合する発振出力端子とを有し、
前記遅延器の遅延時間は前記位相比較器の出力により制
御される低雑音発振回路にある。(Means for Solving the Problems) A feature of the present invention for achieving the above object is a voltage controlled oscillator, a delay device connected to an output of the voltage controlled oscillator, the delay time of which can be controlled, an output of the delay device, and the voltage. A phase detector having an output of the controlled oscillator as an input, a delay detector for feeding an output signal back to a frequency control input of the voltage controlled oscillator, and an oscillation output terminal coupled to an output of the voltage controlled oscillator. ,
The delay time of the delay device is in a low noise oscillation circuit controlled by the output of the phase comparator.
（作用） 本発明による位相同期発振回路は、遅延時間が制御で
きる遅延器を備え、位相比較器の出力をVCOに帰還する
のみならず、その直流成分を電圧制御遅延器にも帰還し
ていることが特徴であり、この点が遅延器の遅延時間が
固定となっている従来の低雑音発振回路と異なる。(Operation) The phase-locked oscillation circuit according to the present invention includes a delay device that can control the delay time, and not only feeds back the output of the phase comparator to the VCO, but also feeds its DC component back to the voltage-controlled delay device. This is different from the conventional low noise oscillation circuit in which the delay time of the delay unit is fixed.
（実施例） 本発明の実施例を第１図〜第３図に示す。(Embodiment) An embodiment of the present invention is shown in FIG. 1 to FIG.
第１図は、遅延器として通過位相を制御できる電圧制
御遅延器としたものであり、通過位相のずれ量を位相比
較器の出力端子で検出し、その直流成分をLPFでとりだ
して該電圧制御遅延器を制御することにより常に所望の
通過位相を保持するしくみである。FIG. 1 shows a voltage-controlled delay device that can control a passing phase as a delay device. The shift amount of the passing phase is detected at an output terminal of a phase comparator, and its DC component is extracted by an LPF to perform the voltage control. By controlling the delay unit, a desired passing phase is always maintained.
第１図で、10は電圧制御発振器、20は遅延検波器、22
は位相比較器、24は遅延時間の制御可能な電圧制御遅延
器、26はローパスフィルタを示す。In FIG. 1, 10 is a voltage controlled oscillator, 20 is a differential detector, 22
Denotes a phase comparator, 24 denotes a voltage-controlled delay device capable of controlling a delay time, and 26 denotes a low-pass filter.
第１図について動作を詳しく説明する。 The operation will be described in detail with reference to FIG.
VCOの発信出力を Ｖ（ｔ）＝Acos［ωｔ＋φ（ｔ）］ ……（１） とする。ここで、Ａとωとφ（ｔ）はVCOの出力振幅と
周波数と位相である。φ（ｔ）は位相の不規則な時間的
微小ゆらぎすなわち位相雑音を含んでいる。The output of the VCO is expressed as V (t) = Acos [ωt + φ (t)] (1) Here, A, ω, and φ (t) are the output amplitude, frequency, and phase of the VCO. φ (t) includes a minute temporal fluctuation with irregular phase, that is, phase noise.
位相比較器の２つの入力電力は、それぞれ、 となる。ここで、τは遅延器の遅延時間である。The two input powers of the phase comparator are Becomes Here, τ is the delay time of the delay unit.
位相比較器はアナログ回路では二重平衡ミクサ、デジ
タル回路では排他的論理和などで実現できる。ここで
は、アナログ回路で動作を説明する。二重平衡ミクサは
その動作としては乗算器であるので、その出力Ψ（ｔ）
は２つの入力信号電圧の積すなわち、 Ψ（ｔ） ＝Acos［ωｔ＋φ（ｔ）］ ×Acos［ω（ｔ−τ）＋φ（ｔ−τ）］ ＝1/2A2cos［ωｔ＋φ（ｔ） ＋ω（ｔ−τ）＋φ（ｔ−τ）］ ＋1/2A2cos［ωｔ＋φ（ｔ） −ω（ｔ−τ）−φ（ｔ−τ）］ ＝1/2A2cos［２ωｔ−ωτ＋φ（ｔ）＋φ（ｔ−
τ）］ ＋1/2A2cos［ωｔ＋φ（ｔ）−φ（ｔ−τ）］ 1/2A2cos［２ωｔ−ωτ＋φ（ｔ）＋φ（ｔ−τ）］ ＋1/2A2cos ωτ・cos［φ（ｔ）−φ（ｔ−τ）］ −1/2A2sin ωτ・sin［φ（ｔ）−φ（ｔ−τ）］ ……（４） となる。位相雑音のゆらぎφ（ｔ）−φ（ｔ−τ）は１
ラジアンに比べて非常に小さいので、 cos［φ（ｔ）−φ（ｔ−τ）］≒１ sin［φ（ｔ）−φ（ｔ−τ）］ ≒φ（ｔ）−φ（ｔ−τ） い近似でき、これを上式に適用すると、 Ψ（ｔ） ＝1/2A2cos［２ωｔ−ωτ＋φ（ｔ）＋φ（ｔ−
τ）］ ＋1/2A2cos ωτ −1/2A2［φ（ｔ）−φ（ｔ−τ）］sin ωτ ……（５） となる。上式のうち第１項はマイクロ波周波数成分、第
２項は直流成分、第３項は雑音成分である。ローパスフ
ィルタ（LPF）で直流成分のみ抽出するとLPFの出力は、 1/2A2cos ωτ となる。ここで、電圧制御遅延器はLPFの出力で制御さ
れ、その制御感度をｋとすると遅延時間τは、 τ＝ｋ×1/2A2cos ωτ となる。この式を変形すると、 となる。そこで制御感度ｋを十分大きくしておけば、通
過位相ωτは、VCOの周波数にかかわりなく常に、 ωτ＝（2m−１）π/2 ……（６） が保持される。制御感度ｋが不足するときはLPFの次段
に直流増幅器を挿入しておけばよい。The phase comparator can be realized by a double balanced mixer in an analog circuit and by an exclusive OR in a digital circuit. Here, the operation will be described using an analog circuit. Since the operation of the double balanced mixer is a multiplier, its output Ψ (t)
Is the product of two input signal voltages, ie, Ψ (t) = Acos [ωt + φ (t)] × Acos [ω (t−τ) + φ (t−τ)] = 1 / 2A 2 cos [ωt + φ (t) + ω (T−τ) + φ (t−τ)] + 1 / 2A 2 cos [ωt + φ (t) −ω (t−τ) −φ (t−τ)] = 1 / 2A 2 cos [2ωt−ωτ + φ (t) + Φ (t−
τ)] + 1 / 2A 2 cos [ωt + φ (t) −φ (t−τ)] 1 / 2A 2 cos [2ωt−ωτ + φ (t) + φ (t−τ)] + 1 / 2A 2 cos ωτ · cos [φ (T) −φ (t−τ)] − 1 / 2A 2 sin ωτ · sin [φ (t) −φ (t−τ)] (4) The phase noise fluctuation φ (t) −φ (t−τ) is 1
Cos [φ (t) −φ (t−τ)] ≒ 1 sin [φ (t) −φ (t−τ)] Δφ (t) −φ (t−τ近似 (t) = 1 / 2A 2 cos [2ωt−ωτ + φ (t) + φ (t−
τ)] + 1 / 2A 2 cos ωτ−1 / 2A 2 [φ (t) −φ (t−τ)] sin ωτ (5) In the above equation, the first term is a microwave frequency component, the second term is a DC component, and the third term is a noise component. When only the DC component is extracted by the low-pass filter (LPF), the output of the LPF is 1 / 2A 2 cos ωτ. Here, the voltage control delay device is controlled by the output of the LPF, and when the control sensitivity is k, the delay time τ is τ = k × 1 / 2A 2 cos ωτ. By transforming this equation, Becomes Therefore, if the control sensitivity k is made sufficiently large, the passing phase ωτ is always maintained at ωτ = (2m−1) π / 2 (6) regardless of the frequency of the VCO. When the control sensitivity k is insufficient, a DC amplifier may be inserted in the next stage of the LPF.
実施例の第２図は、第１図とほとんど同様に動作する
が、この例では遅延器と反対側の枝に電圧制御移相器24
aを挿入することにより、位相比較器に入力される２つ
の信号の位相差を保持している。FIG. 2 of the embodiment operates in much the same way as FIG. 1, but in this example the voltage-controlled phase shifter 24 is connected to the branch opposite the delay.
By inserting a, the phase difference between the two signals input to the phase comparator is maintained.
本発明は従来の位相同期回路（PLL）や自動周波数制
御回路（AFC）と組み合わせて実施することも可能であ
る。第３図にその構成を示す。この実施例では、VCOの
発振周波数のゆっくりした変動はPLLまたはAFCで抑えら
れ、はやい変動（位相雑音）は本発明の回路で抑えてい
る。したがって、VCOの出力として、安定でかつ低位相
雑音のマイクロ波信号が得られる。The present invention can be implemented in combination with a conventional phase locked loop (PLL) or automatic frequency control circuit (AFC). FIG. 3 shows the configuration. In this embodiment, a slow change in the oscillation frequency of the VCO is suppressed by the PLL or AFC, and a fast change (phase noise) is suppressed by the circuit of the present invention. Therefore, a stable and low-phase-noise microwave signal can be obtained as the output of the VCO.
（発明の効果） 以上説明したように、本発明の低雑音発振回路は、実
際の回路装置で起こりうる周囲温度変化や素子の経年変
化に左右されることなくVCOの位相雑音を低減できる。
また、本発明によればシンセサイザのようにVCOの周波
数が変わる場合にも汎用的に位相雑音を低減できる。よ
って、比較的雑音の多いVCOを用いた場合にも、低雑音
のマイクロは発振器やシンセサイザを構成することがで
きる。(Effect of the Invention) As described above, the low-noise oscillation circuit of the present invention can reduce the phase noise of the VCO without being affected by changes in the ambient temperature and aging of the elements that can occur in an actual circuit device.
Further, according to the present invention, even when the frequency of the VCO changes as in a synthesizer, the phase noise can be reduced for general purposes. Therefore, even when a VCO having relatively high noise is used, the low-noise micro can constitute an oscillator or a synthesizer.
第１図、第２図及び第３図は本発明による低雑音発振回
路のブロック図、第４図は従来の低雑音発振回路の例で
ある。 （符号の説明；第１図） 10;電圧制御発振器、20;遅延検波器、 22;位相比較器、24;電圧制御遅延器、 26;ローパスフィルタ。1, 2 and 3 are block diagrams of a low-noise oscillating circuit according to the present invention, and FIG. 4 is an example of a conventional low-noise oscillating circuit. (Explanation of symbols; FIG. 1) 10; voltage-controlled oscillator, 20; delay detector, 22; phase comparator, 24; voltage-controlled delay, 26; low-pass filter.
Claims (2)
遅延器の出力と前記電圧制御発振器の出力とを入力とす
る位相比較器を有し、出力信号を前記電圧制御発振器の
周波数制御入力に帰還する遅延検波器と、 電圧制御発振器の出力に結合する発振出力端子とを有
し、 前記遅延器の遅延時間は前記位相比較器の出力により制
御されることを特徴とする低雑音発振回路。1. A voltage-controlled oscillator, comprising: a delay device connected to an output of the voltage-controlled oscillator, the delay device having a controllable delay time, and a phase comparator having an output of the delay device and an output of the voltage-controlled oscillator as inputs. A delay detector that feeds back a signal to a frequency control input of the voltage controlled oscillator; and an oscillation output terminal that is coupled to an output of the voltage controlled oscillator. A delay time of the delay unit is controlled by an output of the phase comparator. A low-noise oscillation circuit characterized by:
らの出力を入力とする位相比較器とを有する遅延検波器
と、 電圧制御発振器の出力に結合する発振出力端子とを有
し、 前記電圧制御移相器の移相量は前記位相比較器の出力に
より制御されることを特徴とする低雑音発振回路。2. A delay detector connected to an output of the voltage controlled oscillator, the delay detector having a delay unit, a voltage controlled phase shifter, and a phase comparator having their outputs as inputs, and coupled to an output of the voltage controlled oscillator. A low-noise oscillation circuit having an oscillation output terminal for controlling the phase shift amount of the voltage-controlled phase shifter by an output of the phase comparator.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1277219A JP2800047B2 (en) | 1989-10-26 | 1989-10-26 | Low noise oscillation circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1277219A JP2800047B2 (en) | 1989-10-26 | 1989-10-26 | Low noise oscillation circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH03140030A JPH03140030A (en) | 1991-06-14 |
| JP2800047B2 true JP2800047B2 (en) | 1998-09-21 |
Family
ID=17580474
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1277219A Expired - Lifetime JP2800047B2 (en) | 1989-10-26 | 1989-10-26 | Low noise oscillation circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2800047B2 (en) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06291645A (en) * | 1993-03-31 | 1994-10-18 | Nec Corp | Frequency synthesizer |
| JP2768645B2 (en) * | 1995-01-19 | 1998-06-25 | 日本無線株式会社 | Delay detection circuit for low noise oscillation circuit |
| US7501905B2 (en) * | 2006-12-13 | 2009-03-10 | Advantest Corporation | Oscillator circuit, PLL circuit, semiconductor chip, and test apparatus |
| JP4528870B1 (en) * | 2009-06-05 | 2010-08-25 | 日本高周波株式会社 | Magnetron oscillation apparatus and plasma processing apparatus |
| FR2967500B1 (en) * | 2010-11-12 | 2013-08-16 | St Microelectronics Sa | DEVICE FOR TRANSMITTING / RECEIVING RADAR WAVES |
| JP5753826B2 (en) * | 2012-09-06 | 2015-07-22 | アンリツ株式会社 | Microwave signal generator and frequency control method thereof |
-
1989
- 1989-10-26 JP JP1277219A patent/JP2800047B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH03140030A (en) | 1991-06-14 |
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