JPH03109778A - Semiconductor device and manufacture thereof - Google Patents
Semiconductor device and manufacture thereofInfo
- Publication number
- JPH03109778A JPH03109778A JP24763989A JP24763989A JPH03109778A JP H03109778 A JPH03109778 A JP H03109778A JP 24763989 A JP24763989 A JP 24763989A JP 24763989 A JP24763989 A JP 24763989A JP H03109778 A JPH03109778 A JP H03109778A
- Authority
- JP
- Japan
- Prior art keywords
- heat treatment
- manufacturing
- semiconductor substrate
- temperature
- etching
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 60
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 40
- 239000000758 substrate Substances 0.000 claims abstract description 72
- 238000005530 etching Methods 0.000 claims abstract description 34
- 238000010438 heat treatment Methods 0.000 claims description 80
- 238000000034 method Methods 0.000 claims description 48
- 239000001301 oxygen Substances 0.000 claims description 47
- 229910052760 oxygen Inorganic materials 0.000 claims description 47
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 46
- 239000012298 atmosphere Substances 0.000 claims description 23
- 239000012299 nitrogen atmosphere Substances 0.000 claims description 23
- 239000007789 gas Substances 0.000 claims description 11
- 239000000463 material Substances 0.000 claims description 8
- 125000001309 chloro group Chemical group Cl* 0.000 claims description 6
- 239000007788 liquid Substances 0.000 claims description 6
- 230000002093 peripheral effect Effects 0.000 claims description 3
- 238000012545 processing Methods 0.000 claims description 3
- 229910052710 silicon Inorganic materials 0.000 abstract description 28
- 239000010703 silicon Substances 0.000 abstract description 28
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 27
- 239000013078 crystal Substances 0.000 abstract description 17
- 230000007547 defect Effects 0.000 abstract description 12
- 125000004430 oxygen atom Chemical group O* 0.000 abstract description 10
- 229910052799 carbon Inorganic materials 0.000 abstract description 8
- 125000004432 carbon atom Chemical group C* 0.000 abstract description 6
- 230000002950 deficient Effects 0.000 abstract 3
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 23
- 238000009792 diffusion process Methods 0.000 description 12
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 10
- 229920002120 photoresistant polymer Polymers 0.000 description 10
- 229910000041 hydrogen chloride Inorganic materials 0.000 description 8
- IXCSERBJSXMMFS-UHFFFAOYSA-N hydrogen chloride Substances Cl.Cl IXCSERBJSXMMFS-UHFFFAOYSA-N 0.000 description 8
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 7
- 230000003647 oxidation Effects 0.000 description 7
- 238000007254 oxidation reaction Methods 0.000 description 7
- 239000002244 precipitate Substances 0.000 description 6
- 229910052814 silicon oxide Inorganic materials 0.000 description 6
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 5
- 229910052581 Si3N4 Inorganic materials 0.000 description 5
- 229910052782 aluminium Inorganic materials 0.000 description 5
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 5
- 230000000694 effects Effects 0.000 description 5
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 5
- 239000000243 solution Substances 0.000 description 5
- OAKJQQAXSVQMHS-UHFFFAOYSA-N Hydrazine Chemical compound NN OAKJQQAXSVQMHS-UHFFFAOYSA-N 0.000 description 4
- 238000010521 absorption reaction Methods 0.000 description 4
- 238000004380 ashing Methods 0.000 description 4
- 229910052906 cristobalite Inorganic materials 0.000 description 4
- 229910000040 hydrogen fluoride Inorganic materials 0.000 description 4
- 239000012535 impurity Substances 0.000 description 4
- 238000005468 ion implantation Methods 0.000 description 4
- 238000005459 micromachining Methods 0.000 description 4
- QTBSBXVTEAMEQO-UHFFFAOYSA-N Acetic acid Chemical compound CC(O)=O QTBSBXVTEAMEQO-UHFFFAOYSA-N 0.000 description 3
- ZAMOUSCENKQFHK-UHFFFAOYSA-N Chlorine atom Chemical compound [Cl] ZAMOUSCENKQFHK-UHFFFAOYSA-N 0.000 description 3
- KWYUFKZDYYNOTN-UHFFFAOYSA-M Potassium hydroxide Chemical compound [OH-].[K+] KWYUFKZDYYNOTN-UHFFFAOYSA-M 0.000 description 3
- 239000000460 chlorine Substances 0.000 description 3
- 229910052801 chlorine Inorganic materials 0.000 description 3
- 230000007423 decrease Effects 0.000 description 3
- 238000002474 experimental method Methods 0.000 description 3
- 150000002926 oxygen Chemical class 0.000 description 3
- 239000012495 reaction gas Substances 0.000 description 3
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 2
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 description 2
- 238000004566 IR spectroscopy Methods 0.000 description 2
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 2
- 238000000137 annealing Methods 0.000 description 2
- 239000007864 aqueous solution Substances 0.000 description 2
- 125000004429 atom Chemical group 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- YCIMNLLNPGFGHC-UHFFFAOYSA-N catechol Chemical compound OC1=CC=CC=C1O YCIMNLLNPGFGHC-UHFFFAOYSA-N 0.000 description 2
- 238000011161 development Methods 0.000 description 2
- 229910001873 dinitrogen Inorganic materials 0.000 description 2
- 238000000206 photolithography Methods 0.000 description 2
- 238000001953 recrystallisation Methods 0.000 description 2
- 229910021642 ultra pure water Inorganic materials 0.000 description 2
- 239000012498 ultrapure water Substances 0.000 description 2
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 2
- 229910001868 water Inorganic materials 0.000 description 2
- UOCLXMDMGBRAIB-UHFFFAOYSA-N 1,1,1-trichloroethane Chemical compound CC(Cl)(Cl)Cl UOCLXMDMGBRAIB-UHFFFAOYSA-N 0.000 description 1
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- 229910015900 BF3 Inorganic materials 0.000 description 1
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- 208000032544 Cicatrix Diseases 0.000 description 1
- PIICEJLVQHRZGT-UHFFFAOYSA-N Ethylenediamine Chemical compound NCCN PIICEJLVQHRZGT-UHFFFAOYSA-N 0.000 description 1
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 1
- XSTXAVWGXDQKEL-UHFFFAOYSA-N Trichloroethylene Chemical group ClC=C(Cl)Cl XSTXAVWGXDQKEL-UHFFFAOYSA-N 0.000 description 1
- 238000004220 aggregation Methods 0.000 description 1
- 230000002776 aggregation Effects 0.000 description 1
- 229910021529 ammonia Inorganic materials 0.000 description 1
- 238000002048 anodisation reaction Methods 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- WTEOIRVLGSZEPR-UHFFFAOYSA-N boron trifluoride Chemical compound FB(F)F WTEOIRVLGSZEPR-UHFFFAOYSA-N 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- MROCJMGDEKINLD-UHFFFAOYSA-N dichlorosilane Chemical compound Cl[SiH2]Cl MROCJMGDEKINLD-UHFFFAOYSA-N 0.000 description 1
- 239000006185 dispersion Substances 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 238000001035 drying Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005247 gettering Methods 0.000 description 1
- 229910001385 heavy metal Inorganic materials 0.000 description 1
- 239000001307 helium Substances 0.000 description 1
- 229910052734 helium Inorganic materials 0.000 description 1
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 238000007689 inspection Methods 0.000 description 1
- 229910017604 nitric acid Inorganic materials 0.000 description 1
- 239000008188 pellet Substances 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 239000000047 product Substances 0.000 description 1
- 238000004451 qualitative analysis Methods 0.000 description 1
- 238000004445 quantitative analysis Methods 0.000 description 1
- 102220043690 rs1049562 Human genes 0.000 description 1
- 231100000241 scar Toxicity 0.000 description 1
- 230000037387 scars Effects 0.000 description 1
- 150000003376 silicon Chemical class 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 238000000992 sputter etching Methods 0.000 description 1
- 238000003756 stirring Methods 0.000 description 1
- 230000002195 synergetic effect Effects 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
- FAQYAMRNWDIXMY-UHFFFAOYSA-N trichloroborane Chemical compound ClB(Cl)Cl FAQYAMRNWDIXMY-UHFFFAOYSA-N 0.000 description 1
- UBOXGVDOUJQMTN-UHFFFAOYSA-N trichloroethylene Natural products ClCC(Cl)Cl UBOXGVDOUJQMTN-UHFFFAOYSA-N 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
- 238000005406 washing Methods 0.000 description 1
Landscapes
- Pressure Sensors (AREA)
Abstract
Description
【発明の詳細な説明】
［産業上の利用分野］
本発明はたとえば圧力センサ等の半導体装置及びその製
造方法に関し、特に半導体基板をエツチング加工した際
に露出面に生ずるいわゆるマイクロピラミッドと称され
る突起物を除去した半導体装置及びその製造方法に関す
る。[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a semiconductor device such as a pressure sensor, and a method for manufacturing the same, and in particular, it relates to a semiconductor device such as a pressure sensor, and a method for manufacturing the same. The present invention relates to a semiconductor device from which protrusions have been removed and a method for manufacturing the same.
［従来の技術］
従来、半導体装置たとえば圧力センサは第６図に示すよ
うに、拡散抵抗層２１および絶縁膜２２に形成したコン
タクトホール２３を介して拡散抵抗層２１に電気的に接
続された電極２４を有する感応部２５と、該感応部２５
の周縁部を支持する支持部２６とを備えた構成となって
いる。[Prior Art] Conventionally, as shown in FIG. 6, a semiconductor device such as a pressure sensor has an electrode electrically connected to a diffused resistive layer 21 through a contact hole 23 formed in a diffused resistive layer 21 and an insulating film 22. a sensing section 25 having a sensing section 24;
It has a structure including a support part 26 that supports the peripheral edge of.
ところで、従来、この圧力センサを微細加工するとき、
水酸化カリウム（ＫＯ）り 、ヒドラジン、ピロカテコ
ール中エチレンジアミン等の結晶軸異方性エツチング液
が使用されていたが、加工された感応部２５の底面には
四角錐や三角錐の突起物（以下、マイクロピラミッドと
いう）２７が現われて凹凸の無い綺麗な底面を得ること
ができなかった。By the way, conventionally, when microfabricating this pressure sensor,
A crystal axis anisotropic etching solution such as potassium hydroxide (KO), hydrazine, or ethylenediamine in pyrocatechol was used. , micropyramids) 27 appeared, making it impossible to obtain a clean bottom surface with no irregularities.
この対策として、従来ではエツチングが終わった後、等
方性エツチング液としてフッ化水素（ＨＦ）：硝酸（Ｈ
ＮＯｓ ）：酢酸（Ｃ）１３ Ｃ００Ｈ）＝１ ：２：
１の溶液を用いてマイクロピラミッド２７の白部分を
丸くする方法があった。またエツチング時に発生する泡
が付着してエツチング速度に異差が生じ、その結果突起
物ができると考えられることから、異方性エツチング液
に表面活性剤としてアルコールを加えたり、スターラー
や窒素（Ｎ２）ガスで異方性エツチング液をかき回すこ
とでマイクロピラミッド２７の発生を防ぐ方法があった
。As a countermeasure against this problem, in the past, after etching was completed, an isotropic etching solution was used containing hydrogen fluoride (HF) and nitric acid (H
NOs):acetic acid (C)13C00H)=1:2:
There was a method of rounding the white part of the micropyramid 27 using the solution No. 1. It is also thought that the bubbles generated during etching may adhere and cause differences in the etching speed, resulting in the formation of protrusions. ) There is a method of preventing the generation of micropyramids 27 by stirring the anisotropic etching solution with gas.
［発明が解決しようとする課題］
しかしながら、上述の従来の方法はいずれも十分ではな
く、エツチング加工面においてマイクロピラミッド２７
の除去を完全に行うことはできなかった。[Problems to be Solved by the Invention] However, none of the above-mentioned conventional methods is sufficient, and the micropyramid 27 is
could not be completely removed.
本発明はかかる問題点に鑑みてなされたものであって、
エツチング加工に伴い発生するマイクロピラミッドの発
生を根本的に除去することができるとともに、機械的強
度が強く、しかも電気的特性が向上し、製造歩留まりの
向上した半導体装置及びその製造方法を提供することを
目的とする。The present invention has been made in view of such problems, and includes:
To provide a semiconductor device and its manufacturing method that can fundamentally eliminate the generation of micropyramids that occur due to etching processing, have strong mechanical strength, improved electrical characteristics, and improved manufacturing yield. With the goal.
［課題を解決するための手段］
上記課題を解決するために本発明に係る半導体基板にお
いては、エツチング加工により素子が形成される半導体
基板であって、前記素子の形成予定領域の当該基板の表
面から少な（とも前記エツチング加工により露出する面
を含む領域にわたって無欠陥層を備えたことを特徴とす
るものである。[Means for Solving the Problems] In order to solve the above problems, a semiconductor substrate according to the present invention is a semiconductor substrate on which an element is formed by etching, and the surface of the substrate in a region where the element is to be formed. It is characterized by having a defect-free layer over a region including a surface exposed by the etching process.
また本発明に係る半導体装置は、半導体基板と、該半導
体基板にエツチング加工により形成された素子と、該素
子の当該基板の表面から少なくとも前記エツチング加工
により露出する面を含む領域にわたって形成された無欠
陥層とを備えたことを特徴とする。Further, a semiconductor device according to the present invention includes a semiconductor substrate, an element formed on the semiconductor substrate by etching, and a blank formed over a region of the element from the surface of the substrate to at least a surface exposed by the etching. It is characterized by comprising a defect layer.
さらに本発明に係る圧力センサは、一導電型の半導体材
料により形成されるとともに前記半導体材料と導電型が
異なる拡散抵抗層を有し、外部圧力により当該拡散抵抗
層の抵抗値が変化する感応部と５該感応部の周縁部を支
持する支持部とを備え、前記感応部がエツチング加工に
より形成された圧力センサであって、前記感応部の表面
から少なくともエツチング加工により露出する面を含む
領域にわたって無欠陥層を備えたことを特徴とするもの
である。Furthermore, the pressure sensor according to the present invention has a sensing portion that is formed of a semiconductor material of one conductivity type and has a diffusion resistance layer having a conductivity type different from that of the semiconductor material, and the resistance value of the diffusion resistance layer changes depending on external pressure. and (5) a support part that supports a peripheral edge of the sensitive part, the sensitive part being formed by etching, and extending over an area including at least a surface exposed by the etching from the surface of the sensitive part. It is characterized by having a defect-free layer.
また、本発明に係る半導体基板の製造方法は、窒素雰囲
気中で前記半導体基板に第１の温度の加熱処理を施す第
１の熱処理工程と、第１の熱処理工程の後、酸素雰囲気
中において前記第１の温度より低い第２の温度で加熱処
理を施すことにより前記半導体基板の表面から所定の深
さ領域にわたって無欠陥層を形成する第２の熱処理工程
とを含むことを特徴とする特に第１の温度は１０５０〜
１１５０℃、第２の温度は６００〜１０００℃の範囲の
温度であることが好ましい。Further, the method for manufacturing a semiconductor substrate according to the present invention includes a first heat treatment step of subjecting the semiconductor substrate to a heat treatment at a first temperature in a nitrogen atmosphere; and a second heat treatment step of forming a defect-free layer over a predetermined depth region from the surface of the semiconductor substrate by performing heat treatment at a second temperature lower than the first temperature. The temperature of 1 is 1050 ~
Preferably, the temperature is 1150°C, and the second temperature is in the range of 600 to 1000°C.
さらに本発明に係る半導体基板の製造方法は、塩素原子
を含むガスまたは液体雰囲気中において６００〜１１０
０℃の加熱処理を施す工程を含むことを特徴とし、また
前記第２の熱処理工程の後、塩素原子を含むガスまたは
液体雰囲気中において６００〜１１００℃の加熱処理を
施すことを特徴とするものである。Further, in the method for manufacturing a semiconductor substrate according to the present invention, a temperature of 600 to 110
It is characterized by including a step of performing heat treatment at 0°C, and further characterized by performing heat treatment at 600 to 1100°C in a gas or liquid atmosphere containing chlorine atoms after the second heat treatment step. It is.
また、本発明に係る半導体基板の製造方法においては、
前記第２の熱処理工程の後、窒素雰囲気中において６０
０〜１２００℃の加熱処理を施す工程をさらに含むこと
を特徴とし、さらに前記窒素雰囲気中の加熱処理の工程
の後、前記塩素雰囲気中での加熱処理を施す工程を含む
ことを特徴とするものである。Furthermore, in the method for manufacturing a semiconductor substrate according to the present invention,
After the second heat treatment step, the heat treatment was performed for 60 minutes in a nitrogen atmosphere.
It is characterized by further comprising a step of performing heat treatment at 0 to 1200°C, and further comprising a step of performing heat treatment in the chlorine atmosphere after the step of heat treatment in the nitrogen atmosphere. It is.
また本発明に係る半導体装置の製造方法は、窒素雰囲気
中で前記半導体基板に第１の温度の加熱処理を施す第１
の熱処理工程と、第１の熱処理工程の後、酸素雰囲気中
において前記第１の温度より低い第２の温度で加熱処理
を施すことにより前記半導体基板の表面から所定の深さ
領域にわたって無欠陥層を形成する第２の熱処理工程と
、前記無欠陥層が露出するまで選択的にエツチング加工
を行い素子を形成する工程とを含むことを特徴とする特
に第１の温度は１０５０〜１１５０℃、第２の温度は６
００〜１ｏｏｏ℃の範囲の温度であることが好ましい。Further, the method for manufacturing a semiconductor device according to the present invention includes a first step in which the semiconductor substrate is subjected to a heat treatment at a first temperature in a nitrogen atmosphere.
After the first heat treatment step, heat treatment is performed at a second temperature lower than the first temperature in an oxygen atmosphere to form a defect-free layer over a predetermined depth region from the surface of the semiconductor substrate. and a step of selectively etching until the defect-free layer is exposed to form the element. In particular, the first temperature is 1050 to 1150°C; The temperature of 2 is 6
Preferably, the temperature is in the range of 00 to 100°C.
さらに本発明に係る半導体装置の製造方法は、塩素原子
を含むガスまたは液体雰囲気中において６００−１１０
０℃の加熱処理を施す工程を含むことを特徴とし、また
前記第２の熱処理工程の後、塩素原子を含むガスまたは
液体雰囲気中において６００〜１１００’ｃの加熱処理
を行うことを特徴とするものである。Further, the method for manufacturing a semiconductor device according to the present invention is performed in a gas or liquid atmosphere containing chlorine atoms.
It is characterized by including a step of performing heat treatment at 0°C, and further characterized by performing heat treatment at 600 to 1100'C in a gas or liquid atmosphere containing chlorine atoms after the second heat treatment step. It is something.
また、本発明に係る半導体装置の製造方法においては、
前記第２の熱処理工程の後、−窒素雰囲気中において６
００−１２００℃の加熱処理を施す工程をさらに含むこ
とを特徴とし、さらに前記窒素雰囲気中の加熱処理の工
程の後、前記塩素雰囲気中での加熱処理を施す工程を含
むことを特徴とするものである。Furthermore, in the method for manufacturing a semiconductor device according to the present invention,
After the second heat treatment step, -6 in a nitrogen atmosphere.
It is characterized by further comprising a step of performing heat treatment at 00-1200°C, and further comprising a step of performing heat treatment in the chlorine atmosphere after the step of heat treatment in the nitrogen atmosphere. It is.
なお、本発明における「無欠陥層（デヌディット・ゾー
ン）」とは、欠陥が全く無い層だけでなく、結晶軸異方
性エツチングにより実質的にマイクロピラミッドが生じ
ない層も含むものであり、具体的には半導体材料の原子
と原子との結晶定数より大きな欠陥が無い層である。Note that the term "defect-free layer (denuded zone)" in the present invention includes not only a layer with no defects but also a layer in which micropyramids are not substantially formed due to crystal axis anisotropic etching. Specifically, it is a layer that does not have defects larger than the crystal constant between atoms of the semiconductor material.
［作 用］
本発明者は前述のマイクロピラミッドの発生原因がシリ
コン基板中に存在する炭素（Ｃ）や酸素（０）原子に起
因すると判断し、各種実験を行い確信した。すなわち、
圧力センサやマイクロマシニング素子の製作過程におい
て、高温での熱処理でシリコン基板内にある炭素（Ｃ）
原子が核となり、周辺にある酸素（０）原子を寄せ集め
て結晶欠陥を造る。このとき結晶格子にも僅かな歪が入
り、このため結晶軸異方性エツチングの速度に異差な生
じ、マイクロピラミッドを形成するものと考えた。[Function] The inventor of the present invention determined that the cause of the above-mentioned micropyramid is caused by carbon (C) and oxygen (0) atoms present in the silicon substrate, and conducted various experiments to become convinced. That is,
In the manufacturing process of pressure sensors and micromachining elements, carbon (C) in silicon substrates is removed by heat treatment at high temperatures.
The atom acts as a nucleus and gathers surrounding oxygen (0) atoms to create crystal defects. At this time, the crystal lattice is also slightly strained, which is thought to cause a difference in the rate of crystal axis anisotropic etching, resulting in the formation of micropyramids.
したがって、その対策として、圧力センサやマイクロマ
シニング素子がシリコン基板の表面から５０μｍの深さ
を主に使用することから、シリコン基板表面から約１０
０μｍの深さ領域に炭素原子および酸素原子が存在せず
、結晶欠陥のない無欠陥層（デヌーディット・ゾーン）
を設ければ、この部分にはマイクロピラミッドが発生し
なくなる。Therefore, as a countermeasure, since pressure sensors and micromachining elements mainly use a depth of 50 μm from the surface of the silicon substrate,
Defect-free layer (denuded zone) with no carbon atoms or oxygen atoms and no crystal defects in the 0 μm depth region
If this is provided, micropyramids will not occur in this area.
現在のシリコン基板製造技術では酸素濃度や炭素濃度を
ある程度制御できるところまで来ているが、酸素濃度を
極端に減らすとシリコン基板に反りが現われたり、基板
自身が脆くなったりする欠点が出て（る。このため各社
酸素濃度に関しては、５×１０１７〜５×１０１ｓ個／
ｃｍ ３程度を指定して購入している。Current silicon substrate manufacturing technology has reached the point where it is possible to control the oxygen and carbon concentrations to a certain extent, but if the oxygen concentration is drastically reduced, the silicon substrate may warp or become brittle. For this reason, each company's oxygen concentration is 5 x 1017 to 5 x 101 s/
I purchased it by specifying about 3 cm.
一方、炭素濃度は低ければ低いほど良いが、単結晶を造
るときの器やヒータから炭素のドーピングがあるため全
く零にすることはできない。On the other hand, the lower the carbon concentration, the better, but it cannot be reduced to zero because carbon is doped from the vessels and heaters used to produce single crystals.
このようにシリコン基板の中にはどうしても酸素原子や
炭素原子が含まれるので、製品を造るプロセスの中で減
少させる対策を講じる必要がある。In this way, silicon substrates inevitably contain oxygen and carbon atoms, so it is necessary to take measures to reduce them during the product manufacturing process.
本発明者は炭素原子が熱処理ではなかなか動かないので
、炭素原子に関してはその含有量が低い基板材料を購入
することで炭素原子の低減につとめ、酸素原子を素子の
製造プロセスの中で低減することを考えた。酸素原子の
低減方法には、２段熱処理による追い出し拡散法と、塩
化水素酸ガスでシリコンを酸化する塩酸酸化法の２つの
方法がある。以下、これらの方法についてそれぞれ説明
する。Since carbon atoms do not move easily during heat treatment, the present inventor made efforts to reduce carbon atoms by purchasing substrate materials with a low content of carbon atoms, and to reduce oxygen atoms during the device manufacturing process. I thought about it. There are two methods for reducing oxygen atoms: an expulsion diffusion method using two-stage heat treatment, and a hydrochloric acid oxidation method in which silicon is oxidized with hydrochloric acid gas. Each of these methods will be explained below.
（Ｉ）追い出し拡散法
シリコン基板に存在する酸素原子の状態は次の４つの形
態で存在する。(I) Expulsion Diffusion Method Oxygen atoms exist in the following four states in a silicon substrate.
■侵入型酸素（ｉｎｔｅｒｓｔｉｓｉａｌ ｏｘｙｇｅ
ｎ）■置換型酸素（ｓｕｂｓｔｉｔｕｓｉｏｎａｌ ｏ
ｘｙｇｅｎ）■クリストバライト（Ｃｒｉｓｔｏｂａｌ
ｉｔｅ、Ｇｒｏｗｎ ｉｎ Ｓ ｉ ０２
）■析出酸素（ａｇｇｒｅｇａｔｅ ｏｘｙｇｅｎ）
これらの酸素は高温の中に放置すると拡散を始め、最後
にはシリコン基板から大気の中に抜は出す。■Interstitial oxygen
n) ■ Substitutional oxygen
xygen)■Cristobalite
ite, Grown in S i 02
) ■ Aggregate oxygen
When these oxygens are left in high temperatures, they begin to diffuse and are eventually extracted from the silicon substrate into the atmosphere.
この様子を赤外吸収分光分析方法で調べてみると、酸素
原子の存在状態が変化するのが判かる。赤外吸収分光分
析には置換型酸素や析出酸素はひっかかってこないので
分析できないが、侵入型酸素はｌ１０６ｃｍ−”にシリ
コン（Ｓｉ）−酸素（０）のストレッチング波形、５１
５ｃｍ−’にベンディングの吸収波形が現われ、クリス
トバライトは１２２５ｃｍ−’に吸収波形が現われる。When this situation is investigated using infrared absorption spectroscopy, it can be seen that the state of existence of oxygen atoms changes. Substitutional oxygen and precipitated oxygen cannot be analyzed because they are not caught in infrared absorption spectroscopy, but interstitial oxygen can be analyzed using the silicon (Si)-oxygen (0) stretching waveform at 1106cm-'', 51
An absorption waveform of bending appears at 5 cm-', and an absorption waveform of cristobalite appears at 1225 cm-'.
これらの波形の深さは酸素の数に比例するので定量分析
にも定性分析にも利用できる。シリコン基板を１０００
℃以下の低温で熱処理すると、酸素は炭素や格子歪を核
として析出し、酸素クラスター状態となりそれが小さい
ときはクリストバライト等ができ、このため１２２５ｃ
ｍ−’にクリストバライト・フェーズの吸収波形を見る
ことができる。Since the depth of these waveforms is proportional to the number of oxygen atoms, they can be used for both quantitative and qualitative analysis. 1000 silicon substrates
When heat treated at a low temperature below ℃, oxygen precipitates with carbon and lattice strain as nuclei, forming an oxygen cluster state, and when it is small, cristobalite etc. are formed.
The cristobalite phase absorption waveform can be seen at m-'.
もっと酸素の集合が太き（なると酸素沈殿物となり結晶
格子に歪を与え赤外線吸収波形は見えなくなる。この結
晶格子歪がマイクロピラミッド、マイクロクラック、転
移を形成し、シリコン中に含まれる重金属などの不純物
なゲッタリングすることにもなる。If the aggregation of oxygen becomes thicker (then it becomes oxygen precipitate, which distorts the crystal lattice and makes the infrared absorption waveform invisible. This crystal lattice distortion forms micropyramids, microcracks, and dislocations, and the heavy metals contained in silicon It also results in impurity gettering.
また代りに入った酸素は四酸化ケイ素（ＳｉＯ，）の形
で、ドナーとしての不純物準位を造る。このため抵抗値
の変化を測定して酸素濃度を調べることができるが、こ
の置換酸素は５００〜６５０℃の熱処理で簡単に消滅し
、酸素は析出したり隙間に入ったりする。Also, the substituted oxygen creates an impurity level as a donor in the form of silicon tetroxide (SiO). Therefore, the oxygen concentration can be determined by measuring the change in resistance value, but this substituted oxygen is easily eliminated by heat treatment at 500 to 650° C., and oxygen precipitates or enters the gaps.
このように酸素原子の存在形態が熱処理によって変化を
するが、シリコン基板表面付近では回りの雰囲気中の酸
素原子が十分でない場合は、基板から大気の中に酸素原
子が飛び出し、基板表面に欠陥の少ない無欠陥層を形成
する。この無欠陥層は熱処理の終ったシリコン基板を角
度研磨して、角度面をライト・エツチングすることによ
り観察することができる。In this way, the existence form of oxygen atoms changes due to heat treatment, but if there are not enough oxygen atoms in the surrounding atmosphere near the silicon substrate surface, oxygen atoms will fly out from the substrate into the atmosphere, causing defects on the substrate surface. Forms a defect-free layer with few defects. This defect-free layer can be observed by angle-polishing the heat-treated silicon substrate and light etching the angle surface.
第２図はＰ型シリコン基板（比抵抗ρ＝１００〜４００
Ω・ｃｆｆＩ）に、１１００℃の窒素雰囲気中において
熱処理を施した場合の、熱処理時間と無欠陥層の深さと
の関係を示すもので、実線は１１００℃の蒸気酸化を３
回（−回当り１時間）、破線は４回行った結果を示すも
のである。Figure 2 shows a P-type silicon substrate (specific resistance ρ = 100 to 400).
Ω・cffI) is heat treated in a nitrogen atmosphere at 1100°C, and the solid line shows the relationship between the heat treatment time and the depth of the defect-free layer.
(−1 hour per time), the broken line shows the results of 4 times.
この実験結果によると、基板中に含まれる酸素濃度は一
定で、加熱時間とともに基板表面の酸素濃度が減少して
行き、ガウスの方程式に良く一致することが確かめられ
た。すなわち無欠陥層の深さは、この方程式を解いて求
めることができる。According to the results of this experiment, it was confirmed that the oxygen concentration contained in the substrate was constant, and the oxygen concentration on the substrate surface decreased with heating time, which closely matched Gauss's equation. That is, the depth of the defect-free layer can be determined by solving this equation.
２段階熱処理を行う目的は、次のように説明することが
できる。The purpose of performing the two-step heat treatment can be explained as follows.
酸素雰囲気での低温処理（６００〜１０００℃）におい
ては、侵入した酸素が炭素や結晶空孔などを核にして酸
素をクラスター状に集合させて析出させたり、追い出し
拡散で酸素を基板から追い出す働きをさせることにある
。またその相乗効果で酸素濃度を減少させるものである
。During low-temperature treatment (600 to 1000°C) in an oxygen atmosphere, the invading oxygen acts to collect oxygen in clusters and precipitate using carbon and crystal vacancies as nuclei, or to expel oxygen from the substrate by expulsion diffusion. The goal is to make people do what they want. The synergistic effect also reduces oxygen concentration.
一方、窒素雰囲気中で行う高温処理（１０５０〜１１５
０℃）においては、析出酸素は分散し、このため酸素濃
度は増えるが、高温のため酸素の拡散定数が太き（なる
ため、基板からの酸素の追い出しが多くなる。追い出し
拡散は温度が上がれば上がるほど多（なるので、分散に
よる増加分を差し引いた分だけ酸素濃度は減少し、基板
表面に無酸素層を造ることになる。On the other hand, high temperature treatment (1050 to 115
At 0°C), the precipitated oxygen is dispersed, which increases the oxygen concentration, but due to the high temperature, the oxygen diffusion constant becomes thicker, so more oxygen is expelled from the substrate. As the concentration increases, the oxygen concentration decreases by an amount equal to the increase due to dispersion, and an oxygen-free layer is created on the substrate surface.
低温→高温のプロセスでは、最初に酸素沈殿物や析出物
を造った後で酸素を追い出し拡散させることになるので
クラスター状の酸素が抜けた後が傷跡として残り、後に
行う高温処理では修復されないで結晶欠陥となる。これ
はサートル・エツチングで観察することができる。In the low-temperature → high-temperature process, oxygen precipitates and precipitates are first created and then the oxygen is expelled and diffused, leaving behind scars after the oxygen clusters are removed, which cannot be repaired by the subsequent high-temperature treatment. It becomes a crystal defect. This can be observed in the subtle etching.
すなわち、基板表面に無欠陥層を造り、マイクロピラミ
ッドを造らないという目的からすれば、高温→低温の順
序の２段階熱処理プロセスが良いことになる。That is, for the purpose of creating a defect-free layer on the substrate surface and not creating micropyramids, a two-step heat treatment process in the order of high temperature → low temperature is better.
第３図はこのプロセスの実験結果を示すもので、高温の
第１回の熱処理を施した後、低温の第２回の熱処理を行
うと（高温→低温プロセス）、シリコン基板の酸素濃度
が減少する。さらにその後、高温の第３回熱処理を施す
と（低温→高温プロセス）、−時酸素は増加するが、結
果的には減少する。しかし、このプロセスでは酸素が抜
けた後が欠陥として残っている。Figure 3 shows the experimental results of this process. After the first heat treatment at high temperature is performed, the second heat treatment at low temperature is performed (high temperature → low temperature process), the oxygen concentration of the silicon substrate decreases. do. Furthermore, when a third heat treatment at a high temperature is performed after that (low temperature→high temperature process), oxygen increases at - time, but eventually decreases. However, in this process, defects remain after the oxygen is removed.
（ＩＩ）塩酸酸化法
圧力センサやマイクロマシニング素子を造るときイオン
注入法を用いるのは常となっている。イオン注入を用い
るプロセスでは線欠陥の中でも特に積層欠陥が発生しや
す（、この欠陥もマイクロピラミッド発生の一因となっ
ている。積層欠陥を減少させるには、シリコン基板を高
温中で、塩素原子を持っている塩化水素（ＨＣＩ）、ト
リクロロエチレン（Ｃ２ＨＣｌ２５ ）、 トリクロ
ロエタン（Ｃ，Ｈ，Ｃβ３）等のガスや液体の雰囲気に
曝せばよい。(II) Hydrochloric acid oxidation method Ion implantation is commonly used when manufacturing pressure sensors and micromachining elements. In processes that use ion implantation, stacking faults are particularly likely to occur among line defects (these defects also contribute to the generation of micropyramids. To reduce stacking faults, the silicon substrate is exposed to chlorine atoms at high temperatures). It may be exposed to an atmosphere of a gas or liquid such as hydrogen chloride (HCI), trichloroethylene (C2HCl25), or trichloroethane (C,H,Cβ3), which has the following properties.
第４図は塩化水素ガスの濃度を０．５％と３％、熱処理
温度を１１００℃と１２００℃にそれぞれ設定した場合
の熱処理時間と積層欠陥の長さとの関係を示すものであ
る。実験は塩化水素ガスに限って行ったが、その結果、
熱処理温度が高（て塩化水素濃度が高いほど積層欠陥の
縮小効果が大きいことが判った。但し、１１５０℃以上
の温度ではシリコン基板がエツチングされ、素子の破壊
が起きるので、１１００°Ｃ以下の温度とすることが好
ましい。また、６００℃未満の温度では積層欠陥の縮小
効果は殆どないので、６００℃以上とすることが好まし
い。さらに塩化水素の濃度は３％以下ではやはりエツチ
ングされ、シリコン基板表面が荒れてくる。FIG. 4 shows the relationship between the heat treatment time and the length of stacking faults when the hydrogen chloride gas concentration was set at 0.5% and 3% and the heat treatment temperature was set at 1100° C. and 1200° C., respectively. The experiment was limited to hydrogen chloride gas, but the results were as follows.
It was found that the higher the heat treatment temperature (and the higher the hydrogen chloride concentration), the greater the stacking fault reduction effect. Furthermore, since there is almost no effect of reducing stacking faults at a temperature below 600°C, it is preferable to set the temperature above 600°C.Furthermore, if the concentration of hydrogen chloride is below 3%, the silicon substrate will be etched. The surface becomes rough.
次に、第５図は熱処理時間と積層欠陥の長さの関係を、
酸素雰囲気中と窒素雰囲気中において行った結果を示す
ものである。Next, Figure 5 shows the relationship between heat treatment time and stacking fault length.
The results are shown in an oxygen atmosphere and a nitrogen atmosphere.
この結果、窒素雰囲気中では積層欠陥の縮小効果はある
が、酸素雰囲気中では無いことが判った。As a result, it was found that stacking faults were reduced in a nitrogen atmosphere, but not in an oxygen atmosphere.
このようなことから、本発明者は上記２段熱処理法およ
び塩酸酸化法、さらに窒素雰囲気中での熱処理を組み合
わせることが一マイクロピラミッド発生防止のために最
も効果的であることを見出した。この工程の一例を下記
に示す。For these reasons, the present inventors have found that the combination of the two-stage heat treatment method, the hydrochloric acid oxidation method, and the heat treatment in a nitrogen atmosphere is most effective for preventing the generation of micropyramids. An example of this process is shown below.
洗浄→高温処理（１１００℃、窒素雰囲気、２０時間）
→低温処理（６５０℃、ドライ酸素雰囲気、１６時間）
→イオン注入（１１５ＫｅＶ、隣、２ Ｘ １０ ”ｔ
ｏｎｓ／ａｍ２．１０μＡ）−再結晶（６００℃、窒素
雰囲気、１時間）→熱処理（１１００℃、窒素雰囲気、
５０分）→塩酸酸化（１１００℃、ドライ酸素＋塩化水
素（３％）、６０分）
このように上記本発明の方法によれば、基板の表面から
所定の深さまで無欠陥層を容易に形成することができる
とともに積層欠陥を縮小させることができるので、エッ
チレグ加工の際にマイクロピラミッドの発生を防止する
ことができ、凹凸のない奇麗な面を得ることができる。Cleaning → High temperature treatment (1100℃, nitrogen atmosphere, 20 hours)
→Low temperature treatment (650℃, dry oxygen atmosphere, 16 hours)
→Ion implantation (115KeV, next, 2 x 10”t
ons/am2.10 μA) - Recrystallization (600°C, nitrogen atmosphere, 1 hour) → Heat treatment (1100°C, nitrogen atmosphere,
50 minutes) → Hydrochloric acid oxidation (1100°C, dry oxygen + hydrogen chloride (3%), 60 minutes) As described above, according to the method of the present invention, a defect-free layer can be easily formed from the surface of the substrate to a predetermined depth. Since stacking faults can be reduced, the generation of micropyramids can be prevented during etching leg processing, and a clean surface with no irregularities can be obtained.
このため素子特性のバラツキがなくなり、製造歩留まり
が向上するものである。This eliminates variations in device characteristics and improves manufacturing yield.
また、次のような効果も期待できる。すなわち素子部に
おいて結晶歪がないので機械的強度が強くなる。さらに
当該無欠陥層に不純物拡散によりトランジスタやダイオ
ードの能動素子、また抵抗などの受動素子を形成するよ
うにすれば、リーケイジ特性が少な（なり、またセンサ
とＩＣを同一ベレット上に造ると、１０部のノイズが少
な（なり、電気的特性および製造歩留まりが著しく向上
する。Additionally, the following effects can be expected. In other words, since there is no crystal strain in the element portion, the mechanical strength is increased. Furthermore, if active elements such as transistors and diodes, as well as passive elements such as resistors, are formed in the defect-free layer by impurity diffusion, leakage characteristics will be reduced (and if the sensor and IC are fabricated on the same pellet, The electrical characteristics and manufacturing yield are significantly improved.
［実施例］
次に、本発明の具体的な実施例についてピエゾ抵抗型圧
力センサの製造方法を例にして説明する。[Example] Next, a specific example of the present invention will be described using a method of manufacturing a piezoresistive pressure sensor as an example.
先ず、第１図（ａ）に示すように半導体基板、たとえば
（１１０）面を有するＮ型のシリコン基板（抵抗率４〜
８Ω・ｃｍ） １を用意し、このシリコン基板ｌの両面
を清浄化する。次に、無欠陥層（デヌーディット・ゾー
ン）形成のために、同図（ｂ）に示すように温度１１０
０℃の窒素雰囲気中において２０時間の高温加熱処理を
施し、続いて温度６５０℃のドライ酸素雰囲気中におい
て１６時間の低温加熱処理を施す。これによりシリコン
基板ｌの両面にそれぞれ膜厚１０００人の酸化シリコン
（Ｓ ｉ Ｏ□）膜２を形成することができるとともに
、表面から深さ３０μｍ範囲に無欠陥層３を形成するこ
とができる。First, as shown in FIG. 1(a), a semiconductor substrate, for example, an N-type silicon substrate (with a resistivity of 4 to
8Ω・cm) 1 is prepared, and both sides of this silicon substrate 1 are cleaned. Next, in order to form a defect-free layer (denuded zone), the temperature is increased to 110°C as shown in FIG.
A high temperature heat treatment is performed for 20 hours in a nitrogen atmosphere at 0°C, followed by a low temperature heat treatment for 16 hours in a dry oxygen atmosphere at a temperature of 650°C. As a result, a silicon oxide (S i O□) film 2 having a thickness of 1000 μm can be formed on each side of the silicon substrate 1, and a defect-free layer 3 can be formed at a depth of 30 μm from the surface.
次に、拡散抵抗層形成のために、同図（ｃ）に示すよう
に表面に膜厚１．０μｍのフォトレジスト膜４を塗布形
成し、通常のホトリソグラフィーにより拡散抵抗に対応
するパターンを形成する。Next, in order to form a diffused resistance layer, a photoresist film 4 with a thickness of 1.0 μm is coated on the surface as shown in the same figure (c), and a pattern corresponding to the diffused resistance is formed by ordinary photolithography. do.
すなわち結晶軸とのマスク合せの後、露光および現像を
行い、さらに窒素雰囲気中において９０秒間、１４０±
２℃の熱処理（ハードベーキング）を行う。That is, after mask alignment with the crystal axis, exposure and development are performed, and then 140±
Heat treatment (hard baking) at 2°C is performed.
次に、同図（ｄ）に示すように種ガスとしてフッ化ボロ
ン（ＢＦ、）を用いて、エネルギ１００ＫｅＶ、ドーズ
量２ 、 ＯＸ １０ ”１ｏｎｓ／ｃｍ２の条件で酸
化シリコン膜２を介してボロンのイオン注入を行うこと
により拡散抵抗としてのＰ型拡散層５を形成する。Next, as shown in the figure (d), using boron fluoride (BF, ) as a seed gas, boron was injected through the silicon oxide film 2 under the conditions of an energy of 100 KeV, a dose of 2, and OX 10'' 1 ounce/cm2. By performing ion implantation, a P-type diffusion layer 5 as a diffusion resistance is formed.
次に、同図（ｅ）に示すように圧力５．００Ｔｏｒｒ、
高周波電力５００Ｗの条件で、プラズマアッシング（灰
化）を６０秒間行うことにより、上記フォトレジスト膜
４を除去する。続いて、フッ化水素水溶液（ＨＦ ：
Ｈ２０＝ ｌ ：１０）により酸化シリコン膜２の表面
のエッチングを行った後、温度６００℃の窒素雰囲気中
において６０秒間熱処理を施し、再結晶化を図る。さら
に、温度１１００℃の窒素雰囲気中において６０秒間熱
処理（アニール）を施した後、前述の塩酸酸化法により
積層欠陥の縮小を図る。すなわち、温度１１００℃のド
ライ酸素＋塩化水素（３％）のガス雰囲気中において６
０秒間の熱処理を施す。Next, as shown in the same figure (e), the pressure was 5.00 Torr,
The photoresist film 4 is removed by performing plasma ashing (ashing) for 60 seconds under the condition of high frequency power of 500 W. Subsequently, hydrogen fluoride aqueous solution (HF:
After etching the surface of the silicon oxide film 2 using H20=1:10), heat treatment is performed for 60 seconds in a nitrogen atmosphere at a temperature of 600° C. to achieve recrystallization. Furthermore, after heat treatment (annealing) is performed for 60 seconds in a nitrogen atmosphere at a temperature of 1100° C., stacking faults are reduced by the aforementioned hydrochloric acid oxidation method. That is, in a gas atmosphere of dry oxygen + hydrogen chloride (3%) at a temperature of 1100°C, 6
Heat treatment is performed for 0 seconds.
次に、同図（ｆ）に示すように反応ガスとしてジクロル
シラン（Ｓ ｉ ８２ Ｃ１１ｘ ） ＝ １２０±４
ｓｅｃｍ、アンモニア（ＮＨ，）＝４０±２８ＣＣｍを
流し、圧力１７０±ｌ ＯｍＴｏｒｒ、温度７９０±１
０℃、時間５２±５分の条件でＣＶ Ｄ （Ｃｈｅｍｉ
ｃａｌ Ｖａｐｏｕｒ Ｄｅｐｏｓｉｔｉｏｎ）法を行
い、窒化シリコン（Ｓ ｉ ３ Ｎ４ ）膜６を両面の
酸化シリコン膜２上に堆積させる。続いて、当該圧力セ
ンサの感応部（ダイアフラム）を形成するために、同図
（ｇ）に示すように表面に膜厚１．０μｍのフォトレジ
スト膜７を塗布形成し、第１図（Ｃ）の工程と同様に通
常のホトリソグラフィーにより感応部に対応するパター
ンを形成する。Next, as shown in the same figure (f), dichlorosilane (S i 82 C11x ) = 120±4 is used as a reaction gas.
secm, ammonia (NH,) = 40 ± 28 CCm, pressure 170 ± l OmTorr, temperature 790 ± 1
CV D (Chemi
A silicon nitride (S i 3 N4) film 6 is deposited on the silicon oxide film 2 on both sides by a cal vapor deposition method. Subsequently, in order to form the sensitive part (diaphragm) of the pressure sensor, a photoresist film 7 with a thickness of 1.0 μm is coated on the surface as shown in FIG. 1(g), and as shown in FIG. 1(C). A pattern corresponding to the sensitive area is formed by ordinary photolithography in the same manner as in the step.
続いて、同図（ｈ）に示すように反応ガスとして六弗化
イ才つ（ＳＦ、）＝１５０±２ｓｅｃｍを流し、圧力４
００±１０ｍＴｏｒｒの条件でプラズマエツチングを行
い窒化シリコン膜６を選択的に除去する。続いて当該ウ
ェハを硫酸（Ｈ。Subsequently, as shown in FIG.
Plasma etching is performed under conditions of 00±10 mTorr to selectively remove the silicon nitride film 6. Subsequently, the wafer was treated with sulfuric acid (H.
Ｓｏ、）：過酸化水素（Ｈ２０ｘ ） ＝２ ： １の
溶液中に１０分間ずつ２回浸し、フォトレジスト膜７を
除去する。その後、超純水による流水洗浄を５分間ずつ
５回行い、さらにスピンドライ法により乾燥させる。The photoresist film 7 is removed by immersing the photoresist film 7 in a solution of hydrogen peroxide (H20x) = 2:1 for 10 minutes each time. Thereafter, washing with running ultrapure water is performed five times for 5 minutes each, and the film is further dried by a spin drying method.
次に同図（ｉ）に示すように上記窒化シリコン膜６をマ
スクにして、温度１０５±３℃のヒドラジン（ＮＨｚＮ
Ｈ２）’水（）（２０） ＝１ ： ｌによりエツチン
グ速度２μｍ／ｍｉｎで異方性エツチングを行い前述の
無欠陥層３に達する凹部８を形成する。Next, as shown in Figure (i), using the silicon nitride film 6 as a mask, hydrazine (NHZN
H2)'Water () (20) = 1: Anisotropic etching is performed at an etching rate of 2 μm/min using water () (20) = 1:1 to form the recesses 8 that reach the defect-free layer 3 described above.
次に同図（ｊ）に示すように表面の窒化シリコン膜６を
マスクにしてフッ化水素水溶液（ＨＦ：Ｈ，０＝１ ：
ｉｏ）によるウェットエツチングを４５秒間行い、酸
化シリコン膜２にコンタクトホール９を形成する。続い
て当該ウェハを５分間ずつ５回超純水により流水洗浄し
、さらにスピンドライ法により乾燥させる。Next, as shown in FIG. 6(j), using the silicon nitride film 6 on the surface as a mask, a hydrogen fluoride aqueous solution (HF:H, 0=1:
io) is performed for 45 seconds to form a contact hole 9 in the silicon oxide film 2. Subsequently, the wafer is washed with running ultrapure water five times for 5 minutes each time, and further dried by a spin dry method.
次に、同図（ｋ）に示すように反応ガスとしてアルゴン
（Ａｒ）−１０ｓｅｃｍを流し、圧力０．３Ｐａの条件
で５分間のスパッタエツチングを行った後、温度２３０
±３０℃、高周波電力５、ＯＫＷの条件で９１秒間スパ
ッタリングを行い、表面に膜厚１．０±０．１μｍのア
ルミニウム（ＡＩ２）膜１０を蒸着形成する。続いて、
同図（β）に示すように電極パターンを形成するために
膜厚１．Ｏｕｍのフォトレジスト膜１１を塗布形成し、
マスク合せの後に露光および現像を行い、窒素ガス雰囲
気中において１４０±２℃の熱処理（ハードベーキング
）を９０秒間行う。次に、同図（ｍ）に示すように反応
ガスとして三塩化ホウ素（ＢＣＩ２ｓ ）＝４７ｓｅｃ
ｍ、塩素（Ｃｆｆｚ ）＝３９ｓｅｃｍ、 ヘリウム（
）Ｉｅ）＝１５００ｓｅｃｍを流し、圧力１３５Ｐａ、
電力３２０Ｗの条件でバターニングされたフォトレジス
ト膜ｌｌをマスクとして１３０秒間ドライエツチングを
行うことによりアルミニウム電極１２を形成する。続い
て圧力５．０Ｔｏｒｒ、高周波電力５００Ｗの条件でプ
ラズマアッシング（灰化）を４．５秒間行うことにより
フォトレジスト膜１１を除去し、最後に４２０±５℃の
窒素ガス雰囲気中において１０分間の熱処理（電極アニ
ル）を施し、電気特性検査を行った後、ダイシングを行
う。Next, as shown in the figure (k), 10 sec of argon (Ar) was flowed as a reaction gas, sputter etching was performed for 5 minutes at a pressure of 0.3 Pa, and then at a temperature of 230 sec.
Sputtering is performed for 91 seconds under the conditions of ±30° C., high frequency power of 5, and OKW to form an aluminum (AI2) film 10 with a thickness of 1.0±0.1 μm on the surface. continue,
As shown in the figure (β), the film thickness is 1. A photoresist film 11 of Oum is coated and formed.
After mask alignment, exposure and development are performed, and heat treatment (hard baking) at 140±2° C. is performed for 90 seconds in a nitrogen gas atmosphere. Next, as shown in the same figure (m), boron trichloride (BCI2s) was used as a reaction gas for 47 sec.
m, chlorine (Cffz) = 39secm, helium (
)Ie)=1500sec, pressure 135Pa,
The aluminum electrode 12 is formed by dry etching for 130 seconds using the patterned photoresist film 11 as a mask at a power of 320 W. Subsequently, the photoresist film 11 was removed by performing plasma ashing (ashing) for 4.5 seconds under the conditions of a pressure of 5.0 Torr and a high frequency power of 500 W, and finally, the photoresist film 11 was ashed for 10 minutes in a nitrogen gas atmosphere at 420±5°C. After heat treatment (electrode annealing) and electrical property inspection, dicing is performed.
このような工程により作製されたピエゾ抵抗型圧力セン
サの凹部８には、従来の圧力センサに生じたようなマイ
クロピラミッド２７は観察されず、電気特性検査におい
てもバラツキがなく、安定した結果が得られた。Micropyramids 27, which occur in conventional pressure sensors, are not observed in the recess 8 of the piezoresistive pressure sensor manufactured through such a process, and stable results are obtained with no variation in electrical property testing. It was done.
以上に実施例を挙げて本発明を説明したが、本発明は上
記実施例に限定されるものではなく、その要旨を変更し
ない範囲で種々変更可能である。Although the present invention has been described above with reference to Examples, the present invention is not limited to the above-mentioned Examples, and can be modified in various ways without changing the gist thereof.
たとえば上記実施例においては圧力センサの基板として
Ｎ型のシリコン基板１を用い、これに無欠陥層３を形成
するようにしたが、Ｐ型のシリコン基板ｌを用いてこれ
に無欠陥層３を形成するとともにその中にＮ型の拡散抵
抗層５を形成するようにしてもよい。For example, in the above embodiment, an N-type silicon substrate 1 was used as the substrate of the pressure sensor and the defect-free layer 3 was formed thereon, but a P-type silicon substrate 1 was used and the defect-free layer 3 was formed thereon. At the same time, an N-type diffused resistance layer 5 may be formed therein.
また上記実施例においては、凹部８を結晶軸異方性エツ
チングにより形成したが、これは本出願人と同一出願人
による明細書（平成元年８月２３日提出）に開示した陽
極化成法を用いるようにしてもよい。さらに上記実施例
においては、ピエゾ抵抗型圧力センサの構造について説
明したが、本発明はセンサ以外のマイクロマシニング素
子たとえばマイクロポンプやその他の素子にも種々適用
できることは勿論である。Further, in the above embodiment, the recessed portion 8 was formed by crystal axis anisotropic etching, which was performed using the anodization method disclosed in the specification (submitted on August 23, 1989) by the same applicant as the present applicant. You may also use it. Furthermore, in the above embodiments, the structure of a piezoresistive pressure sensor has been described, but it goes without saying that the present invention can be applied to various micromachining elements other than sensors, such as micropumps and other elements.
また、半導体基板の材料としてはシリコン以外にもガリ
ウム砒素（Ｇ ａ Ａ ｓ ）等地の半導体材料を用い
ることも可能である。Further, as the material of the semiconductor substrate, other than silicon, it is also possible to use semiconductor materials such as gallium arsenide (GaAs).
［発明の効果］
以上説明したように本発明に係る半導体基板および半導
体装置によれば、それぞれエツチング加工により露出す
る部分に無欠陥層を設けるようにしたので当該部分にマ
イクロピラミッドが発生することがなく、凹凸のない奇
麗な面が得られ、このため特性のバラツキがなくなり、
製造歩留まりが向上する。また、素子部において結晶歪
がないので機械的強度が強（なる。[Effects of the Invention] As explained above, according to the semiconductor substrate and the semiconductor device according to the present invention, since a defect-free layer is provided in the portions exposed by etching, micropyramids are not generated in the portions. A beautiful surface with no unevenness can be obtained, which eliminates variations in properties.
Manufacturing yield is improved. Furthermore, since there is no crystal strain in the element part, the mechanical strength is strong.
さらに当該無欠陥層に不純物拡散によりトランジスタや
ダイオードの能動素子、また抵抗などの受動素子を形成
するようにすれば、リーケイジ特性が少な（なり、また
センサとＩＣを同一ベレット上に造ると、ＩＣ部のノイ
ズが少なくなり、電気的特性および製造歩留まりが著し
く向上するという効果を奏する。Furthermore, if active elements such as transistors and diodes, as well as passive elements such as resistors, are formed in the defect-free layer by impurity diffusion, leakage characteristics will be reduced. This has the effect of reducing noise in the parts and significantly improving electrical characteristics and manufacturing yield.
また、本発明に係る半導体基板および半導体装置の製造
方法によれば、それぞれ窒素雰囲気中において高温熱処
理を施した後、酸素雰囲気中において低温熱処理を施し
て２段階の熱処理による追い出し拡散法を用いるように
したので、前記無欠陥層を容易に形成することができる
。また塩酸酸化法を用いるようにしたのでマイクロピラ
ミッド発生の一因となる積層欠陥を縮小させることがで
き、さらに両者を併用することにより、より効果的にマ
イクロピラミッドの発生を防止できるものである。Further, according to the method for manufacturing a semiconductor substrate and a semiconductor device according to the present invention, after performing high-temperature heat treatment in a nitrogen atmosphere, low-temperature heat treatment is performed in an oxygen atmosphere, and a two-step heat treatment expulsion diffusion method is used. Therefore, the defect-free layer can be easily formed. Furthermore, since the hydrochloric acid oxidation method is used, it is possible to reduce the stacking faults that are a cause of the generation of micropyramids, and by using both in combination, the generation of micropyramids can be more effectively prevented.
第１図は（ａ）〜（ｍ）はそれぞれ本発明の一実施例に
係るピエゾ抵抗型圧力センサの製造工程を示す断面図、
第２図は熱処理時間と無欠陥層の深さとの関係を示す図
、第３図は熱処理温度とシリコン基板中の酸素濃度との
関係を示す図、第４図は塩酸酸化時間と積層欠陥の長さ
との関係を示す図、第５図は熱処理時間と積層欠陥の長
さとの関係を示す図、第６図は従来のピエゾ抵抗型圧力
センサの構造を示す断面図である。
ｉ−・・シリコン基板、 ２・・・酸化シリコン膜３・
・・無欠陥層
４．７，１１・・・フォトレジスト膜
５−Ｐ型拡散層、 ６・・・窒化シリコン膜８・・・
凹部、 ９・・・コンタクトホール１０・・・
アルミニウム膜
１２・・・アルミニウム電極In FIG. 1, (a) to (m) are sectional views showing the manufacturing process of a piezoresistive pressure sensor according to an embodiment of the present invention, respectively;
Figure 2 shows the relationship between heat treatment time and the depth of the defect-free layer, Figure 3 shows the relationship between heat treatment temperature and oxygen concentration in the silicon substrate, and Figure 4 shows the relationship between hydrochloric acid oxidation time and the depth of the defect-free layer. FIG. 5 is a diagram showing the relationship between heat treatment time and stacking fault length. FIG. 6 is a sectional view showing the structure of a conventional piezoresistive pressure sensor. i-...Silicon substrate, 2...Silicon oxide film 3.
... Defect-free layer 4.7, 11... Photoresist film 5-P type diffusion layer, 6... Silicon nitride film 8...
Recessed portion 9... Contact hole 10...
Aluminum film 12...aluminum electrode
Claims (15)
板であって、前記素子の形成予定領域の当該基板の表面
から少なくとも前記エッチング加工により露出する面を
含む領域にわたって無欠陥層を備えたことを特徴とする
半導体基板。(1) A semiconductor substrate on which an element is formed by etching, comprising a defect-free layer extending from the surface of the substrate in the region where the element is to be formed to at least the surface exposed by the etching. Semiconductor substrate.
より形成された素子と、該素子の当該基板の表面から少
なくとも前記エッチング加工により露出する面を含む領
域にわたって形成された無欠陥層とを備えたことを特徴
とする半導体装置。(2) A semiconductor substrate, an element formed on the semiconductor substrate by etching, and a defect-free layer formed over a region of the element from the surface of the substrate to at least the surface exposed by the etching. A semiconductor device characterized by:
前記半導体材料と導電型が異なる拡散抵抗層を有し、外
部圧力により当該拡散抵抗層の抵抗値が変化する感応部
と、該感応部の周縁部を支持する支持部とを備え、前記
感応部がエッチング加工により形成された圧力センサで
あって、前記感応部の表面から少なくともエッチング加
工により露出する面を含む領域にわたって無欠陥層を備
えたことを特徴とする圧力センサ。(3) A sensitive part having a diffused resistance layer formed of a semiconductor material of one conductivity type and of a different conductivity type from the semiconductor material, the resistance value of the diffused resistance layer being changed by external pressure; a support part that supports a peripheral edge part, and the sensitive part is formed by etching processing, and the pressure sensor is provided with a defect-free layer over a region including at least a surface exposed by the etching process from the surface of the sensitive part. A pressure sensor characterized by:
窒素雰囲気中で前記半導体基板に第１の温度の加熱処理
を施す第１の熱処理工程と、第１の熱処理工程の後、酸
素雰囲気中において前記第１の温度より低い第２の温度
で加熱処理を施すことにより前記半導体基板の表面から
所定の深さ領域にわたって無欠陥層を形成する第２の熱
処理工程とを含むことを特徴とする半導体基板の製造方
法。(4) A method for manufacturing a semiconductor substrate according to claim 1, comprising:
a first heat treatment step of subjecting the semiconductor substrate to a heat treatment at a first temperature in a nitrogen atmosphere; and after the first heat treatment step, a heat treatment at a second temperature lower than the first temperature in an oxygen atmosphere; a second heat treatment step of forming a defect-free layer over a predetermined depth region from the surface of the semiconductor substrate by performing a second heat treatment step.
は６００〜１０００℃の範囲の温度である請求項４記載
の半導体基板の製造方法。(5) The method for manufacturing a semiconductor substrate according to claim 4, wherein the first temperature is in the range of 1050 to 1150°C, and the second temperature is in the range of 600 to 1000°C.
塩素原子を含むガスまたは液体雰囲気中において６００
〜１１００℃の加熱処理を施す工程を含むことを特徴と
する半導体基板の製造方法。(6) A method for manufacturing a semiconductor substrate according to claim 1, comprising:
600 in a gas or liquid atmosphere containing chlorine atoms
A method for manufacturing a semiconductor substrate, comprising a step of performing heat treatment at ~1100°C.
記載の加熱処理を施す工程をさらに含むことを特徴とす
る半導体基板の製造方法。(7) After the second heat treatment step according to claim 4, claim 6
A method for manufacturing a semiconductor substrate, further comprising the step of performing the heat treatment described above.
気中において６００〜１２００℃の加熱処理を施す工程
をさらに含むことを特徴とする半導体基板の製造方法。(8) A method for manufacturing a semiconductor substrate, further comprising the step of performing heat treatment at 600 to 1200° C. in a nitrogen atmosphere after the second heat treatment step according to claim 4.
後、さらに請求項６記載の加熱処理を施す工程を含むこ
とを特徴とする半導体基板の製造方法。(9) A method for manufacturing a semiconductor substrate, which further comprises the step of performing the heat treatment according to claim 6 after the step of heat treatment in a nitrogen atmosphere according to claim 8.
、窒素雰囲気中で前記半導体基板に第１の温度の加熱処
理を施す第１の熱処理工程と、第１の熱処理工程の後、
酸素雰囲気中において前記第１の温度より低い第２の温
度で加熱処理を施すことにより前記半導体基板の表面か
ら所定の深さ領域にわたって無欠陥層を形成する第２の
熱処理工程と、前記無欠陥層が露出するまで選択的にエ
ッチング加工を行い素子を形成する工程とを含むことを
特徴とする半導体装置の製造方法。(10) The method for manufacturing a semiconductor device according to claim 2, comprising: a first heat treatment step of subjecting the semiconductor substrate to heat treatment at a first temperature in a nitrogen atmosphere; and after the first heat treatment step,
a second heat treatment step of forming a defect-free layer over a predetermined depth region from the surface of the semiconductor substrate by performing heat treatment at a second temperature lower than the first temperature in an oxygen atmosphere; 1. A method of manufacturing a semiconductor device, comprising the step of selectively performing etching until a layer is exposed to form an element.
度は６００〜１０００℃の範囲の温度である請求項１０
記載の半導体装置の製造方法。(11) Claim 10, wherein the first temperature is in the range of 1050 to 1150°C, and the second temperature is in the range of 600 to 1000°C.
A method of manufacturing the semiconductor device described above.
、塩素原子を含むガスまたは液体雰囲気中において６０
０〜１１００℃の加熱処理を施す工程を含むことを特徴
とする半導体装置の製造方法。(12) The method for manufacturing a semiconductor device according to claim 2, wherein the semiconductor device is manufactured in a gas or liquid atmosphere containing chlorine atoms.
A method for manufacturing a semiconductor device, comprising the step of performing heat treatment at 0 to 1100°C.
１２記載の加熱処理を施す工程をさらに含むことを特徴
とする半導体装置の製造方法。(13) A method for manufacturing a semiconductor device, further comprising the step of performing the heat treatment according to claim 12 after the second heat treatment step according to claim 8.
雰囲気中において６００〜１２００℃の加熱処理を施す
工程をさらに含むことを特徴とする半導体装置の製造方
法。(14) A method for manufacturing a semiconductor device, further comprising the step of performing heat treatment at 600 to 1200° C. in a nitrogen atmosphere after the second heat treatment step according to claim 10.
程の後、さらに請求項１２記載の加熱処理を施す工程を
含むことを特徴とする半導体装置の製造方法。(15) A method for manufacturing a semiconductor device, further comprising the step of performing the heat treatment according to claim 12 after the step of heat treatment in a nitrogen atmosphere according to claim 14.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP24763989A JPH03109778A (en) | 1989-09-22 | 1989-09-22 | Semiconductor device and manufacture thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP24763989A JPH03109778A (en) | 1989-09-22 | 1989-09-22 | Semiconductor device and manufacture thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH03109778A true JPH03109778A (en) | 1991-05-09 |
Family
ID=17166492
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP24763989A Pending JPH03109778A (en) | 1989-09-22 | 1989-09-22 | Semiconductor device and manufacture thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH03109778A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1197382A1 (en) | 2000-10-12 | 2002-04-17 | Renault | Console sliding on rails, especially for vehicles |
-
1989
- 1989-09-22 JP JP24763989A patent/JPH03109778A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1197382A1 (en) | 2000-10-12 | 2002-04-17 | Renault | Console sliding on rails, especially for vehicles |
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