JPH05206145A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPH05206145A JPH05206145A JP1451092A JP1451092A JPH05206145A JP H05206145 A JPH05206145 A JP H05206145A JP 1451092 A JP1451092 A JP 1451092A JP 1451092 A JP1451092 A JP 1451092A JP H05206145 A JPH05206145 A JP H05206145A
- Authority
- JP
- Japan
- Prior art keywords
- polysilicon film
- back surface
- heat treatment
- silicon substrate
- polysilicon
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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- Thin Film Transistor (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、半導体装置の製造方
法、特に半導体シリコン基板のゲッタリング方法に関す
るものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of gettering a semiconductor silicon substrate.
【０００２】[0002]
【従来の技術】半導体シリコン基板中の重金属ゲッタリ
ングの方法として、半導体シリコン基板に直接ポリシリ
コンを堆積することによりゲッタリングする方法が、１
９９１年第３８回応用物理学関連技術講演会３０ｐ−Ｚ
Ｌ−１１等において報告されている。2. Description of the Related Art As a method of gettering heavy metals in a semiconductor silicon substrate, there is a method of gettering by directly depositing polysilicon on the semiconductor silicon substrate.
991 38th Applied Physics Conference 30p-Z
It has been reported in L-11 and the like.
【０００３】図７および図８は、従来の半導体装置の製
造方法を示す工程断面図である。図７は、半導体シリコ
ン基板１の両面に酸化膜２を形成し、表面にレジスト膜
を形成して、裏面の酸化膜２を湿式エッチング法により
除去し、その後、両面に、１μｍ程度の厚さの裏面ポリ
シリコン膜３および表面ポリシリコン膜４を堆積する工
程を示す。図８は、裏面にレジストを形成して、表面の
ポリシリコン膜４を除去し、高温長時間熱処理により、
ウェル層６，７の形成を行なう工程である。ここで、５
は裏面ポリシリコン膜３上に形成された裏面酸化膜であ
る。7 and 8 are process sectional views showing a conventional method for manufacturing a semiconductor device. In FIG. 7, an oxide film 2 is formed on both surfaces of a semiconductor silicon substrate 1, a resist film is formed on the front surface, and the oxide film 2 on the back surface is removed by a wet etching method. The step of depositing the backside polysilicon film 3 and the frontside polysilicon film 4 of FIG. In FIG. 8, a resist is formed on the back surface, the polysilicon film 4 on the surface is removed, and heat treatment is performed at high temperature for a long time.
This is a step of forming the well layers 6 and 7. Where 5
Is a backside oxide film formed on the backside polysilicon film 3.
【０００４】その状態にて、超ＬＳＩ形成のプロセスを
行なう。この方法により、ポリシリコン膜３中に重金属
が取り込まれ、表面素子形成部分への電気的特性への影
響が減少する。なお、この方法に加えて、裏面のポリシ
リコン膜の形成方法には、両面にポリシリコン堆積後、
表面のポリシリコン膜を研磨することによって形成する
方法も用いられている。In that state, a process for forming a VLSI is performed. By this method, the heavy metal is taken into the polysilicon film 3, and the influence on the electrical characteristics of the surface element forming portion is reduced. In addition to this method, the method for forming the polysilicon film on the back surface is as follows.
A method of forming a polysilicon film on the surface by polishing is also used.
【０００５】[0005]
【発明が解決しようとする課題】従来の方法において
は、ポリシリコン膜堆積後に１０５０℃を越える熱処理
を行なうことにより、ポリシリコン膜の粒径は成長し、
そのために、この結晶粒に存在する結晶粒界が減少し
て、ゲッタリング効果は減少するという問題点がある。In the conventional method, the grain size of the polysilicon film grows by performing a heat treatment at over 1050 ° C. after depositing the polysilicon film,
Therefore, there is a problem that the crystal grain boundaries existing in the crystal grains are reduced and the gettering effect is reduced.
【０００６】また、高温の熱処理に用いる電気炉の炉心
管はＳｉＣ製であるために、石英に比べて重金属汚染に
弱い。そのために熱処理中における重金属汚染が起り易
い。さらに、ＣＭＯＳＬＳＩのウェルのドライブインな
どの高温熱処理が終了後において、比較的低温の熱処理
においても重金属が半導体シリコン基板の表面側に拡散
してしまうと電気特性の劣化につながるため、十分な裏
面ゲッタリング層が必要となる。ここで高温熱処理時に
形成されていたポリシリコン膜を残しておくことは高温
熱処理により、裏面のポリシリコン中にゲッターされた
重金属を工程の最後まで裏面に残しておくこととなり汚
染源をつねに半導体シリコン基板の裏に持っていること
になってしまい、重大な欠陥を生み出す原因となる。Further, since the core tube of the electric furnace used for the high temperature heat treatment is made of SiC, it is more susceptible to heavy metal contamination than quartz. Therefore, heavy metal contamination is likely to occur during the heat treatment. Further, after the high temperature heat treatment such as the drive-in of the well of the CMOS LSI is completed, even if the heat treatment is performed at a relatively low temperature, if the heavy metal diffuses to the front surface side of the semiconductor silicon substrate, the electrical characteristics are deteriorated, so that a sufficient back surface getter is obtained. A ring layer is required. Here, to leave the polysilicon film formed during the high temperature heat treatment, the high temperature heat treatment causes the heavy metal gettered in the polysilicon on the back surface to remain on the back surface until the end of the process. Being held on the back of, it causes a serious defect.
【０００７】[0007]
【課題を解決するための手段】本発明の半導体装置の製
造方法は、これらの問題に鑑みなされたもので、半導体
シリコン基板の裏面に第１のポリシリコン膜を堆積する
工程と、１０５０℃を越える第１の熱処理を行なう工程
と、前記第１の熱処理後に前記第１のポリシリコン膜を
除去する工程と、前記半導体シリコン基板の裏面に第２
のポリシリコン膜を堆積する工程と備えたものである。The method of manufacturing a semiconductor device according to the present invention has been made in view of these problems. The step of depositing a first polysilicon film on the back surface of a semiconductor silicon substrate and 1050.degree. A step of performing a first heat treatment that exceeds the first heat treatment step, a step of removing the first polysilicon film after the first heat treatment, and a second step on the back surface of the semiconductor silicon substrate.
And a step of depositing a polysilicon film.
【０００８】[0008]
【作用】本発明は、上記した構成により、高温時にグレ
インが成長し、重金属を多く含んだポリシリコン膜を除
去することによって、重金属の大部分を除いてしまい、
再度グレイン寸法の小さくゲッタリング効果の高いポリ
シリコン膜を裏面に形成することによりゲッタリング効
果を高める。According to the present invention, with the above structure, the grains grow at a high temperature, and by removing the polysilicon film containing a large amount of heavy metal, most of the heavy metal is removed.
The gettering effect is enhanced by forming again a polysilicon film having a small grain size and a high gettering effect on the back surface.
【０００９】[0009]
【実施例】図１から図４は、本発明の一実施例における
半導体装置の製造方法の工程断面図である。半導体シリ
コン基板１の裏面に直接第１のポリシリコン膜を形成す
る。この時、表面は酸化膜２を介して、表面ポリシリコ
ン膜４が形成される（図１）。次に、表面ポリシリコン
膜４を除去し、表面にウェル層６，７を形成のため、ボ
ロンあるいはリン原子をイオン注入で、半導体シリコン
基板１に導入する。そして基板内部に深いウェル層６，
７を形成するため、熱拡散を１２００℃で１０時間程度
行なう（図２）。この後、裏面の第１のポリシリコン膜
３をケミカルドライエッチング法のようなシリコンと酸
化膜の高選択エッチング方法を用いて、半導体シリコン
基板１の基板シリコン表面までのエッチングを行なう
（図３）。この後、再度全面に酸化膜を形成後、裏面に
形成された酸化膜を除去して、両面にポリシリコン膜を
堆積する。そして表面側のポリシリコン膜のみを除去
し、裏面に第２のポリシリコン膜８だけを残す。その後
の工程において、この第２のポリシリコン膜８形成後
に、第２のポリシリコン膜８中に不純物が拡散しないよ
うに、その表面に酸化膜９を形成しておく（図４）。1 to 4 are sectional views showing steps in a method of manufacturing a semiconductor device according to an embodiment of the present invention. A first polysilicon film is formed directly on the back surface of the semiconductor silicon substrate 1. At this time, the surface polysilicon film 4 is formed on the surface through the oxide film 2 (FIG. 1). Next, the surface polysilicon film 4 is removed, and boron or phosphorus atoms are ion-implanted into the semiconductor silicon substrate 1 to form the well layers 6 and 7 on the surface. And the deep well layer 6 inside the substrate
In order to form No. 7, thermal diffusion is performed at 1200 ° C. for about 10 hours (FIG. 2). After that, the first polysilicon film 3 on the back surface is etched up to the substrate silicon surface of the semiconductor silicon substrate 1 by using a highly selective etching method of silicon and an oxide film such as a chemical dry etching method (FIG. 3). .. After that, an oxide film is formed on the entire surface again, the oxide film formed on the back surface is removed, and a polysilicon film is deposited on both surfaces. Then, only the polysilicon film on the front surface side is removed, and only the second polysilicon film 8 is left on the back surface. In a subsequent process, after forming the second polysilicon film 8, an oxide film 9 is formed on the surface of the second polysilicon film 8 to prevent impurities from diffusing into the second polysilicon film 8 (FIG. 4).
【００１０】また、裏面の第２のポリシリコン膜８表面
に窒化膜を形成しておくことによって、ウェットエッチ
ング時の裏面の酸化膜９の除去を防ぐことができる。こ
の時には、窒化膜と第２のポリシリコン膜８の間には酸
化膜を含んでいても影響が少ない。これらの方法により
工程数の増加はあるが、簡単な方法で、大きな効果を持
つゲッタリング層の形成が可能となり、実用的な価値は
極めて高い。Further, by forming a nitride film on the surface of the second polysilicon film 8 on the back surface, removal of the oxide film 9 on the back surface during wet etching can be prevented. At this time, even if an oxide film is included between the nitride film and the second polysilicon film 8, the influence is small. Although the number of steps is increased by these methods, a gettering layer having a great effect can be formed by a simple method, and its practical value is extremely high.
【００１１】図５には、このゲッタリングにより半導体
シリコン基板１中の鉄のゲッタリングの効果を示す。図
中の１０は、従来法に相当するものであり、ポリシリコ
ン膜を形成後に、１１００℃の高温熱処理工程を加えた
ポリシリコン膜中の鉄の分布をＳＩＭＳにて評価したも
のである。FIG. 5 shows the effect of gettering of iron in the semiconductor silicon substrate 1 by this gettering. Reference numeral 10 in the figure corresponds to the conventional method, and the distribution of iron in the polysilicon film subjected to the high temperature heat treatment step at 1100 ° C. after forming the polysilicon film is evaluated by SIMS.
【００１２】また、図６には、最大９５０℃の熱処理し
か加えていないポリシリコン膜を用いた時のポリシリコ
ン膜中への鉄の分布を示す結果である。なお、鉄の故意
汚染は、鉄を含む溶液をウェーハ表面に塗布して熱拡散
したものである。なお、一般に１０５０℃未満の温度の
場合には、ポリシリコン膜の粒成長は０．５μｍ径以下
であり、ゲッタリング効果の低減は少なかった。また、
ポリシリコン膜中に不純物を１０19ｃｍ-2以下で高濃度
にドーピングすると、ゲッタリング効果が低下する。ま
た、裏面のポリシリコン膜堆積前に半導体シリコン基板
１の裏面の自然酸化膜を除去すると、半導体シリコン基
板１からの結晶成長の影響で、結晶粒の成長が起こり、
ポリシリコン膜の重金属のゲッタリング効果が低下す
る。この発明の方法で作成した試料について、鉄をスピ
ンコートにて、故意に汚染を行なったときのゲッタリン
グの効果を裏面のポリシリコン中の鉄の量を定量測定す
ることで評価した。その結果、最初のポリシリコン膜を
そのままにして、ＣＭＯＳ素子の製造工程を行なったも
のでは、裏面のポリシリコン膜中に汚染した鉄の３０パ
ーセントが検出された。それに対して、本発明の結果に
おいては、５０パーセントの鉄が裏面にゲッタリングさ
れており、本発明の効果は非常に大きかった。つまり、
最初に除去したポリシリコン膜中の量と合わせると８０
パーセントの鉄を除去できたことになる。FIG. 6 is a result showing the distribution of iron in the polysilicon film when using the polysilicon film to which only the heat treatment at a maximum of 950 ° C. was applied. The intentional contamination of iron is that a solution containing iron is applied to the surface of the wafer and thermally diffused. In general, when the temperature is less than 1050 ° C., the grain growth of the polysilicon film was 0.5 μm or less, and the gettering effect was not significantly reduced. Also,
If the polysilicon film is doped with impurities at a high concentration of 10 19 cm -2 or less, the gettering effect is lowered. If the natural oxide film on the back surface of the semiconductor silicon substrate 1 is removed before the polysilicon film on the back surface is deposited, crystal grains grow due to the influence of crystal growth from the semiconductor silicon substrate 1.
The gettering effect of the heavy metal of the polysilicon film is reduced. With respect to the sample prepared by the method of the present invention, the effect of gettering when iron was intentionally contaminated by spin coating was evaluated by quantitatively measuring the amount of iron in the polysilicon on the back surface. As a result, 30% of iron contaminated in the polysilicon film on the back surface was detected in a CMOS device manufacturing process in which the first polysilicon film was left as it was. On the other hand, in the result of the present invention, 50% of iron was gettered on the back surface, and the effect of the present invention was very large. That is,
The total amount in the polysilicon film removed first is 80
It means that we have been able to remove the percentage of iron.
【００１３】高温の熱処理においても、高温熱処理に続
いて起る比較的低温の熱処理においても、重金属のゲッ
タリング効果が十分に得られる。高温熱処理時に形成し
ていた裏面ポリシリコン膜を高温熱処理後に一端除去
し、再度裏面にポリシリコン膜を形成し、その後の熱処
理工程におけるゲッタリング効果を高めるものである。
それと同時に高温熱処理時にゲッターされた重金属汚染
層を除去できる効果がある。The gettering effect of the heavy metal can be sufficiently obtained in both the high temperature heat treatment and the relatively low temperature heat treatment that follows the high temperature heat treatment. The back surface polysilicon film formed during the high temperature heat treatment is removed after the high temperature heat treatment and the polysilicon film is formed again on the back surface to enhance the gettering effect in the subsequent heat treatment step.
At the same time, there is an effect that the gettered heavy metal contamination layer can be removed during the high temperature heat treatment.
【００１４】[0014]
【発明の効果】以上、本発明によれば、第１のポリシリ
コン膜を高温で処理することで、ゲッタリング能力は減
少する。このために、一旦除去して後に再度第２のポリ
シリコン膜を形成することによって、重金属の汚染を低
減でき、電気特性の劣化を抑えた高性能素子を形成でき
る。As described above, according to the present invention, the gettering ability is reduced by processing the first polysilicon film at a high temperature. Therefore, by removing once and then forming the second polysilicon film again, the contamination of heavy metals can be reduced, and a high-performance element with suppressed deterioration of electrical characteristics can be formed.
【図１】本発明の半導体装置の製造方法の一実施例を示
す第１工程断面図FIG. 1 is a sectional view of a first step showing an embodiment of a method for manufacturing a semiconductor device of the present invention.
【図２】本発明の半導体装置の製造方法の一実施例を示
す第２工程断面図FIG. 2 is a sectional view of a second step showing an embodiment of a method for manufacturing a semiconductor device of the present invention.
【図３】本発明の半導体装置の製造方法の一実施例を示
す第３工程断面図FIG. 3 is a sectional view of a third step showing the embodiment of the method for manufacturing the semiconductor device of the present invention.
【図４】本発明の半導体装置の製造方法の一実施例を示
す第４工程断面図FIG. 4 is a sectional view of a fourth step showing the embodiment of the method for manufacturing the semiconductor device of the present invention.
【図５】本発明の半導体シリコン基板中の鉄のゲッタリ
ングの効果を示す図FIG. 5 is a diagram showing the effect of gettering of iron in the semiconductor silicon substrate of the present invention.
【図６】本発明のポリシリコン膜中への鉄の分布を示す
図FIG. 6 is a diagram showing the distribution of iron in the polysilicon film of the present invention.
【図７】従来の半導体装置の製造方法の一例を示す第１
工程断面図FIG. 7 shows a first example of a conventional method for manufacturing a semiconductor device.
Process cross section
【図８】従来の半導体装置の製造方法の一例を示す第２
工程断面図FIG. 8 shows a second example of a conventional method for manufacturing a semiconductor device.
Process cross section
１ 半導体シリコン基板 ２ 酸化膜 ３ 第１の裏面ポリシリコン膜 ４ 表面ポリシリコン膜 ５，９ 裏面酸化膜 ６，７ ウェル層 ８ 第２の裏面ポリシリコン 1 Semiconductor Silicon Substrate 2 Oxide Film 3 First Backside Polysilicon Film 4 Surface Polysilicon Film 5,9 Backside Oxide Film 6,7 Well Layer 8 Second Backside Polysilicon
Claims (5)
膜を堆積する工程と、１０５０℃を越える第１の熱処理
を行なう工程と、前記第１の熱処理後で、第２の高温熱
処理を行なう前に前記ポリシリコン膜を除去する工程と
を備えた半導体装置の製造方法。1. A step of depositing a polysilicon film on a back surface of a semiconductor silicon substrate, a step of performing a first heat treatment at a temperature higher than 1050 ° C., and a step of performing a second high temperature heat treatment after the first heat treatment. And a step of removing the polysilicon film.
リコン膜を堆積する工程と、１０５０℃を越える第１の
熱処理を行なう工程と、前記第１の熱処理後に前記第１
のポリシリコン膜を除去する工程と、前記半導体シリコ
ン基板の裏面に第２のポリシリコン膜を堆積する工程と
備えた半導体装置の製造方法。2. A step of depositing a first polysilicon film on the back surface of a semiconductor silicon substrate, a step of performing a first heat treatment exceeding 1050 ° C., and a step of performing the first heat treatment after the first heat treatment.
And a step of depositing a second polysilicon film on the back surface of the semiconductor silicon substrate.
物が１０19ｃｍ-2以下である請求項１または請求項２記
載の半導体装置の製造方法。3. The method for manufacturing a semiconductor device according to claim 1, wherein the impurities in the first and second polysilicon films are 10 19 cm −2 or less.
のポリシリコン膜の表面に酸化膜あるいは窒化膜を形成
する請求項２記載の半導体装置の製造方法。4. A second surface formed on the back surface of a semiconductor silicon substrate.
3. The method of manufacturing a semiconductor device according to claim 2, wherein an oxide film or a nitride film is formed on the surface of the polysilicon film.
リコン膜の堆積前に前記半導体シリコン基板の裏面に自
然酸化膜を備えた請求項１または２記載の半導体装置の
製造方法。5. The method of manufacturing a semiconductor device according to claim 1, wherein a natural oxide film is provided on the back surface of the semiconductor silicon substrate before depositing the first polysilicon film on the back surface of the semiconductor silicon substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1451092A JPH05206145A (en) | 1992-01-30 | 1992-01-30 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1451092A JPH05206145A (en) | 1992-01-30 | 1992-01-30 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH05206145A true JPH05206145A (en) | 1993-08-13 |
Family
ID=11863077
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1451092A Pending JPH05206145A (en) | 1992-01-30 | 1992-01-30 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH05206145A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009245968A (en) * | 2008-03-28 | 2009-10-22 | Oki Semiconductor Co Ltd | Manufacturing method of semiconductor device |
| JP2010040638A (en) * | 2008-08-01 | 2010-02-18 | Sumco Corp | Method of manufacturing soi substrate |
| JP2010232539A (en) * | 2009-03-27 | 2010-10-14 | Canon Inc | Method of manufacturing semiconductor device, and method of manufacturing photoelectric conversion device |
-
1992
- 1992-01-30 JP JP1451092A patent/JPH05206145A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009245968A (en) * | 2008-03-28 | 2009-10-22 | Oki Semiconductor Co Ltd | Manufacturing method of semiconductor device |
| JP2010040638A (en) * | 2008-08-01 | 2010-02-18 | Sumco Corp | Method of manufacturing soi substrate |
| JP2010232539A (en) * | 2009-03-27 | 2010-10-14 | Canon Inc | Method of manufacturing semiconductor device, and method of manufacturing photoelectric conversion device |
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