JPH0223023B2 - - Google Patents
Info
- Publication number
- JPH0223023B2 JPH0223023B2 JP58100915A JP10091583A JPH0223023B2 JP H0223023 B2 JPH0223023 B2 JP H0223023B2 JP 58100915 A JP58100915 A JP 58100915A JP 10091583 A JP10091583 A JP 10091583A JP H0223023 B2 JPH0223023 B2 JP H0223023B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor substrate
- oxidizing
- oxide film
- initial
- thin film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000010408 film Substances 0.000 claims description 64
- 239000000758 substrate Substances 0.000 claims description 45
- 239000004065 semiconductor Substances 0.000 claims description 41
- 238000000034 method Methods 0.000 claims description 32
- 230000001590 oxidative effect Effects 0.000 claims description 30
- 230000003647 oxidation Effects 0.000 claims description 22
- 238000007254 oxidation reaction Methods 0.000 claims description 22
- 239000007789 gas Substances 0.000 claims description 19
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 13
- 239000001301 oxygen Substances 0.000 claims description 13
- 229910052760 oxygen Inorganic materials 0.000 claims description 13
- 239000010409 thin film Substances 0.000 claims description 10
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 9
- 238000010438 heat treatment Methods 0.000 claims description 8
- 239000000126 substance Substances 0.000 claims 1
- 235000012431 wafers Nutrition 0.000 description 37
- 229910052710 silicon Inorganic materials 0.000 description 25
- 239000010703 silicon Substances 0.000 description 25
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 23
- 238000009792 diffusion process Methods 0.000 description 14
- 239000010453 quartz Substances 0.000 description 14
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 14
- 238000007796 conventional method Methods 0.000 description 13
- 238000002474 experimental method Methods 0.000 description 11
- 239000000243 solution Substances 0.000 description 8
- 230000000694 effects Effects 0.000 description 7
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 6
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 6
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 4
- 239000001257 hydrogen Substances 0.000 description 4
- 229910052739 hydrogen Inorganic materials 0.000 description 4
- 229910017604 nitric acid Inorganic materials 0.000 description 4
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 3
- 238000004140 cleaning Methods 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 229910052757 nitrogen Inorganic materials 0.000 description 3
- 238000012545 processing Methods 0.000 description 3
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 description 2
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 2
- 239000012670 alkaline solution Substances 0.000 description 2
- 238000002485 combustion reaction Methods 0.000 description 2
- 239000011259 mixed solution Substances 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 150000003376 silicon Chemical class 0.000 description 2
- VHUUQVKOLVNVRT-UHFFFAOYSA-N Ammonium hydroxide Chemical compound [NH4+].[OH-] VHUUQVKOLVNVRT-UHFFFAOYSA-N 0.000 description 1
- QGZKDVFQNNGYKY-UHFFFAOYSA-N ammonia Natural products N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 1
- QZPSXPBJTPJTSZ-UHFFFAOYSA-N aqua regia Chemical compound Cl.O[N+]([O-])=O QZPSXPBJTPJTSZ-UHFFFAOYSA-N 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005485 electric heating Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000011156 evaluation Methods 0.000 description 1
- 150000002431 hydrogen Chemical class 0.000 description 1
- 238000011835 investigation Methods 0.000 description 1
- 238000002386 leaching Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/0223—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
- H01L21/02233—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
- H01L21/02236—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
- H01L21/02238—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/02227—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
- H01L21/02255—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by thermal treatment
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Electrodes Of Semiconductors (AREA)
- Formation Of Insulating Films (AREA)
Description
（利用分野）
本発明は半導体基体の酸化法に係り、特に、半
導体基体の表面に形成される酸化膜厚の均一性お
よび再現性を改善することのできる、半導体基体
の酸化法に関する。
（背景）
MOSトランジスタでは、ゲート酸化膜の厚み
が、そのしきい値電圧（VT）等の特性を左右す
る重要なパラメータであることは周知のとうりで
ある。
近年、MOS LSIの高集積化に伴い、前記ゲー
ト酸化膜の薄膜化が進んでいる。その結果、膜厚
の均一化が、製造プロセス上の重要な課題となつ
てきている。
ゲート酸化膜の形形成法としては、
(1) 他の方法に比べて膜厚の再現性が優れている
ことや、
(2) 装置が簡便であること
などの理由から、酸化性の雰囲気ガス中で半導体
基体を加熱処理する熱酸化法が一般に用いられて
いる。
通常の場合、MOS LSI等のゲート酸化膜の形
成は、ゲート酸化以前の工程で形成された半導体
基体表面のゲート形成領域の不要酸化膜膜を、フ
ツ酸系の溶液で完全に除去した後、酸化性の雰囲
気ガス中でで、前記半導体基体を加熱処理するこ
とによつて行なわれている。
しかし、この方法では、半導体基体の面内及び
ロツト内、ロツト間の膜厚ばらつきが大きく、均
一性、再現性が十分でないという問題があつた。
すなわち、前記の方法では、
(1) その基板が熱酸化炉のどの位置におかれてい
たかによつて、形成される酸化膜の厚みが異な
る。
(2) 一枚の基板内でも、酸化膜の厚みにばらつき
を生ずる。
(3) ロツトごとに、同じ条件で処理しても、厚み
がばらつく。
などの欠点があつた。
（目的）
それゆえ、本発明の目的は、上記した不都合や
欠点を除去し、酸化膜の均一性および再現性の良
好な、半導体基体の酸化法を提供することにあ
る。
（概要）
かかる目的を達成する本発明の特徴とするとこ
ろは、半導体基体を酸化性雰囲気ガス中で加熱処
理して実質酸化膜を形成する工程の前に、半導体
基体に厚みの均一な、極く薄い酸化膜を形成する
工程を設けたことにある。
（実施例）
以下、本発明について更に詳しく説明する。
膜厚ばらつきの形態を詳細に調べた結果、膜厚
のばらつきは、主に酸化の初期に起つていること
がわかつた。また膜厚のばらつきは酸化の生長速
度が大きいほど大きいこともわかつた。
この原因は、前記の如く、酸化工程の初期に、
フツ酸系の溶液で、半導体基体表面の酸化膜が完
全に除去され、極めて活性な表面が露出している
ためであると考えられる。
なぜならば、このように活性化された表面は、
周知のように、高温の酸化性雰囲気中にさらされ
ると、酸化が極めて速い速度で進行する。しか
も、このとき形成される初期の酸化膜はばらつき
が極めて大きい。そして、このばらつきは酸化速
度が大きい場合程、顕著に現われる。
しかし、一旦20〜30Å程度の酸化膜が形成され
ると、その後は比較的ばらつきの少ない酸化が進
行する。
従つて、酸化初期に膜厚のばらつきを生じなけ
れば、均一な酸化膜が形成できるはずである。す
なわち、実質酸化膜を形成する通常の酸化工程の
前に、厚みの均一な酸化薄膜をあらかじめ形成し
ておけば、最終的な酸化膜厚のばらつきを大きく
低減できるはずである。
本発明は、前述のような考察に基づいて案出さ
れたものである。
実質酸化膜を形成する酸化処理前に、厚みの均
一な酸化薄膜を形成する方法としては、前記の如
く酸化初期の膜厚がばらつく範囲の酸化速度を低
下させることが考えられる。すなわち、酸化性雰
囲気ガス中で半導体基体を加熱処理する前に、
(1) これより低温において加熱処理する方法、あ
るいは
(2) 前記酸化性の雰囲気ガスよりも酸素又は水分
の分圧を下げた雰囲気ガス中で加熱処理する方
法、
などが考えられる。
これらの方法であれば、半導体基体の表面に成
長する初期酸化膜の生長速度が、実質酸化膜を形
成する工程での生長速度より小さいので、比較的
厚みの均一な初期酸化薄膜を形成することができ
る。
実質酸化膜を形成する酸化工程の前に、厚みの
均一な初期酸化薄膜を形成する他の方法として
は、半導体基体をフツ酸系の溶液で処理して所望
部分の不要酸化膜を完全に除去した後、酸化性の
溶液に浸漬する方法が考えられる。
この場合に好適な酸化性の溶液としては、硝
酸、塩酸、硫酸あるいは王水などがあげられる。
また、これらの溶液とアルカリ溶液（例えば、ア
ンモニア水など）との混合溶液であつてもよい。
なお、アルカリ溶液はシリコンに対してエツチン
グ作用をもつが、混合溶液が、全体として酸化性
であればよい。
一例として、100℃に保たれた硝酸中に、シリ
コン基板を20分間侵漬すれば、約20Åの均一な酸
化膜が生長する。このシリコンウエハを酸化性雰
囲気ガス中で加熱処理すれば、極めて均一性の良
い酸化膜が形成できる。
第１図は本発明の方法を実施するのに好適な熱
酸化装置の構造を示す断面図である。
石英拡散管３の内部には、ウエハホルダ２が装
填され、ウエハホルダ２の上には、多数のシリコ
ン基体１が、互いに間隔をおいて平行に載置され
る。石英拡散管３の外周には加熱用電気炉４が配
置される。
また、石英拡散管３は処理ガス導入口３Ａを有
している。
つぎに、本発明者らが行なつた実施例について
具体的に説明する。
実験例 １
この実験において用いた半導体基体は、面方位
（100）、ｎ型導電性、抵抗率10Ωcm、直径76mm、
厚み500μｍのシリコンウエハ１（20枚）である。
まず、このシリコンウエハをHF：H2O＝１：
４の溶液中に１分間浸漬し、表面に形成されてい
た不要な酸化膜を完全に除去した後、純水中で約
15分間流水洗浄した。なお、この洗浄によつてシ
リコンウエハに生成された酸化膜は、２〜３Åの
厚さであつた。
次に、加熱用電気炉４により800℃に保たれた
石英拡散管３内に、その一端の処理ガス導入口３
Ａから乾燥酸素を３／分の割合で流し、この中
に前記シリコンウエハ１を挿入して10分間保持し
た後、石英拡散管３内から取り出した。このと
き、シリコンウエハに形成された初期酸化膜は20
Åであつた。
次に実質酸化膜を形成する工程として、1000℃
に保たれた石英拡散管内に一端３Ａから乾燥酸素
を３／分ずつ流し、初期酸化薄膜を形成した前
記シリコンウエハを挿入して60分間保持した。そ
の後、シリコンウエハ１を石英拡散管３から取り
出し、酸化膜厚をエリプソメータにて測定した。
膜厚の測定は、各ウエハについて、中心の１点
及び周辺の４点（シリコンウエハの端から10mmの
点で相互に90゜の角度をもつ位置）の計５点であ
る。このようにして全ウエハ（20枚）を測定し
た。更に、同一の実験を10ロツト繰り返し行な
い、再現性を評価した結果を、第２図Ａに示し
た。
また比較のために、800℃での熱処理（初期酸
化薄膜の形成処理）を施こさない（他の条件は本
実験例と同一）従来法での実験も、10ロツト行な
い、結果を第２図Ｂに示した。
なお、表１に本実験例と従来法との膜厚ばらつ
きの比較を、ウエハ面内及びロツト内、ロツト間
に分けて示した。
(Field of Application) The present invention relates to a method for oxidizing a semiconductor substrate, and particularly to a method for oxidizing a semiconductor substrate that can improve the uniformity and reproducibility of the oxide film thickness formed on the surface of the semiconductor substrate. (Background) It is well known that the thickness of the gate oxide film of a MOS transistor is an important parameter that influences its threshold voltage (V T ) and other characteristics. In recent years, as MOS LSIs have become more highly integrated, the gate oxide film has become thinner. As a result, uniformity of film thickness has become an important issue in the manufacturing process. The method of forming the gate oxide film using an oxidizing atmospheric gas is recommended because (1) the reproducibility of the film thickness is better than other methods, and (2) the equipment is simple. Among them, a thermal oxidation method in which a semiconductor substrate is heat-treated is generally used. Normally, when forming a gate oxide film for MOS LSI, etc., the unnecessary oxide film in the gate formation region on the surface of the semiconductor substrate, which was formed in the process before gate oxidation, is completely removed using a hydrofluoric acid solution. This is carried out by heat-treating the semiconductor substrate in an oxidizing atmospheric gas. However, this method has a problem in that the film thickness varies greatly within the plane of the semiconductor substrate, within a lot, and between lots, resulting in insufficient uniformity and reproducibility. That is, in the above method, (1) the thickness of the oxide film formed differs depending on where in the thermal oxidation furnace the substrate is placed; (2) Even within a single substrate, variations occur in the thickness of the oxide film. (3) The thickness varies from lot to lot even when processed under the same conditions. There were drawbacks such as: (Objective) Therefore, an object of the present invention is to provide a method for oxidizing a semiconductor substrate, which eliminates the above-mentioned disadvantages and drawbacks, and which provides good uniformity and reproducibility of the oxide film. (Summary) A feature of the present invention that achieves the above object is that, before the step of heat-treating the semiconductor substrate in an oxidizing atmosphere gas to form a substantial oxide film, the semiconductor substrate is coated with a thin film having a uniform thickness. The reason is that a process is provided to form a very thin oxide film. (Example) Hereinafter, the present invention will be explained in more detail. As a result of a detailed investigation of the form of film thickness variation, it was found that film thickness variation mainly occurs at the initial stage of oxidation. It was also found that the variation in film thickness increases as the oxidation growth rate increases. The reason for this is, as mentioned above, at the beginning of the oxidation process.
This is thought to be because the hydrofluoric acid solution completely removed the oxide film on the surface of the semiconductor substrate, exposing an extremely active surface. This is because the surface activated in this way is
As is well known, when exposed to a high temperature oxidizing atmosphere, oxidation proceeds at an extremely rapid rate. Moreover, the initial oxide film formed at this time has extremely large variations. This variation becomes more noticeable as the oxidation rate increases. However, once an oxide film of about 20 to 30 Å is formed, oxidation progresses with relatively little variation. Therefore, if there is no variation in film thickness at the initial stage of oxidation, a uniform oxide film should be able to be formed. That is, if a thin oxide film with a uniform thickness is formed in advance before a normal oxidation process for forming a substantial oxide film, it should be possible to greatly reduce variations in the final oxide film thickness. The present invention was devised based on the above considerations. As a method for forming a thin oxide film with a uniform thickness before the oxidation treatment to form a substantial oxide film, it is conceivable to reduce the oxidation rate in the range where the film thickness varies at the initial stage of oxidation, as described above. That is, before heat-treating the semiconductor substrate in an oxidizing atmospheric gas, (1) a method of heat-treating at a lower temperature than this, or (2) a method in which the partial pressure of oxygen or moisture is lower than that of the aforementioned oxidizing atmospheric gas. Possible methods include heat treatment in an atmospheric gas. With these methods, the growth rate of the initial oxide film that grows on the surface of the semiconductor substrate is lower than the growth rate in the step of forming a substantial oxide film, so it is possible to form an initial thin oxide film with a relatively uniform thickness. Can be done. Another method for forming an initial thin oxide film with a uniform thickness before the oxidation step to form a substantial oxide film is to treat the semiconductor substrate with a hydrofluoric acid solution to completely remove unnecessary oxide films from desired areas. After that, a method of immersing it in an oxidizing solution is considered. In this case, suitable oxidizing solutions include nitric acid, hydrochloric acid, sulfuric acid, and aqua regia.
Moreover, a mixed solution of these solutions and an alkaline solution (for example, aqueous ammonia) may be used.
Although the alkaline solution has an etching effect on silicon, it is sufficient if the mixed solution as a whole is oxidizing. For example, if a silicon substrate is immersed in nitric acid kept at 100°C for 20 minutes, a uniform oxide film of about 20 Å will grow. If this silicon wafer is heat-treated in an oxidizing atmosphere gas, an oxide film with extremely good uniformity can be formed. FIG. 1 is a sectional view showing the structure of a thermal oxidation apparatus suitable for carrying out the method of the present invention. A wafer holder 2 is loaded inside the quartz diffusion tube 3, and a large number of silicon substrates 1 are placed on the wafer holder 2 in parallel at intervals. A heating electric furnace 4 is arranged around the outer periphery of the quartz diffusion tube 3 . Furthermore, the quartz diffusion tube 3 has a processing gas inlet 3A. Next, examples carried out by the present inventors will be specifically described. Experimental example 1 The semiconductor substrate used in this experiment had a plane orientation (100), n-type conductivity, resistivity 10Ωcm, diameter 76mm,
These are silicon wafers 1 (20 pieces) with a thickness of 500 μm. First, this silicon wafer is HF:H 2 O=1:
After immersing it in the solution of step 4 for 1 minute to completely remove the unnecessary oxide film that had formed on the surface, it was immersed in pure water for about 1 minute.
Washed under running water for 15 minutes. The oxide film formed on the silicon wafer by this cleaning had a thickness of 2 to 3 Å. Next, a processing gas inlet 3 at one end of the quartz diffusion tube 3 maintained at 800°C by an electric heating furnace 4 is placed.
Dry oxygen was flowed from A at a rate of 3/min, and the silicon wafer 1 was inserted into the flow and held for 10 minutes, and then taken out from the quartz diffusion tube 3. At this time, the initial oxide film formed on the silicon wafer is 20
It was Å. The next step is to form a substantial oxide film at 1000°C.
Dry oxygen was flowed at a rate of 3/min from 3A at one end into a quartz diffusion tube maintained at a constant temperature, and the silicon wafer on which an initial oxide thin film had been formed was inserted and held for 60 minutes. Thereafter, the silicon wafer 1 was taken out from the quartz diffusion tube 3, and the oxide film thickness was measured using an ellipsometer. The film thickness was measured at a total of five points for each wafer: one point in the center and four points on the periphery (positions 10 mm from the edge of the silicon wafer and at an angle of 90 degrees to each other). All wafers (20 wafers) were measured in this way. Furthermore, the same experiment was repeated in 10 lots and the reproducibility was evaluated. The results are shown in FIG. 2A. For comparison, we also conducted 10 lots of experiments using the conventional method without heat treatment (initial oxide thin film formation treatment) at 800°C (other conditions were the same as in this experiment), and the results are shown in Figure 2. Shown in B. Table 1 shows a comparison of film thickness variations between this experimental example and the conventional method, divided into within the wafer plane, within a lot, and between lots.
【表】
第２図Ａ，Ｂの比較及び表１から明らかなよう
に、本発明による実験例では、従来法に比べてウ
エハ面内及びロツト内、ロツト間のいずれにおい
てもばらつきが1/2以下に低減しており、本発明
の効果が確認できた。
実験例 ２
次に本発明の第２の実験例について説明する。
用いた半導体基体は、前記第１の実験例と同一
であり、シリコンウエハの前処理洗浄も同一であ
る。
まず、950℃に保たれた石英拡散管３内に、一
端３Ａから酸素0.3／分と窒素2.7／分の混合
気体を流し、この中にシリコンウエハ１を挿入し
て10分間保持した後、流入ガスを酸素３／分の
みに切り換えて60分間保持した。
その後、石英拡散管３内からシリコンウエハ１
を取り出し、第１の実験例と同様な方法で、膜厚
を評価した。なお、前記混合気体による10分間の
熱処理で、シリコンウエハに生成された初期酸化
膜厚は、40〜42Åであつた。
更に、同一の実験を10ロツト繰り返し行ない、
再現性を評価した結果を第３図Ｃに示した。ま
た、比較のため酸素0.3／分と窒素2.7／分の
混合気体中での熱処理を施こさない（他の条件は
本実験例と同一）従来法での実験も10ロツト行な
い、その結果を第３図Ｄに示した。
なお、表２に本実験例と従来例との膜厚ばらつ
きの比較を、ウエハ面内及びロツト内、ロツト間
に分けて示した。[Table] As is clear from the comparison of Figures 2A and B and Table 1, in the experimental example according to the present invention, the variation within the wafer plane, within the lot, and between the lots was reduced to 1/2 compared to the conventional method. The effect of the present invention was confirmed. Experimental Example 2 Next, a second experimental example of the present invention will be explained. The semiconductor substrate used was the same as in the first experimental example, and the pretreatment cleaning of the silicon wafer was also the same. First, a mixed gas of 0.3/min of oxygen and 2.7/min of nitrogen was flowed from one end 3A into the quartz diffusion tube 3 kept at 950°C, and after inserting the silicon wafer 1 into this and holding it for 10 minutes, The gas was switched to oxygen 3/min only and held for 60 minutes. After that, the silicon wafer 1 is removed from inside the quartz diffusion tube 3.
was taken out, and the film thickness was evaluated in the same manner as in the first experimental example. The initial oxide film thickness formed on the silicon wafer by the 10-minute heat treatment using the mixed gas was 40 to 42 Å. Furthermore, the same experiment was repeated 10 times,
The results of evaluating reproducibility are shown in FIG. 3C. For comparison, we also conducted 10 lots of experiments using the conventional method without heat treatment in a mixed gas of 0.3/min of oxygen and 2.7/min of nitrogen (other conditions were the same as in this experiment), and the results were reported in this section. It is shown in Figure 3D. Table 2 shows a comparison of film thickness variations between this experimental example and the conventional example, divided into within the wafer plane, within a lot, and between lots.
【表】
第３図Ｃ，Ｄの比較及び表２から明らかなよう
に、本発明の実験例では、従来法に比べて、ウエ
ハ面内及びロツト内、ロツト間のいずれにおいて
もばらつきが1/2以下に低減しており、本発明の
効果が確認できた。
実験例 ３
次に本発明の第３の実験例について説明する。
用いた半導体基体は面方位（100）、ｎ型導電
性、抵抗率２Ωcm、直径100mm、厚み500μｍのシ
リコンウエハ（20枚）である。
まず、このウエハをHF：H2O＝１：４の溶液
中に１分間浸漬し、表面に生成されていた不要な
酸化膜を完全に除去した後、純水中で約15分間流
水洗浄した。更にその後、100℃に保たれた硝酸
（HNO3）中に20分間浸漬した後、純水中で約15
分間流水洗浄した。
前記の処理でシリコンウエハに生成された初期
酸化膜厚は19〜20Åであつた。こうして洗浄した
シリコンウエハを、950℃に保たれた石英拡散管
３内に一端から酸素３／分と窒素３／分の混
合気体を流した中に挿入して、100分間保持した。
その後、シリコンウエハ１を石英拡散管３から
取り出し、第１の実験例と同様にして、実質酸化
膜の膜厚を測定した。更に、同一の実験を10ロツ
ト繰り返し、評価した結果を第４図Ｅに示した。
また比較のために、硝酸中に浸出する処理を施
さない（他の条件は本実験例と同一）従来法での
実験も10ロツト行ない、結果を第４図Ｆに示し
た。
なお、表３に本実験例と従来法との膜厚ばらつ
きの比較を、ウエハ面内及びロツト内、ロツト間
に分けて示した。[Table] As is clear from the comparison of Figures C and D and Table 2, in the experimental example of the present invention, the variation within the wafer surface, within the lot, and between the lots was reduced to 1/2 compared to the conventional method. It was reduced to 2 or less, confirming the effect of the present invention. Experimental Example 3 Next, a third experimental example of the present invention will be explained. The semiconductor substrates used were silicon wafers (20 wafers) with a plane orientation (100), n-type conductivity, resistivity 2 Ωcm, diameter 100 mm, and thickness 500 μm. First, this wafer was immersed in a solution of HF:H 2 O = 1:4 for 1 minute to completely remove the unnecessary oxide film that had formed on the surface, and then washed in running pure water for about 15 minutes. . After that, it was immersed in nitric acid (HNO 3 ) kept at 100℃ for 20 minutes, and then soaked in pure water for about 15 minutes.
Washed with running water for a minute. The initial oxide film thickness produced on the silicon wafer by the above process was 19-20 Å. The silicon wafer thus cleaned was inserted into a quartz diffusion tube 3 maintained at 950° C. through which a mixed gas of 3/min of oxygen and 3/min of nitrogen was flowing from one end, and held for 100 minutes. Thereafter, the silicon wafer 1 was taken out from the quartz diffusion tube 3, and the substantial thickness of the oxide film was measured in the same manner as in the first experimental example. Furthermore, the same experiment was repeated for 10 lots, and the evaluation results are shown in FIG. 4E. For comparison, 10 lots were also experimented with the conventional method without leaching into nitric acid (other conditions were the same as in this experiment), and the results are shown in FIG. 4F. Table 3 shows a comparison of film thickness variations between this experimental example and the conventional method, divided into within the wafer plane, within a lot, and between lots.
【表】
第４図Ａ，Ｂの比較及び表３から明らかなよう
に、本実験例によれば、従来法に比べてウエハ面
内及びロツト内、ロツト間のいずれにおいてもば
らつきが1/2以下に低減しており、本発明の効果
が確認できた。
実験例 ４
次に、本発明の第４の実験例について説明す
る。
用いた半導体基体は、面方位（100）、ｎ型導電
性、抵抗率８Ωcm、直径100mm、厚み500μｍのシ
リコンウエハである。シリコンウエハの前処理洗
浄は、前記第１の実験例と同一で行なつた。
まず、950℃に保たれた石英拡散管３内に、そ
の一端３Ａから酸素3.0／分と水素0.06／分
を流して燃焼させる。その結果生じる2.97／分
の酸素と0.06／分の水蒸気（H2O）との混合気
流中に、シリコンウエハを挿入し２分間保持し
た。
その後、酸素を３／分の一定流量に保持した
まま、水素流量を1.8／分に切り換え（このと
きは、水素の燃焼により、1.8／分の水蒸気と
2.1／分の酸素の混合気流となる）10分間保持
した。
その後、石英拡散管３内からシリコンウエハ１
を取り出し、第１の実験例と同様な方法で、膜厚
を評価した。更に同一の実施例を10ロツト繰り返
し行ない、再現性を評価した結果を、第５図Ｇに
示した。
また比較のために酸素2.97／分と水蒸気0.06
／分の混合気流中での熱処理を施こさない（他
の糸件は本実施例と同一）従来法での実験も10ロ
ツト行ない、その結果を第５図Ｈに示した。
なお、表４に、本実験例と従来法との膜厚ばら
つほの比較を、ウエハ面内及びロツト内、ロツト
間に分けて示した。[Table] As is clear from the comparison between Figures 4A and B and Table 3, according to this experimental example, the variation within the wafer surface, within a lot, and between lots is reduced to 1/2 compared to the conventional method. The effect of the present invention was confirmed. Experimental Example 4 Next, a fourth experimental example of the present invention will be described. The semiconductor substrate used was a silicon wafer with a plane orientation of (100), n-type conductivity, resistivity of 8 Ωcm, diameter of 100 mm, and thickness of 500 μm. The pretreatment cleaning of the silicon wafer was performed in the same manner as in the first experimental example. First, 3.0/min of oxygen and 0.06/min of hydrogen are flowed into the quartz diffusion tube 3 kept at 950° C. from one end 3A to cause combustion. A silicon wafer was inserted into the resulting mixed gas flow of 2.97/min oxygen and 0.06/min water vapor (H 2 O) and held for 2 minutes. Then, while maintaining the oxygen flow rate at a constant flow rate of 3/min, the hydrogen flow rate was changed to 1.8/min (at this time, due to the combustion of hydrogen, the hydrogen flow rate was changed to 1.8/min water vapor).
The mixture was held for 10 minutes (resulting in an oxygen mixture flow of 2.1/min). After that, the silicon wafer 1 is removed from inside the quartz diffusion tube 3.
was taken out, and the film thickness was evaluated in the same manner as in the first experimental example. Furthermore, the same example was repeated in 10 lots and the reproducibility was evaluated. The results are shown in FIG. 5G. For comparison, oxygen 2.97/min and water vapor 0.06
Ten lots of experiments were also conducted using the conventional method without heat treatment in a mixed air flow of 1/min (other yarn conditions were the same as in this example), and the results are shown in FIG. 5H. Table 4 shows a comparison of film thickness variations between this experimental example and the conventional method, divided into within the wafer plane, within a lot, and between lots.
【表】
第５図Ｇ，Ｈの比較及び表４から明らかなよう
に、本発明の実験例によれば従来法に比べてウエ
ハ面内、ロツト内、ロツト間のいずれにおいて
も、ばらつきが1/2以下に低減しており、本発明
の効果が確認できた。
さらに、本発明によれば、厚さ20〜30Åの初期
酸化膜が形成されるまでの成膜速度のみを遅くす
れば実質酸化膜の膜厚を均一にできるので、従来
にくらべて成膜時間が短縮され、成膜工程の能率
を向上させることができる。
なお、特許請求の範囲に記載した他の条件で実
験しても、本発明の効果を奏することが確認され
た。
（効果）
以上において説明したように、本発明によれ
ば、酸化膜の生長初期における膜厚ばらつきがな
くなるので、極めて均一性、再現性の良い酸化膜
が形成でき、ひいてはMOS LSIの特性、製造歩
留り、および製造効率を大幅に向上することがで
きる。[Table] As is clear from the comparison of Figures 5G and 5H and Table 4, according to the experimental example of the present invention, the variation within the wafer surface, within the lot, and between the lots was reduced by 1% compared to the conventional method. /2 or less, confirming the effect of the present invention. Furthermore, according to the present invention, the film thickness of the oxide film can be made substantially uniform by slowing down only the film formation rate until the initial oxide film with a thickness of 20 to 30 Å is formed, so the film formation time is reduced compared to the conventional method. time is shortened, and the efficiency of the film forming process can be improved. In addition, it was confirmed that the effects of the present invention can be achieved even when experiments are conducted under other conditions described in the claims. (Effects) As explained above, according to the present invention, the film thickness variation in the early stage of oxide film growth is eliminated, so an oxide film with extremely good uniformity and reproducibility can be formed, which in turn improves the characteristics of MOS LSI and the manufacturing process. Yield and manufacturing efficiency can be significantly improved.
第１図は本発明の方法を実施するのに好適な熱
酸化装置の構造を示す断面図、第２図、第３図、
第４図および第５図は本発明の方法によつて製造
した酸化膜厚のばらつき状況を従来法によるばら
つき状況と対比して示す図である。
１……シリコン基体、２……ウエハホルダ、３
……石英拡散管、４……加熱用電気炉、３Ａ……
処理ガス導入口。
FIG. 1 is a sectional view showing the structure of a thermal oxidation device suitable for carrying out the method of the present invention, FIG. 2, FIG.
FIGS. 4 and 5 are diagrams showing variations in the thickness of oxide films manufactured by the method of the present invention in comparison with variations in the thickness by the conventional method. 1...Silicon base, 2...Wafer holder, 3
...Quartz diffusion tube, 4...Heating electric furnace, 3A...
Processing gas inlet.
Claims (1)
理して成される半導体基体の酸化法において、半
導体基体を前記酸化性雰囲気ガス中で加熱処理し
て実質酸化膜を形成する工程の前に、半導体基体
を実質酸化する前記工程における酸化速度より遅
い速度で半導体基体に厚さ20〜30Åの均一な膜厚
の初期酸化薄膜を形成する工程を設けたことを特
徴とする半導体基体の酸化法。 ２ 特許請求の範囲第１項において、前記半導体
基体に初期酸化薄膜を形成する工程が、半導体基
体を実質酸化する工程の温度より低い温度で実行
されることを特徴とする半導体基体の酸化法。 ３ 特許請求の範囲第１項において、前記半導体
基体に初期酸化薄膜を形成する工程が、酸化性の
薬液処理で成されることを特徴とする半導体基体
の酸化法。 ４ 特許請求の範囲第１項において、前記半導体
基体に初期酸化薄膜を形成する工程が、半導体基
体を実質酸化する工程の雰囲気より、水蒸気分圧
の低い条件で実行されることを特徴とする半導体
基体の酸化法。 ５ 酸化性の雰囲気ガス中で半導体基体を加熱処
理して実質酸化膜を形成する工程の前に、半導体
基体を実質酸化する前記工程における酸化速度よ
り遅い速度で半導体基体に厚みの均一な初期酸化
薄膜を形成する工程を設けた半導体基体の酸化法
において、 前記半導体基体に初期酸化薄膜を形成する工程
が、半導体基体を実質酸化する工程の雰囲気よ
り、酸素分圧の低い条件で実行されることを特徴
とする半導体基体の酸化法。 ６ 特許請求の範囲第５項において、前記初期酸
化薄膜の膜厚が20〜30Åであることを特徴とする
半導体基体の酸化法。[Scope of Claims] 1. In a method for oxidizing a semiconductor substrate, which is performed by heat-treating a semiconductor substrate in an oxidizing atmospheric gas, a semiconductor substrate is heat-treated in the oxidizing atmospheric gas to form a substantial oxide film. Before the step of oxidizing the semiconductor substrate, a step of forming an initial oxide thin film having a uniform thickness of 20 to 30 Å on the semiconductor substrate at a rate lower than the oxidation rate in the step of substantially oxidizing the semiconductor substrate is provided. Method of oxidizing semiconductor substrates. 2. The method of oxidizing a semiconductor substrate according to claim 1, wherein the step of forming an initial oxide thin film on the semiconductor substrate is performed at a temperature lower than the temperature of the step of substantially oxidizing the semiconductor substrate. 3. The method of oxidizing a semiconductor substrate according to claim 1, wherein the step of forming an initial oxidation thin film on the semiconductor substrate is performed by an oxidizing chemical treatment. 4. The semiconductor according to claim 1, wherein the step of forming an initial oxidized thin film on the semiconductor substrate is carried out under conditions of a lower water vapor partial pressure than the atmosphere of the step of substantially oxidizing the semiconductor substrate. Substrate oxidation method. 5. Before the step of heating the semiconductor substrate in an oxidizing atmospheric gas to form a substantial oxide film, the semiconductor substrate is subjected to initial oxidation with a uniform thickness at a rate slower than the oxidation rate in the step of substantially oxidizing the semiconductor substrate. In a method for oxidizing a semiconductor substrate, which includes a step of forming a thin film, the step of forming an initial oxidized thin film on the semiconductor substrate is performed under conditions of a lower oxygen partial pressure than the atmosphere of the step of substantially oxidizing the semiconductor substrate. A method for oxidizing a semiconductor substrate, characterized by: 6. The method of oxidizing a semiconductor substrate according to claim 5, wherein the initial oxide thin film has a thickness of 20 to 30 Å.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58100915A JPS59227128A (en) | 1983-06-08 | 1983-06-08 | Oxidation method for semiconductor substrate |
| JP3121917A JPH0783019B2 (en) | 1983-06-08 | 1991-04-25 | Oxidation method of semiconductor substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58100915A JPS59227128A (en) | 1983-06-08 | 1983-06-08 | Oxidation method for semiconductor substrate |
Related Child Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3121917A Division JPH0783019B2 (en) | 1983-06-08 | 1991-04-25 | Oxidation method of semiconductor substrate |
| JP5016798A Division JPH0727898B2 (en) | 1993-01-08 | 1993-01-08 | Oxidation method of semiconductor substrate |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS59227128A JPS59227128A (en) | 1984-12-20 |
| JPH0223023B2 true JPH0223023B2 (en) | 1990-05-22 |
Family
ID=14286629
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58100915A Granted JPS59227128A (en) | 1983-06-08 | 1983-06-08 | Oxidation method for semiconductor substrate |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59227128A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001176883A (en) * | 1999-10-28 | 2001-06-29 | Fairchild Korea Semiconductor Kk | High-voltage semiconductor element and manufacturing method therefor |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH09251995A (en) * | 1989-05-07 | 1997-09-22 | Tadahiro Omi | Method for forming insulation oxide film |
| JPH06244174A (en) * | 1993-08-04 | 1994-09-02 | Tadahiro Omi | Formation of insulating oxide film |
| JP4914536B2 (en) | 2001-02-28 | 2012-04-11 | 東京エレクトロン株式会社 | Oxide film formation method |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4870481A (en) * | 1971-12-23 | 1973-09-25 | ||
| JPS5421265A (en) * | 1977-07-19 | 1979-02-17 | Mitsubishi Electric Corp | Forming method of semiconductor oxide film |
| JPS5447577A (en) * | 1977-09-22 | 1979-04-14 | Fujitsu Ltd | Production of semiconductor device |
| JPS56158431A (en) * | 1980-05-13 | 1981-12-07 | Meidensha Electric Mfg Co Ltd | Forming of oxidized film of semiconductor element for electric power |
-
1983
- 1983-06-08 JP JP58100915A patent/JPS59227128A/en active Granted
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS4870481A (en) * | 1971-12-23 | 1973-09-25 | ||
| JPS5421265A (en) * | 1977-07-19 | 1979-02-17 | Mitsubishi Electric Corp | Forming method of semiconductor oxide film |
| JPS5447577A (en) * | 1977-09-22 | 1979-04-14 | Fujitsu Ltd | Production of semiconductor device |
| JPS56158431A (en) * | 1980-05-13 | 1981-12-07 | Meidensha Electric Mfg Co Ltd | Forming of oxidized film of semiconductor element for electric power |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001176883A (en) * | 1999-10-28 | 2001-06-29 | Fairchild Korea Semiconductor Kk | High-voltage semiconductor element and manufacturing method therefor |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS59227128A (en) | 1984-12-20 |
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