JPH02114582A - Manufacture of semiconductor laser - Google Patents
Manufacture of semiconductor laserInfo
- Publication number
- JPH02114582A JPH02114582A JP26735788A JP26735788A JPH02114582A JP H02114582 A JPH02114582 A JP H02114582A JP 26735788 A JP26735788 A JP 26735788A JP 26735788 A JP26735788 A JP 26735788A JP H02114582 A JPH02114582 A JP H02114582A
- Authority
- JP
- Japan
- Prior art keywords
- mesa
- layer
- resist
- inp
- insulating film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 11
- 238000004519 manufacturing process Methods 0.000 title claims description 10
- 239000013078 crystal Substances 0.000 claims abstract description 8
- 239000000758 substrate Substances 0.000 abstract description 8
- 238000000034 method Methods 0.000 abstract description 5
- 238000005530 etching Methods 0.000 abstract description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 238000000206 photolithography Methods 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 1
- 230000010355 oscillation Effects 0.000 description 1
Landscapes
- Semiconductor Lasers (AREA)
Abstract
Description
【発明の詳細な説明】
（産業上の利用分野）
この発明は、半導体レーザの製造方法に関するものであ
る゛。DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention relates to a method for manufacturing a semiconductor laser.
（従来の技術〕
第２図（ａ）〜（Ｃ）は従来の半導体レーザの一例であ
るＰ Ｂ Ｃ−Ｌ Ｄ （Ｐ−ｓｕｂｓｔｒａｔ Ｂｕ
ｒｉｅｄＣｒｅｓｅｎｔ Ｌａ５ｅｒ Ｄｉｏｄｅ）の
製造工程の一部を示したものである。(Prior Art) FIGS. 2(a) to 2(C) show an example of a conventional semiconductor laser.
This figure shows part of the manufacturing process of riedCresent La5er Diode.
第２図において、１はｐ−ＩｎＰ基板、２はｎ−ＩｎＰ
層、３はｐ−ＩｎＰ層、４はｎ−１ｎＰ層、５はｐ−Ｉ
ｎＰ層、６は活性層、７はｎ−ＩｎＰ層、８はｎ−１ｎ
ＧａＡｓＰ層、１０は絶縁膜、１１はｎ電極、１２はｐ
電極である。In Figure 2, 1 is a p-InP substrate, 2 is an n-InP substrate
layer, 3 is p-InP layer, 4 is n-1nP layer, 5 is p-I
nP layer, 6 is active layer, 7 is n-InP layer, 8 is n-1n
GaAsP layer, 10 is an insulating film, 11 is an n electrode, 12 is a p
It is an electrode.
第２図（ａ）はｐ−ＩｎＰ基板１上にｎ−Ｉｎ２層２．
ｐ−ＩｎＰ層３．ｎ−１ｎＰ層４を順次結晶成長し、溝
内にｐ−ＩｎＰ層５．活性層６を結晶成長した後、ｎ−
１ｎＰ層７．ｎ−ＩｎＧａＡｓＰ層８を結晶成長し、ダ
ブルチャネル・メサ形成後、全面に絶縁膜１０を形成し
た状態である。FIG. 2(a) shows an n-In2 layer 2 on a p-InP substrate 1.
p-InP layer 3. The n-1nP layer 4 is successively crystal grown, and the p-InP layer 5. After crystal growth of the active layer 6, n-
1nP layer7. After crystal growth of the n-InGaAsP layer 8 and formation of a double channel mesa, an insulating film 10 is formed over the entire surface.
第２図（ｂ）はメサ上部の絶縁膜１０を写真製版により
所要の形状にバターニングした状態である。FIG. 2(b) shows a state in which the insulating film 10 on the upper part of the mesa has been patterned into a desired shape by photolithography.
第２図（Ｃ）はメサ部側にｎ電極１１．基板１側にｐ電
極１２を形成した状態である。FIG. 2(C) shows an n-electrode 11 on the mesa side. This is a state in which a p-electrode 12 is formed on the substrate 1 side.
次に動作について説明する。Next, the operation will be explained.
ｎ電極１１．ｐ電極１２にそれぞれリード線を取り付け
（図示せず）、電流が一定値（しきい値）を越えると、
レーザ発振が起きる。n-electrode 11. A lead wire is attached to each p-electrode 12 (not shown), and when the current exceeds a certain value (threshold),
Laser oscillation occurs.
通常、このレーザ光を光通信の光源に用いる場合、しき
い値近傍まで直流電流を注入し、パルス電流を重畳する
ことにより信号を発する。Normally, when this laser light is used as a light source for optical communication, a signal is emitted by injecting a direct current up to near a threshold value and superimposing a pulse current.
このとき、入力パルス電流の波形に対応して、レーザ光
が出力されるが、レーザ自体の容量が大きいと、入力パ
ルスの変化にレーザ光が追従できなくなる。そこで、光
出力の入力パルスに対する応答を速くするために、レー
ザの容量を減らす必要がある。At this time, laser light is output in accordance with the waveform of the input pulse current, but if the capacity of the laser itself is large, the laser light cannot follow changes in the input pulse. Therefore, in order to speed up the response of optical output to input pulses, it is necessary to reduce the capacity of the laser.
上記の従来例では、ダブルチャネル、メサ形成および絶
縁膜１０の形成を行うことにより、容量の低減を図って
いる。In the conventional example described above, capacitance is reduced by forming a double channel, mesa formation, and insulating film 10.
従来のＰＢＣ−ＬＤは以上のように構成されているので
、第２図（ｂ）のメサ上部の絶縁膜１０の除去の際の写
真製版のときに、メサパターンの内側に、絶縁膜除去パ
ターンとなるストライブパターンを入れなければならず
、マスク合せが難かしく、狭メサ化にも限界があった。Since the conventional PBC-LD is configured as described above, an insulating film removal pattern is formed inside the mesa pattern during photolithography for removing the insulating film 10 on the upper part of the mesa in FIG. 2(b). A stripe pattern had to be inserted, making mask alignment difficult and limiting the ability to narrow the mesa.
この発明は、上記のような問題点を解消するためになさ
れたもので、セルファラインでメサ形式およびメサ上部
の絶縁膜除去が行えるとともに、従来例に比べ、より狭
いメサ化が可能となり、レーザの容量が低減化され、高
速応答が可能な半導体レーザの製造方法を得ることを目
的とする。This invention was made to solve the above-mentioned problems. It is possible to remove the insulating film in the mesa form and on the top of the mesa using Selfa Line, and it also makes it possible to form a narrower mesa compared to the conventional example, making it possible to The present invention aims to provide a method for manufacturing a semiconductor laser which has a reduced capacitance and is capable of high-speed response.
この発明に係る半導体レーザの製造方法は、レーザ構造
をなす結晶成長終了後、活性層をメサ内部に含むように
レジストパターンをマスクにしてメサ形成を行い、との
メサ上部に前記レジストパターンを残した状態で全面に
絶縁膜を形成し、その後、前記メサ上部のレジストパタ
ーンを除去し、前記メサ上部のみにオーム性接触する電
極を形成するものである。The method for manufacturing a semiconductor laser according to the present invention is to form a mesa using a resist pattern as a mask so that the active layer is contained inside the mesa after the crystal growth forming the laser structure is completed, and to leave the resist pattern above the mesa. An insulating film is formed on the entire surface in this state, and then the resist pattern on the upper part of the mesa is removed, and an electrode is formed in ohmic contact only on the upper part of the mesa.
（作用）
この発明においては、メサ形成時に用いたレジストパタ
ーンを絶縁膜形成後除去することから一段と狭メサ化が
可能となる。(Function) In the present invention, since the resist pattern used when forming the mesa is removed after the insulating film is formed, it becomes possible to make the mesa even narrower.
（実施例） 以下、この発明の一実施例を第１図について説明する。(Example) An embodiment of the present invention will be described below with reference to FIG.
第１図（ａ）〜（Ｃ）はこの発明の一実施例を示す半導
体レーザの製造工程の主要部を示す断面図である。FIGS. 1A to 1C are cross-sectional views showing the main parts of the manufacturing process of a semiconductor laser according to an embodiment of the present invention.
第１図において、９はレジストであり、その他は第２図
に示した従来例と同一構成部分を示すので、その説明は
省略する。In FIG. 1, reference numeral 9 denotes a resist, and since the other components are the same as those of the conventional example shown in FIG. 2, their explanation will be omitted.
次に製造工程について説明する。Next, the manufacturing process will be explained.
第１図（ａ）のように、ｐ−ＩｎＰ基板１上に所要の結
晶成長層、すなわちｎ−１ｎＰ層２． ｐ−Ｉ ｎＰ層
３．ｎ−１ｎＰ層４．ｐ−ＩｎＰ層５、活性層５．ｎ−
Ｉｎｐ層７．およびｎ−ＩｎＧａＡｓＰ層８を成長した
後、全面にレジスト９を塗布し、レジスト９を所要の形
状にバターニングし、このレジストパターンをマスクに
して活性層６をメサ内部に含むようにメサエッチングす
る。As shown in FIG. 1(a), a required crystal growth layer, that is, an n-1nP layer 2. p-I nP layer 3. n-1nP layer 4. p-InP layer 5, active layer 5. n-
Inp layer7. After growing the n-InGaAsP layer 8, a resist 9 is applied to the entire surface, the resist 9 is buttered into a desired shape, and using this resist pattern as a mask, mesa etching is performed so that the active layer 6 is included inside the mesa. .
次に、マスクとして用いたレジスト９のレジストパター
ンをそのまま残し、その上から全面に絶縁膜１０を形成
する０次いで、メサ上部に残しておいたレジスト９とと
もにその上部の絶縁膜１０を除去した後、第１図（Ｃ）
のように、−メサ部側にｎ電極１１．ｐ−１ｎＰ基板１
側にｐ電極１２を形成し、この発明の半導体レーザが形
成される。Next, the resist pattern of the resist 9 used as a mask is left as it is, and an insulating film 10 is formed over the entire surface from above.Next, the resist 9 left on the upper part of the mesa and the insulating film 10 above it are removed. , Figure 1 (C)
As shown in the figure, the n-electrode 11. p-1nP substrate 1
A p-electrode 12 is formed on the side, and the semiconductor laser of the present invention is formed.
この動作については、従来と同様であるので、省略する
が、この発明では、レーザの容量を減らすことにより高
速応答が可能となる。This operation is the same as the conventional one, so it will be omitted, but in the present invention, high-speed response is possible by reducing the capacity of the laser.
なお、上記実施例では、ＩｎＰ系ＰＢＣ−ＬＤについて
述べたが、他の構造ないしは、ＧａＡｓ系のレーザに用
いてもよい。In the above embodiments, an InP-based PBC-LD was described, but other structures or GaAs-based lasers may be used.
（発明の効果）
以上説明したようにこの発明は、レーザ構造をなす結晶
成長終了後、活性層をメサ内部に含むようにレジストパ
ターンをマスクにしてメサ形成を行い、このメサ上部に
前記レジストパターンを残した状態で全面に絶縁膜を形
成し、その後、前記メサ上部のレジストパターンを除去
し、前記メサ上部のみにオーム性接触する電極を形成す
るので、メサ部の絶縁膜の除去をセルファラインで行う
ことにより工程が簡略化され、高速応答可能な半導体レ
ーザが得られる効果がある。(Effects of the Invention) As explained above, in the present invention, after the crystal growth forming a laser structure is completed, a mesa is formed using a resist pattern as a mask so that the active layer is contained inside the mesa, and the resist pattern is placed on the upper part of the mesa. An insulating film is formed on the entire surface while leaving a part of the mesa, and then the resist pattern on the upper part of the mesa is removed, and an electrode that makes ohmic contact only on the upper part of the mesa is formed. By doing so, the process is simplified and a semiconductor laser capable of high-speed response can be obtained.
第１図はこの発明の一実施例を示す半導体レーザの工程
断面図、第２図は従来の半導体レーザの製造工程を示す
断面図である。
図において、１はｐ−ＩｎＰ基板、２はｎ−ＩｎＰ層、
３はｐ−ＩｎＰ層、４はｎ−ＩｎＰ層、５はｐ−ＩｎＰ
層、６は活性層、７はｎ−ＩｎＰ層、８はｎ−ＩｎＧａ
ＡｓＰ層、９はレジスト、１０は絶縁膜、１１はｎ電極
、１２はｐ電極である。
なお、各図中の同一符号は同一または相当部分を示す。FIG. 1 is a cross-sectional view showing a semiconductor laser manufacturing process according to an embodiment of the present invention, and FIG. 2 is a cross-sectional view showing a conventional semiconductor laser manufacturing process. In the figure, 1 is a p-InP substrate, 2 is an n-InP layer,
3 is p-InP layer, 4 is n-InP layer, 5 is p-InP
layer, 6 is active layer, 7 is n-InP layer, 8 is n-InGa
An AsP layer, 9 a resist, 10 an insulating film, 11 an n electrode, and 12 a p electrode. Note that the same reference numerals in each figure indicate the same or corresponding parts.
Claims (1)
含むようにレジストパターンをマスクにしてメサ形成を
行い、このメサ上部に前記レジストパターンを残した状
態で全面に絶縁膜を形成し、その後、前記メサ上部のレ
ジストパターンを除去し、前記メサ上部のみにオーム性
接触する電極を形成することを特徴とする半導体レーザ
の製造方法。After the crystal growth forming the laser structure is completed, a mesa is formed using a resist pattern as a mask so that the active layer is included inside the mesa, and an insulating film is formed on the entire surface with the resist pattern remaining on the upper part of the mesa. . A method of manufacturing a semiconductor laser, comprising: removing a resist pattern on the upper part of the mesa, and forming an electrode in ohmic contact only on the upper part of the mesa.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP26735788A JPH02114582A (en) | 1988-10-24 | 1988-10-24 | Manufacture of semiconductor laser |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP26735788A JPH02114582A (en) | 1988-10-24 | 1988-10-24 | Manufacture of semiconductor laser |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02114582A true JPH02114582A (en) | 1990-04-26 |
Family
ID=17443696
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP26735788A Pending JPH02114582A (en) | 1988-10-24 | 1988-10-24 | Manufacture of semiconductor laser |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02114582A (en) |
-
1988
- 1988-10-24 JP JP26735788A patent/JPH02114582A/en active Pending
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