JP6693131B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP6693131B2 JP6693131B2 JP2016003515A JP2016003515A JP6693131B2 JP 6693131 B2 JP6693131 B2 JP 6693131B2 JP 2016003515 A JP2016003515 A JP 2016003515A JP 2016003515 A JP2016003515 A JP 2016003515A JP 6693131 B2 JP6693131 B2 JP 6693131B2
- Authority
- JP
- Japan
- Prior art keywords
- column
- region
- section
- conductivity type
- type
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000004065 semiconductor Substances 0.000 title claims description 72
- 239000012535 impurity Substances 0.000 claims description 129
- 239000000758 substrate Substances 0.000 claims description 59
- 238000002955 isolation Methods 0.000 claims description 26
- 239000010410 layer Substances 0.000 description 64
- 238000010586 diagram Methods 0.000 description 29
- 230000015556 catabolic process Effects 0.000 description 22
- 230000005684 electric field Effects 0.000 description 22
- 239000010408 film Substances 0.000 description 17
- 238000000034 method Methods 0.000 description 8
- 238000009826 distribution Methods 0.000 description 6
- 239000011229 interlayer Substances 0.000 description 6
- 239000002131 composite material Substances 0.000 description 5
- 238000000059 patterning Methods 0.000 description 5
- 230000015572 biosynthetic process Effects 0.000 description 4
- 238000009792 diffusion process Methods 0.000 description 4
- 238000005530 etching Methods 0.000 description 4
- 238000002513 implantation Methods 0.000 description 4
- 230000008569 process Effects 0.000 description 3
- 230000002040 relaxant effect Effects 0.000 description 3
- 230000008859 change Effects 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 229920005591 polysilicon Polymers 0.000 description 2
- 239000011669 selenium Substances 0.000 description 2
- 238000004088 simulation Methods 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- BUGBHKTXTAQXES-UHFFFAOYSA-N Selenium Chemical compound [Se] BUGBHKTXTAQXES-UHFFFAOYSA-N 0.000 description 1
- 230000004913 activation Effects 0.000 description 1
- 239000008186 active pharmaceutical agent Substances 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 229910052711 selenium Inorganic materials 0.000 description 1
- 230000007480 spreading Effects 0.000 description 1
- 238000003892 spreading Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
- H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
- H01L27/0629—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with diodes, or resistors, or capacitors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/063—Reduced surface field [RESURF] pn-junction structures
- H01L29/0634—Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
- H01L21/2251—Diffusion into or out of group IV semiconductors
- H01L21/2252—Diffusion into or out of group IV semiconductors using predeposition of impurities into the semiconductor surface, e.g. from a gaseous phase
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0207—Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0638—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for preventing surface leakage due to surface inversion layer, e.g. with channel stopper
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/083—Anode or cathode regions of thyristors or gated bipolar-mode devices
- H01L29/0834—Anode regions of thyristors or gated bipolar-mode devices, e.g. supplementary regions surrounding anode regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1095—Body region, i.e. base region, of DMOS transistors or IGBTs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/402—Field plates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/408—Electrodes ; Multistep manufacturing processes therefor with an insulating layer with a particular dielectric or electrostatic property, e.g. with static charges or for controlling trapped charges or moving ions, or with a plate acting on the insulator potential or the insulator charges, e.g. for controlling charges effect or potential distribution in the insulating layer, or with a semi-insulating layer contacting directly the semiconductor surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
- H01L29/7395—Vertical transistors, e.g. vertical IGBT
- H01L29/7396—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions
- H01L29/7397—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7803—Vertical DMOS transistors, i.e. VDMOS transistors structurally associated with at least one other device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7803—Vertical DMOS transistors, i.e. VDMOS transistors structurally associated with at least one other device
- H01L29/7804—Vertical DMOS transistors, i.e. VDMOS transistors structurally associated with at least one other device the other device being a pn-junction diode
- H01L29/7805—Vertical DMOS transistors, i.e. VDMOS transistors structurally associated with at least one other device the other device being a pn-junction diode in antiparallel, e.g. freewheel diode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7811—Vertical DMOS transistors, i.e. VDMOS transistors with an edge termination structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7813—Vertical DMOS transistors, i.e. VDMOS transistors with trench gate electrode, e.g. UMOS transistors
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
- H01L21/2251—Diffusion into or out of group IV semiconductors
- H01L21/2252—Diffusion into or out of group IV semiconductors using predeposition of impurities into the semiconductor surface, e.g. from a gaseous phase
- H01L21/2253—Diffusion into or out of group IV semiconductors using predeposition of impurities into the semiconductor surface, e.g. from a gaseous phase by ion implantation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/266—Bombardment with radiation with high-energy radiation producing ion implantation using masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823418—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823487—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of vertical transistor structures, i.e. with channel vertical to the substrate surface
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/003—Constructional details, e.g. physical layout, assembly, wiring or busbar connections
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Composite Materials (AREA)
- General Engineering & Computer Science (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Description
[先行技術文献]
[特許文献]
[特許文献1] 特開平04−354156号公報
[特許文献2] 特開2012−142537号公報
[特許文献3] 特開2014−056942号公報
[特許文献4] 特開2002−314082号公報
[特許文献5] 特開2007−335844号公報
Claims (11)
- 半導体基板と、
前記半導体基板の一の主面側から他の主面側にそれぞれ延伸して設けられ、第1導電型の不純物を有する第1カラムと第2導電型の不純物を有する第2カラムとの繰り返し構造を有するスーパージャンクション型MOSFET部と、
前記半導体基板において前記スーパージャンクション型MOSFET部から離間して設けられ、第2導電型の不純物を含むドリフト領域を有する並列デバイス部と、
前記半導体基板において前記スーパージャンクション型MOSFET部と前記並列デバイス部との間に位置する境界部と、
を備え、
前記境界部は、前記スーパージャンクション型MOSFET部から前記並列デバイス部に向かう前記半導体基板の外側方向の異なる位置において、前記一の主面側から前記他の主面側に延伸し、かつ、第1導電型の不純物を有する複数の第3カラムと、
前記複数の第3カラムの各々の間に、第2導電型の不純物を有する第4カラムと
を有し、
前記複数の第3カラムの深さは、前記第1カラムおよび前記第2カラムよりも浅く、前記外側方向に進むにつれて徐々に浅くなり、
前記第4カラムの第2導電型の不純物濃度は、前記ドリフト領域における前記第2導電型の不純物濃度以上であり、
前記複数の第3カラムにおける第1導電型の不純物濃度は、前記ドリフト領域における前記第2導電型の不純物濃度以上であり、
前記第4カラムの深さは、前記外側方向の逆方向において隣接する前記複数の第3カラムの一つの深さよりも小さく、
前記複数の第3カラムは、前記複数の第3カラムの底部において前記外側方向に突出する突出領域を有する半導体装置。 - 半導体基板と、
前記半導体基板の一の主面側から他の主面側にそれぞれ延伸して設けられ、第1導電型の不純物を有する第1カラムと第2導電型の不純物を有する第2カラムとの繰り返し構造を有するスーパージャンクション型MOSFET部と、
前記半導体基板において前記スーパージャンクション型MOSFET部から離間して設けられ、第2導電型の不純物を含むドリフト領域を有する並列デバイス部と、
前記半導体基板において前記スーパージャンクション型MOSFET部と前記並列デバイス部との間に位置する境界部と、
を備え、
前記境界部は、前記スーパージャンクション型MOSFET部から前記並列デバイス部に向かう前記半導体基板の外側方向の異なる位置において、前記一の主面側から前記他の主面側に延伸し、かつ、第1導電型の不純物を有する複数の第3カラムと、
前記複数の第3カラムの各々の間に、第2導電型の不純物を有する第4カラムと
を有し、
前記複数の第3カラムの深さは、前記第1カラムおよび前記第2カラムよりも浅く、前記外側方向に進むにつれて徐々に浅くなり、
前記第4カラムの深さは、前記外側方向の逆方向において隣接する前記複数の第3カラムの一つの深さよりも小さく、
前記複数の第3カラムは、前記複数の第3カラムの底部において前記外側方向に突出する突出領域を有する半導体装置。 - 前記突出領域は、前記外側方向において隣接する前記第4カラムと接しない
請求項1または2に記載の半導体装置。 - 前記第4カラムの深さは、前記外側方向において隣接する前記複数の第3カラムの一つの深さに等しい
請求項1から3のいずれか一項に記載の半導体装置。 - 半導体基板と、
前記半導体基板の一の主面側から他の主面側にそれぞれ延伸して設けられ、第1導電型の不純物を有する第1カラムと第2導電型の不純物を有する第2カラムとの繰り返し構造を有するスーパージャンクション型MOSFET部と、
前記半導体基板において前記スーパージャンクション型MOSFET部から離間して設けられ、第2導電型の不純物を含むドリフト領域を有する並列デバイス部と、
前記半導体基板において前記スーパージャンクション型MOSFET部と前記並列デバイス部との間に位置する境界部と、
を備え、
前記境界部は、前記スーパージャンクション型MOSFET部から前記並列デバイス部に向かう前記半導体基板の外側方向の異なる位置において、前記一の主面側から前記他の主面側に延伸し、かつ、第1導電型の不純物を有する複数の第3カラムと、
前記複数の第3カラムの各々の間に、第2導電型の不純物を有する第4カラムと
を有し、
前記複数の第3カラムの深さは、前記第1カラムおよび前記第2カラムよりも浅く、前記外側方向に進むにつれて徐々に浅くなり、
前記第4カラムの第2導電型の不純物濃度は、前記ドリフト領域における前記第2導電型の不純物濃度以上であり、
前記複数の第3カラムにおける第1導電型の不純物濃度は、前記ドリフト領域における前記第2導電型の不純物濃度以上であり、
前記境界部は、前記外側方向の端部において、同じ深さの前記複数の第3カラムの一つおよび前記第4カラムを前記外側方向に連続して二組有する半導体装置。 - 半導体基板と、
前記半導体基板の一の主面側から他の主面側にそれぞれ延伸して設けられ、第1導電型の不純物を有する第1カラムと第2導電型の不純物を有する第2カラムとの繰り返し構造を有するスーパージャンクション型MOSFET部と、
前記半導体基板において前記スーパージャンクション型MOSFET部から離間して設けられ、第2導電型の不純物を含むドリフト領域を有する並列デバイス部と、
前記半導体基板において前記スーパージャンクション型MOSFET部と前記並列デバイス部との間に位置する境界部と、
を備え、
前記境界部は、前記一の主面側から前記他の主面側に延伸し、かつ、第1導電型の不純物を有する第3カラムを少なくとも一つ有し、
前記第3カラムの深さは、前記第1カラムおよび前記第2カラムよりも浅く、
前記スーパージャンクション型MOSFET部は、前記他の主面側に、第2導電型の不純物を有する第1のバッファ領域をさらに備え、
前記第1のバッファ領域の前記境界部側の端部は、前記スーパージャンクション型MOSFET部における前記境界部に最も近い前記第1カラムおよび前記第2カラムから離れて位置する半導体装置。 - 前記境界部は、前記第1のバッファ領域より前記他の主面側に位置し、第2導電型の不純物を有する第2のバッファ領域をさらに備え、
前記一の主面側から前記他の主面側に向かう方向における前記第1のバッファ領域の厚さは、前記一の主面側から前記他の主面側に向かう方向における前記第2のバッファ領域の厚さより厚い
請求項6に記載の半導体装置。 - 半導体基板と、
前記半導体基板の一の主面側から他の主面側にそれぞれ延伸して設けられ、第1導電型の不純物を有する第1カラムと第2導電型の不純物を有する第2カラムとの繰り返し構造を有するスーパージャンクション型MOSFET部と、
前記半導体基板において前記スーパージャンクション型MOSFET部から離間して設けられ、第2導電型の不純物を含むドリフト領域を有する並列デバイス部と、
前記半導体基板において前記スーパージャンクション型MOSFET部と前記並列デバイス部との間に位置する境界部と、
を備え、
前記境界部は、前記一の主面側から前記他の主面側に延伸し、かつ、第1導電型の不純物を有する第3カラムを少なくとも一つ有し、
前記第3カラムの深さは、前記第1カラムおよび前記第2カラムよりも浅く、 前記スーパージャンクション型MOSFET部は、
前記第1カラムと前記第2カラムとの繰り返し構造上に位置し、第1導電型の不純物を有するベース領域と、
前記ベース領域の最表面の一部を含み、第2導電型の不純物を有するソース領域と、
前記ソース領域に電気的に接続し、前記ベース領域上に設けられたソース電極と、
前記ベース領域の前記最表面であって前記ソース領域とは異なる領域に設けられ、前記ベース領域上に設けられた前記ソース電極と電気的に接続し、前記ソース領域よりも低い第2導電型の不純物濃度を有する表面領域と、
前記表面領域の一部から下に向かって、前記第2カラムと前記第2カラムに隣接する前記第1カラムとの境界に到達するまで延伸する第1分離トレンチと
をさらに備える、
半導体装置。 - 前記境界部は、
前記スーパージャンクション型MOSFET部から延伸して設けられた前記ベース領域と、
前記スーパージャンクション型MOSFET部から延伸して設けられた前記表面領域と、
前記表面領域の一部から下に向かって、前記第3カラム、第4カラムならびに互いに隣接する前記第3カラムと前記第4カラムとの境界のうちいずれかに到達するまで延伸して設けられた第2分離トレンチと
を備える
請求項8に記載の半導体装置。 - 前記並列デバイス部は、還流ダイオード部およびIGBT部のいずれか一方である
請求項1から9のいずれか一項に記載の半導体装置。 - 半導体基板と、
前記半導体基板の一の主面側から他の主面側にそれぞれ延伸して設けられ、第1導電型の不純物を有する第1カラムと第2導電型の不純物を有する第2カラムとの繰り返し構造を有するスーパージャンクション型MOSFET部と、
前記半導体基板において前記スーパージャンクション型MOSFET部から離間して設けられ、第2導電型の不純物を含むドリフト領域を有する還流ダイオード部と、
前記半導体基板において前記スーパージャンクション型MOSFET部と前記還流ダイオード部との間に位置する境界部と、
前記スーパージャンクション型MOSFET部から前記還流ダイオード部に向かう外側方向において前記還流ダイオード部に隣接するIGBT部と、
前記外側方向において前記IGBT部に隣接する耐圧構造部と
を備え、
前記境界部は、前記一の主面側から前記他の主面側に延伸し、かつ、第1導電型の不純物を有する第3カラムを少なくとも一つ有し、
前記第3カラムの深さは、前記第1カラムおよび前記第2カラムよりも浅く、
前記スーパージャンクション型MOSFET部、前記境界部、前記還流ダイオード部および前記IGBT部は一つの前記半導体基板に設けられる半導体装置。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2016003515A JP6693131B2 (ja) | 2016-01-12 | 2016-01-12 | 半導体装置 |
CN201611060444.XA CN107039419B (zh) | 2016-01-12 | 2016-11-25 | 半导体装置 |
US15/364,178 US10050105B2 (en) | 2016-01-12 | 2016-11-29 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2016003515A JP6693131B2 (ja) | 2016-01-12 | 2016-01-12 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2017126600A JP2017126600A (ja) | 2017-07-20 |
JP6693131B2 true JP6693131B2 (ja) | 2020-05-13 |
Family
ID=59276095
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2016003515A Active JP6693131B2 (ja) | 2016-01-12 | 2016-01-12 | 半導体装置 |
Country Status (3)
Country | Link |
---|---|
US (1) | US10050105B2 (ja) |
JP (1) | JP6693131B2 (ja) |
CN (1) | CN107039419B (ja) |
Families Citing this family (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE112017000079T5 (de) * | 2016-03-10 | 2018-05-17 | Fuji Electric Co., Ltd. | Halbleitervorrichtung |
US10861931B2 (en) | 2016-12-08 | 2020-12-08 | Cree, Inc. | Power semiconductor devices having gate trenches and buried edge terminations and related methods |
TWI609487B (zh) | 2016-12-30 | 2017-12-21 | 新唐科技股份有限公司 | 半導體裝置 |
TWI609486B (zh) * | 2016-12-30 | 2017-12-21 | 新唐科技股份有限公司 | 高壓半導體裝置 |
US10580884B2 (en) * | 2017-03-08 | 2020-03-03 | D3 Semiconductor LLC | Super junction MOS bipolar transistor having drain gaps |
JP6891560B2 (ja) * | 2017-03-15 | 2021-06-18 | 富士電機株式会社 | 半導体装置 |
JP7039937B2 (ja) * | 2017-11-07 | 2022-03-23 | 富士電機株式会社 | 半導体装置 |
TWI634658B (zh) | 2017-12-29 | 2018-09-01 | 新唐科技股份有限公司 | 半導體裝置 |
DE102018132435B4 (de) | 2018-12-17 | 2021-01-21 | Infineon Technologies Austria Ag | Verfahren zum Herstellen eines Superjunction-Transistorbauelements |
US10957759B2 (en) * | 2018-12-21 | 2021-03-23 | General Electric Company | Systems and methods for termination in silicon carbide charge balance power devices |
DE102019107112B3 (de) * | 2019-03-20 | 2020-07-09 | Lisa Dräxlmaier GmbH | Schaltvorrichtung, Spannungsversorgungssystem, Verfahren zum Betreiben einer Schaltvorrichtung und Herstellverfahren |
JP7443702B2 (ja) | 2019-09-10 | 2024-03-06 | 富士電機株式会社 | 半導体装置 |
US11342410B2 (en) | 2019-09-27 | 2022-05-24 | Alpha And Omega Semiconductor (Cayman) Ltd. | Improving IGBT light load efficiency |
US10931276B1 (en) * | 2019-09-27 | 2021-02-23 | Alpha And Omega Semiconductor (Cayman) Ltd. | Combined IGBT and superjunction MOSFET device with tuned switching speed |
JP7486599B2 (ja) * | 2020-03-17 | 2024-05-17 | 華為技術有限公司 | 絶縁ゲートバイポーラトランジスタ、モータ制御ユニット、及び車両 |
EP4030490A4 (en) * | 2020-06-12 | 2022-12-07 | Huawei Digital Power Technologies Co., Ltd. | REVERSE PASSING SUPERJUNCTION INSULATED GRID BIPOLAR TRANSISTOR AND ELECTRIC VEHICLE MOTOR CONTROL UNIT |
CN111900087B (zh) * | 2020-08-31 | 2022-09-20 | 华虹半导体(无锡)有限公司 | Igbt器件的制造方法 |
CN114883380B (zh) * | 2021-06-10 | 2023-12-22 | 上海林众电子科技有限公司 | 一种绝缘栅半导体器件及其制备方法 |
CN116314276B (zh) * | 2023-05-12 | 2023-07-28 | 深圳市威兆半导体股份有限公司 | 半导体器件 |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04354156A (ja) | 1991-05-31 | 1992-12-08 | Fuji Electric Co Ltd | 半導体スイッチング装置 |
DE69833743T2 (de) * | 1998-12-09 | 2006-11-09 | Stmicroelectronics S.R.L., Agrate Brianza | Herstellungmethode einer integrierte Randstruktur für Hochspannung-Halbleiteranordnungen |
JP4761644B2 (ja) | 2001-04-18 | 2011-08-31 | 三菱電機株式会社 | 半導体装置 |
JP2006073740A (ja) * | 2004-09-01 | 2006-03-16 | Toshiba Corp | 半導体装置及びその製造方法 |
JP5201307B2 (ja) * | 2005-12-22 | 2013-06-05 | 富士電機株式会社 | 半導体装置 |
JP5342752B2 (ja) * | 2006-05-16 | 2013-11-13 | 株式会社東芝 | 半導体装置 |
US7737469B2 (en) * | 2006-05-16 | 2010-06-15 | Kabushiki Kaisha Toshiba | Semiconductor device having superjunction structure formed of p-type and n-type pillar regions |
DE102006025218B4 (de) * | 2006-05-29 | 2009-02-19 | Infineon Technologies Austria Ag | Leistungshalbleiterbauelement mit Ladungskompensationsstruktur und Verfahren zur Herstellung desselben |
JP2012142537A (ja) | 2010-12-16 | 2012-07-26 | Mitsubishi Electric Corp | 絶縁ゲート型バイポーラトランジスタとその製造方法 |
JP5787853B2 (ja) | 2012-09-12 | 2015-09-30 | 株式会社東芝 | 電力用半導体装置 |
DE112013005788B4 (de) * | 2012-12-04 | 2019-02-07 | Denso Corporation | Halbleitervorrichtung und Verfahren zu deren Fertigung |
JP6197294B2 (ja) * | 2013-01-16 | 2017-09-20 | 富士電機株式会社 | 半導体素子 |
US9385222B2 (en) * | 2014-02-14 | 2016-07-05 | Infineon Technologies Ag | Semiconductor device with insert structure at a rear side and method of manufacturing |
-
2016
- 2016-01-12 JP JP2016003515A patent/JP6693131B2/ja active Active
- 2016-11-25 CN CN201611060444.XA patent/CN107039419B/zh active Active
- 2016-11-29 US US15/364,178 patent/US10050105B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
JP2017126600A (ja) | 2017-07-20 |
US10050105B2 (en) | 2018-08-14 |
CN107039419B (zh) | 2021-08-31 |
CN107039419A (zh) | 2017-08-11 |
US20170200784A1 (en) | 2017-07-13 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP6693131B2 (ja) | 半導体装置 | |
US9653599B2 (en) | Semiconductor device and method of manufacturing semiconductor device | |
US8415711B2 (en) | Semiconductor device and method for manufacturing the same | |
JP6319454B2 (ja) | 半導体装置および半導体装置の製造方法 | |
US9087893B2 (en) | Superjunction semiconductor device with reduced switching loss | |
US10186610B2 (en) | Semiconductor device and method of manufacturing the semiconductor device | |
CN102299180B (zh) | 包含单元区和具有高击穿电压结构的***区的半导体器件 | |
US9559171B2 (en) | Semiconductor device | |
JP2022022449A (ja) | 半導体装置 | |
JP2000040822A (ja) | 超接合半導体素子およびその製造方法 | |
KR20120135121A (ko) | 초접합 mosfet와 다이오드가 집적된 반도체 구조물 및 그 형성 방법 | |
US20180182886A1 (en) | Semiconductor device and method of manufacturing semiconductor device | |
JP6551156B2 (ja) | スーパージャンクション型mosfetデバイスおよび半導体チップ | |
JP7056031B2 (ja) | 半導体装置 | |
JP2003101022A (ja) | 電力用半導体素子 | |
JP6477174B2 (ja) | 半導体装置および半導体装置の製造方法 | |
CN108292676A (zh) | 碳化硅半导体装置 | |
JP5687582B2 (ja) | 半導体素子およびその製造方法 | |
JP5299373B2 (ja) | 半導体素子 | |
JP2010225833A (ja) | 半導体装置 | |
TWI470701B (zh) | 用於半導體元件之超接面結構及其製程 | |
JP2002164542A (ja) | 集積回路装置及びその製造方法 | |
KR101360070B1 (ko) | 반도체 소자 및 그 제조 방법 | |
CN104347614A (zh) | 功率半导体器件及其制造方法 | |
KR101550798B1 (ko) | 래치업 억제구조를 가지는 전력용 반도체 장치 및 그 제조방법 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20161026 |
|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20181114 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20190826 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20190903 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20191016 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20191224 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20200203 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20200317 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20200330 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 6693131 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |