JP6344197B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP6344197B2 JP6344197B2 JP2014221328A JP2014221328A JP6344197B2 JP 6344197 B2 JP6344197 B2 JP 6344197B2 JP 2014221328 A JP2014221328 A JP 2014221328A JP 2014221328 A JP2014221328 A JP 2014221328A JP 6344197 B2 JP6344197 B2 JP 6344197B2
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- 239000004065 semiconductor Substances 0.000 title claims description 123
- 239000000758 substrate Substances 0.000 claims description 58
- 229910052751 metal Inorganic materials 0.000 claims description 26
- 239000002184 metal Substances 0.000 claims description 26
- 238000007789 sealing Methods 0.000 claims description 8
- 239000011347 resin Substances 0.000 claims description 7
- 229920005989 resin Polymers 0.000 claims description 7
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 7
- 239000004020 conductor Substances 0.000 description 7
- 229910052802 copper Inorganic materials 0.000 description 7
- 239000010949 copper Substances 0.000 description 7
- 238000010586 diagram Methods 0.000 description 6
- 238000004519 manufacturing process Methods 0.000 description 6
- 229910052782 aluminium Inorganic materials 0.000 description 5
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 5
- 239000000463 material Substances 0.000 description 5
- 230000006378 damage Effects 0.000 description 3
- 230000020169 heat generation Effects 0.000 description 3
- 238000010338 mechanical breakdown Methods 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 230000008054 signal transmission Effects 0.000 description 3
- 229910000679 solder Inorganic materials 0.000 description 3
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
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- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
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- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
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- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
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- Microelectronics & Electronic Packaging (AREA)
- Chemical & Material Sciences (AREA)
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Description
本発明は、このような点を鑑みてなされたものであり、配線インダクタンスが低減された半導体装置を提供することを目的とする。
なお、以下の実施の形態の記載に用いられている「電気的かつ機械的に接続されている」という用語は、導電性の対象物同士が直接接合により接合されている場合に限られず、はんだや金属焼結材等の導電性の接合材を介して、導電性の対象物同士が接合されている場合も含むものとする。
第1の実施の形態の半導体装置について、図1を用いて説明する。
図1は、第1の実施の形態の半導体装置を示す図である。
半導体素子2は、例えば、パワー半導体素子であって、具体的には、IGBT、パワーMOSFET(Metal Oxide Semiconductor Field Effect Transistor)、サイリスタ等のスイッチング素子のいずれか1つ、または、複数により構成される。以下においては、半導体素子2がパワーMOSFETである場合について説明する。半導体素子2は、金属基板1上に配置されており、おもて面に制御信号が入力されるゲート電極と、出力用のソース電極とを備える。また裏面には、入力用のドレイン電極が設けられている。半導体素子2は、ドレイン電極が金属基板1に電気的に接続されるように金属基板1の主面に固定されている。なお、半導体素子2は、1個に限らず、図1に示されるように、複数を金属基板1上に配置することができる。
図2は、参考例の半導体装置を示す図である。
半導体装置10aでは、図1で説明したように、金属基板の主面上に半導体素子と絶縁基板3とがそれぞれ配置されている。そして、半導体素子のゲート電極が絶縁基板3の第1回路板3b1に、半導体素子のソース電極が絶縁基板3の第2回路板3b2にそれぞれワイヤにて電気的に接続されている。
第2の実施の形態の半導体装置について、図3を用いて説明する。
図3は、第2の実施の形態の半導体装置を示す図である。
このような第2端子150の詳細について図4を用いて説明する。
図4(A)は、第2端子150の上面図、図4(B)は、第2端子150の側面図、図4(C)は、第2端子150の下面図をそれぞれ示している。
図5は、第2の実施の形態の半導体装置の接触部材、第1端子、第2端子を示す斜視図である。
接触部材160は、バネ板161と、バネ板161の中心部に設けられたネジ162とを有する。バネ板161は、所定の弾性力を備えた、銅等の導電性材料で構成され、例えば、図5(A)に示されるように、両端が上方に持ち上がった形状をなしている。
図6は、第2の実施の形態の半導体装置に対する外部端子の接触を説明するための図である。
第3の実施の形態では、第2の実施の形態の場合において、別の第2端子が用いられた場合を例に挙げる。
半導体装置1000は、第2の実施の形態の半導体装置100(図3)において、第2端子1500が設けられている。
2 半導体素子
3 絶縁基板
3a 絶縁板
3b1 第1回路板
3b2 第2回路板
3c 金属板
4a,4b ワイヤ
5 第1端子
6 第2端子
6a 貫通孔
6b 胴体部
6c 支持部
7a 第1外部端子
7b 絶縁フィルム
7c 第2外部端子
10 半導体装置
Claims (9)
- おもて面にゲート電極とソース電極を備える半導体素子と、
絶縁板と、前記絶縁板の主面に設けられ、前記ゲート電極と電気的に接続された第1回路板と、前記主面に設けられ、前記第1回路板を取り囲み、前記ソース電極と電気的に接続された第2回路板とを備える絶縁基板と、
前記第1回路板に電気的かつ機械的に接続された柱体状の第1端子と、
前記第1端子が隙間を空けて挿通される貫通孔を備えた筒形状の胴体部と、前記胴体部の端部に配置され、前記第2回路板に電気的かつ機械的に接続された支持部と、を備える第2端子と、
を有する半導体装置。 - 前記半導体素子は裏面にドレイン電極をさらに備え、
前記半導体素子の前記ドレイン電極に電気的かつ機械的に接続され、前記絶縁基板が固定される金属基板をさらに有する請求項1記載の半導体装置。 - 前記金属基板が入力用の外部端子である請求項2記載の半導体装置。
- 前記第2端子は、前記支持部に切り欠き部をさらに備え、
前記第1回路板を跨ぐように前記切り欠き部が配置されている請求項1乃至3のいずれか1項に記載の半導体装置。 - 前記切り欠き部は前記支持部に複数備えられ、それぞれ対向して配置されている請求項4記載の半導体装置。
- 前記第1端子と、前記第2端子の前記貫通孔の内壁との隙間は、0.5mm〜1mmである請求項1乃至3のいずれか1項に記載の半導体装置。
- 前記隙間に、封止樹脂が充填されている請求項6記載の半導体装置。
- 前記第1端子は円柱状であり、前記第2端子の前記胴体部は円筒形状である請求項1乃至3のいずれか1項に記載の半導体装置。
- 前記胴体部の延在方向に対して直交する断面は前記支持部に向かうに連れて拡径している請求項8記載の半導体装置。
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JP2014221328A JP6344197B2 (ja) | 2014-10-30 | 2014-10-30 | 半導体装置 |
US14/879,682 US9589867B2 (en) | 2014-10-30 | 2015-10-09 | Semiconductor device |
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JP2014221328A JP6344197B2 (ja) | 2014-10-30 | 2014-10-30 | 半導体装置 |
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JP2016092062A JP2016092062A (ja) | 2016-05-23 |
JP6344197B2 true JP6344197B2 (ja) | 2018-06-20 |
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Publication number | Priority date | Publication date | Assignee | Title |
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JP6543129B2 (ja) * | 2015-07-29 | 2019-07-10 | ルネサスエレクトロニクス株式会社 | 電子装置 |
JP6701641B2 (ja) * | 2015-08-13 | 2020-05-27 | 富士電機株式会社 | 半導体モジュール |
JP7183594B2 (ja) * | 2018-07-04 | 2022-12-06 | 富士電機株式会社 | 半導体装置 |
US20230254970A1 (en) * | 2020-06-03 | 2023-08-10 | Sumitomo Bakelite Co., Ltd. | Circuit board |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
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JPH0666411B2 (ja) * | 1987-11-06 | 1994-08-24 | 富士電機株式会社 | 平形半導体装置 |
US5519253A (en) * | 1993-09-07 | 1996-05-21 | Delco Electronics Corp. | Coaxial switch module |
JP3228043B2 (ja) | 1994-03-24 | 2001-11-12 | 富士電機株式会社 | 平形半導体スイッチの並列接続構造 |
DE69509428T2 (de) | 1994-03-24 | 1999-09-30 | Fuji Electric Co Ltd | Struktur einer Parallelschaltverbindung für flache Halbleiterschalter |
US5512790A (en) * | 1994-07-21 | 1996-04-30 | Delco Electronics Corporation | Triaxial double switch module |
JP3375812B2 (ja) * | 1996-02-21 | 2003-02-10 | 三菱電機株式会社 | 圧接型半導体装置及び半導体素子 |
JP2000252405A (ja) * | 1999-03-03 | 2000-09-14 | Fuji Electric Co Ltd | 低インダクタンス電力用半導体素子または装置 |
JP4434879B2 (ja) * | 2004-08-24 | 2010-03-17 | 三菱電機株式会社 | 電力用半導体装置 |
JP2007115771A (ja) * | 2005-10-18 | 2007-05-10 | Nec System Technologies Ltd | Lsiピン |
US8629536B2 (en) * | 2011-02-01 | 2014-01-14 | International Business Machines Corporation | High performance on-chip vertical coaxial cable, method of manufacture and design structure |
JP5558595B2 (ja) * | 2012-03-14 | 2014-07-23 | 株式会社東芝 | 半導体装置及び半導体装置の製造方法 |
JP2013219290A (ja) * | 2012-04-12 | 2013-10-24 | Panasonic Corp | 半導体装置 |
EP2862202B1 (en) * | 2012-06-19 | 2016-04-27 | ABB Technology AG | Substrate for mounting multiple power transistors thereon and power semiconductor module |
KR102143890B1 (ko) * | 2013-10-15 | 2020-08-12 | 온세미컨덕터코리아 주식회사 | 파워 모듈 패키지 및 이의 제조 방법 |
JP6330436B2 (ja) * | 2014-04-01 | 2018-05-30 | 富士電機株式会社 | パワー半導体モジュール |
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