JP5536975B2 - 回路装置およびその製造方法 - Google Patents
回路装置およびその製造方法 Download PDFInfo
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- JP5536975B2 JP5536975B2 JP2007021810A JP2007021810A JP5536975B2 JP 5536975 B2 JP5536975 B2 JP 5536975B2 JP 2007021810 A JP2007021810 A JP 2007021810A JP 2007021810 A JP2007021810 A JP 2007021810A JP 5536975 B2 JP5536975 B2 JP 5536975B2
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Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Description
11 金属細線
12 ケース材
13 チップ素子
14 区画部
15 ネジ孔
16 第1リード
17 絶縁基板
18 第2リード
19 湾曲部
20 封止樹脂
22 第1領域
24 第2領域
26 第1側壁部
28 第2側壁部
30 第3側壁部
32 第4側壁部
34 半導体素子
36 分離部
38 回路基板
40 絶縁層
42 導電パターン
44 パッド
46 パッド
48 ノズル
Claims (8)
- 導電パターンおよび回路素子から成る混成集積回路が上面に組み込まれた回路基板と、
額縁状の形状を有して内側の面が前記回路基板の側面に当接し、上部が前記回路基板の上面よりも上方に突出するケース材と、
前記ケース材に囲まれる領域に充填されて前記混成集積回路を封止する封止樹脂と、
前記導電パターンから成るパッドに固着されて、部分的に上端が低く形成された前記ケース材の側壁部の上方から外部に延在するリードと、を有し、
前記混成集積回路が形成される第1領域と前記パッドが設けられる第2領域とを区画し、下端が前記第2領域側に接近して傾斜する形状である区画部を前記ケース材に設けることを特徴とする回路装置。 - 前記ケース材の前記区画部は、前記回路基板の一側辺に対して平行に且つ直線的に延在することを特徴とする請求項1に記載の回路装置。
- 前記ケース材の前記第2領域に面する側壁部の上端部は、他の側壁部の上端部よりも下方に位置することを特徴とする請求項1または請求項2に記載の回路装置。
- 前記区画部の下端は、前記区画部の上端よりも前記第2領域に接近することを特徴とする請求項1から請求項3の何れかに記載の回路装置。
- 導電パターンおよび回路素子を回路基板の上面に形成し、前記導電パターンおよび前記回路素子から成る混成集積回路が形成される第1領域と、前記導電パターンから成るパッドが配置される第2領域を前記回路基板の上面に設ける第1工程と、
額縁状の形状を有し、前記第1領域と前記第2領域とを区画し、下端が前記第2領域側に接近して傾斜する形状である区画部を有するケース材の内壁を前記回路基板に嵌合させる第2工程と、
部分的に上端が低く形成された前記ケース材の側壁部の上方から外部に延在するようにリードを固着する第3工程と、
前記第1領域および前記第2領域に封止樹脂を充填し、前記混成集積回路および前記パッドを封止する第4工程と、を有することを特徴とする回路装置の製造方法。 - 前記第4工程にてノズルを用いて前記第2領域に前記封止樹脂を供給するときは、前記ノズルの端部は、前記区画部の上端よりも下方に位置し、且つ、前記区画部の下端よりも前記第1領域側に位置することを特徴とする請求項5に記載の回路装置の製造方法。
- 前記第4工程では、前記第2領域を被覆する前記封止樹脂の厚みを、前記第1領域を被覆する前記封止樹脂よりも薄くすることを特徴とする請求項5または請求項6に記載の回路装置の製造方法。
- 前記第4工程では、前記区画部により、前記第1領域に前記封止樹脂を注入する際の前記第2領域への前記封止樹脂の流出を抑制することを特徴とする請求項5から請求項7の何れかに記載の回路装置の製造方法。
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JP2007021810A JP5536975B2 (ja) | 2007-01-31 | 2007-01-31 | 回路装置およびその製造方法 |
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JP2007021810A JP5536975B2 (ja) | 2007-01-31 | 2007-01-31 | 回路装置およびその製造方法 |
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JP2008187143A JP2008187143A (ja) | 2008-08-14 |
JP5536975B2 true JP5536975B2 (ja) | 2014-07-02 |
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Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2010219385A (ja) | 2009-03-18 | 2010-09-30 | Mitsubishi Electric Corp | 半導体装置 |
JP5450192B2 (ja) | 2010-03-24 | 2014-03-26 | 日立オートモティブシステムズ株式会社 | パワーモジュールとその製造方法 |
WO2018202615A1 (en) * | 2017-05-02 | 2018-11-08 | Abb Schweiz Ag | Resin encapsulated power semiconductor module with exposed terminal areas |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2975782B2 (ja) * | 1992-10-23 | 1999-11-10 | 三洋電機株式会社 | 混成集積回路装置およびこれに用いるケース材 |
JP2798861B2 (ja) * | 1992-11-26 | 1998-09-17 | 三洋電機株式会社 | 混成集積回路装置 |
JP2883526B2 (ja) * | 1993-11-11 | 1999-04-19 | 三洋電機株式会社 | 混成集積回路装置 |
JP2001044335A (ja) * | 1999-08-03 | 2001-02-16 | Toyota Autom Loom Works Ltd | 端子付き電気装置 |
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