JP5425637B2 - 集積回路パッケージおよび集積回路パッケージにおいて熱を放散させるための方法 - Google Patents
集積回路パッケージおよび集積回路パッケージにおいて熱を放散させるための方法 Download PDFInfo
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- 238000000034 method Methods 0.000 title claims description 79
- 230000008569 process Effects 0.000 claims description 61
- 239000000758 substrate Substances 0.000 claims description 57
- 239000000463 material Substances 0.000 claims description 35
- 238000000465 moulding Methods 0.000 claims description 35
- 239000000853 adhesive Substances 0.000 claims description 9
- 230000001070 adhesive effect Effects 0.000 claims description 9
- 239000004020 conductor Substances 0.000 claims description 8
- 239000002390 adhesive tape Substances 0.000 claims description 7
- 150000001875 compounds Chemical class 0.000 claims description 7
- 238000004806 packaging method and process Methods 0.000 description 5
- PSLUFJFHTBIXMW-WYEYVKMPSA-N [(3r,4ar,5s,6s,6as,10s,10ar,10bs)-3-ethenyl-10,10b-dihydroxy-3,4a,7,7,10a-pentamethyl-1-oxo-6-(2-pyridin-2-ylethylcarbamoyloxy)-5,6,6a,8,9,10-hexahydro-2h-benzo[f]chromen-5-yl] acetate Chemical compound O([C@@H]1[C@@H]([C@]2(O[C@](C)(CC(=O)[C@]2(O)[C@@]2(C)[C@@H](O)CCC(C)(C)[C@@H]21)C=C)C)OC(=O)C)C(=O)NCCC1=CC=CC=N1 PSLUFJFHTBIXMW-WYEYVKMPSA-N 0.000 description 4
- 230000008878 coupling Effects 0.000 description 4
- 238000010168 coupling process Methods 0.000 description 4
- 238000005859 coupling reaction Methods 0.000 description 4
- 230000032798 delamination Effects 0.000 description 4
- UNILWMWFPHPYOR-KXEYIPSPSA-M 1-[6-[2-[3-[3-[3-[2-[2-[3-[[2-[2-[[(2r)-1-[[2-[[(2r)-1-[3-[2-[2-[3-[[2-(2-amino-2-oxoethoxy)acetyl]amino]propoxy]ethoxy]ethoxy]propylamino]-3-hydroxy-1-oxopropan-2-yl]amino]-2-oxoethyl]amino]-3-[(2r)-2,3-di(hexadecanoyloxy)propyl]sulfanyl-1-oxopropan-2-yl Chemical compound O=C1C(SCCC(=O)NCCCOCCOCCOCCCNC(=O)COCC(=O)N[C@@H](CSC[C@@H](COC(=O)CCCCCCCCCCCCCCC)OC(=O)CCCCCCCCCCCCCCC)C(=O)NCC(=O)N[C@H](CO)C(=O)NCCCOCCOCCOCCCNC(=O)COCC(N)=O)CC(=O)N1CCNC(=O)CCCCCN\1C2=CC=C(S([O-])(=O)=O)C=C2CC/1=C/C=C/C=C/C1=[N+](CC)C2=CC=C(S([O-])(=O)=O)C=C2C1 UNILWMWFPHPYOR-KXEYIPSPSA-M 0.000 description 3
- 238000004880 explosion Methods 0.000 description 3
- 230000017525 heat dissipation Effects 0.000 description 3
- 229910000679 solder Inorganic materials 0.000 description 3
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- 239000002313 adhesive film Substances 0.000 description 1
- 230000000740 bleeding effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000010330 laser marking Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
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Description
Claims (7)
- 集積回路(IC)パッケージにおいて熱を放散させるための方法であって、
ダイ配置位置において基板に開口を形成することと、
前記開口および前記基板の下面の少なくとも一部を接着テープ材料で覆うことと、
前記開口および前記基板の下面を前記接着テープ材料で覆った後、前記基板の前記下面の少なくとも一部に接着材料を残して前記テープ材料を除去することと、
前記接着材料が硬化するときに、ヒート・スプレッダ・デバイスの上面が前記基板の前記下面に結合するように、前記ヒート・スプレッダ・デバイスの前記上面を前記基板の前記下面の前記接着材料に接触して配置することと、
を含む方法。 - ダイ・アタッチ工程を実行することをさらに含み、前記ダイ・アタッチ工程中に、前記ICダイの下面が、前記基板に形成された前記開口を通して前記ヒート・スプレッダ・デバイスの前記上面に結合される請求項1に記載の方法。
- ダイ・アタッチ工程を実行することをさらに含み、前記ダイ・アタッチ工程中に、ICダイの下面の一部が、前記ヒート・スプレッダ・デバイスの前記上面の上方で前記開口に配置されるように、前記開口を覆って前記基板の上面に結合される請求項1に記載の方法。
- ボンディング工程を実行することをさらに含み、前記ボンディング工程中に、1つまたは複数の導体の第1の終端が、前記ダイの上面の1つまたは複数の導電パッドに接続され、前記1つまたは複数の導体の第2の終端が、リードフレームの1つまたは複数の導電リードに接続され、
モールディング工程を実行することをさらに含み、前記モールディング工程中に、少なくとも前記ダイの前記上面と、前記1つまたは複数の導体が、モールディング・コンパウンドに覆われ、1つまたは複数の型板が、前記コンパウンドを成形するために使用される請求項2に記載の方法。 - 前記モールディング工程が実行された後に、前記テープ材料が、除去され、前記ヒート・スプレッダ・デバイスの前記上面が、前記基板の前記下面に結合される、請求項4に記載の方法。
- 前記モールディング工程が実行される前に、前記テープ材料が、除去され、前記ヒート・スプレッダ・デバイスの前記上面が、前記基板の前記下面に結合される、請求項4に記載の方法。
- 前記ダイ・アタッチ工程が実行された後に、前記テープ材料が、除去され、前記ヒート・スプレッダ・デバイスの前記上面が、前記基板の前記下面に結合される、請求項4に記載の方法。
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/US2006/047360 WO2008073084A1 (en) | 2006-12-12 | 2006-12-12 | An integrated circuit package and a method for dissipating heat in an integrated circuit package |
Publications (2)
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JP2010512658A JP2010512658A (ja) | 2010-04-22 |
JP5425637B2 true JP5425637B2 (ja) | 2014-02-26 |
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JP2009541271A Expired - Fee Related JP5425637B2 (ja) | 2006-12-12 | 2006-12-12 | 集積回路パッケージおよび集積回路パッケージにおいて熱を放散させるための方法 |
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Country | Link |
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US (1) | US8859333B2 (ja) |
JP (1) | JP5425637B2 (ja) |
KR (1) | KR101398533B1 (ja) |
CN (1) | CN101584044B (ja) |
WO (1) | WO2008073084A1 (ja) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
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US7928548B2 (en) * | 2008-01-07 | 2011-04-19 | International Business Machines Corporation | Silicon heat spreader mounted in-plane with a heat source and method therefor |
TWI422058B (zh) * | 2008-03-04 | 2014-01-01 | Everlight Electronics Co Ltd | 發光二極體封裝結構與其製造方法 |
US8743561B2 (en) | 2009-08-26 | 2014-06-03 | Taiwan Semiconductor Manufacturing Company, Ltd. | Wafer-level molded structure for package assembly |
US9093415B2 (en) * | 2013-09-25 | 2015-07-28 | Stats Chippac Ltd. | Integrated circuit packaging system with heat spreader and method of manufacture thereof |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5397917A (en) * | 1993-04-26 | 1995-03-14 | Motorola, Inc. | Semiconductor package capable of spreading heat |
US5441684A (en) * | 1993-09-24 | 1995-08-15 | Vlsi Technology, Inc. | Method of forming molded plastic packages with integrated heat sinks |
JP3617072B2 (ja) * | 1994-04-05 | 2005-02-02 | 凸版印刷株式会社 | チップキャリア |
TW449844B (en) * | 1997-05-17 | 2001-08-11 | Hyundai Electronics Ind | Ball grid array package having an integrated circuit chip |
JP2000232186A (ja) * | 1999-02-09 | 2000-08-22 | Seiko Epson Corp | 半導体装置およびその製造方法 |
CN2369355Y (zh) * | 1999-02-09 | 2000-03-15 | 日月光半导体制造股份有限公司 | 半导体装置的封胶体装置 |
EP1346411A2 (en) * | 2000-12-01 | 2003-09-24 | Broadcom Corporation | Thermally and electrically enhanced ball grid array packaging |
TW526600B (en) * | 2002-02-08 | 2003-04-01 | United Test Ct Inc | Semiconductor device including a heat spreader |
TWI230449B (en) * | 2002-02-26 | 2005-04-01 | Orient Semiconductor Elect Ltd | High heat dissipation micro package of semiconductor chip |
US6900535B2 (en) * | 2002-05-01 | 2005-05-31 | Stmicroelectronics, Inc. | BGA/LGA with built in heat slug/spreader |
TW582106B (en) * | 2003-02-19 | 2004-04-01 | Advanced Semiconductor Eng | Package and manufacturing method thereof |
KR20050001930A (ko) * | 2003-06-28 | 2005-01-07 | 삼성전기주식회사 | 고밀도 칩 스케일 패키지 및 그 제조 방법 |
US20070273023A1 (en) * | 2006-05-26 | 2007-11-29 | Broadcom Corporation | Integrated circuit package having exposed thermally conducting body |
US7554194B2 (en) * | 2006-11-08 | 2009-06-30 | Amkor Technology, Inc. | Thermally enhanced semiconductor package |
-
2006
- 2006-12-12 WO PCT/US2006/047360 patent/WO2008073084A1/en active Application Filing
- 2006-12-12 CN CN200680056609.4A patent/CN101584044B/zh not_active Expired - Fee Related
- 2006-12-12 KR KR1020097012090A patent/KR101398533B1/ko not_active IP Right Cessation
- 2006-12-12 US US12/518,877 patent/US8859333B2/en not_active Expired - Fee Related
- 2006-12-12 JP JP2009541271A patent/JP5425637B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
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KR20090089399A (ko) | 2009-08-21 |
JP2010512658A (ja) | 2010-04-22 |
KR101398533B1 (ko) | 2014-05-27 |
WO2008073084A1 (en) | 2008-06-19 |
US8859333B2 (en) | 2014-10-14 |
US20100120206A1 (en) | 2010-05-13 |
CN101584044A (zh) | 2009-11-18 |
CN101584044B (zh) | 2014-12-17 |
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