JP5127137B2 - 半導体素子の製造方法 - Google Patents
半導体素子の製造方法 Download PDFInfo
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- JP5127137B2 JP5127137B2 JP2005378696A JP2005378696A JP5127137B2 JP 5127137 B2 JP5127137 B2 JP 5127137B2 JP 2005378696 A JP2005378696 A JP 2005378696A JP 2005378696 A JP2005378696 A JP 2005378696A JP 5127137 B2 JP5127137 B2 JP 5127137B2
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- 239000004065 semiconductor Substances 0.000 title claims description 40
- 238000004519 manufacturing process Methods 0.000 title claims description 22
- 238000005530 etching Methods 0.000 claims description 32
- 239000000758 substrate Substances 0.000 claims description 26
- 238000001312 dry etching Methods 0.000 claims description 18
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 18
- 229920005591 polysilicon Polymers 0.000 claims description 18
- 238000000034 method Methods 0.000 claims description 11
- 239000000243 solution Substances 0.000 claims description 11
- 239000011259 mixed solution Substances 0.000 claims description 10
- 125000000896 monocarboxylic acid group Chemical group 0.000 claims description 9
- 229910052754 neon Inorganic materials 0.000 claims description 8
- 238000002955 isolation Methods 0.000 claims description 6
- 229910017840 NH 3 Inorganic materials 0.000 claims description 4
- 229910017855 NH 4 F Inorganic materials 0.000 claims description 4
- 229910052786 argon Inorganic materials 0.000 claims description 4
- 239000003054 catalyst Substances 0.000 claims description 4
- 229910052801 chlorine Inorganic materials 0.000 claims description 4
- 239000013078 crystal Substances 0.000 claims description 4
- 229910052734 helium Inorganic materials 0.000 claims description 4
- 229910052743 krypton Inorganic materials 0.000 claims description 4
- 229910052704 radon Inorganic materials 0.000 claims description 4
- 238000001039 wet etching Methods 0.000 claims description 4
- 229910052724 xenon Inorganic materials 0.000 claims description 4
- 230000009257 reactivity Effects 0.000 claims description 3
- 239000002184 metal Substances 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- 229910021332 silicide Inorganic materials 0.000 description 3
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- 230000014759 maintenance of location Effects 0.000 description 2
- 208000032750 Device leakage Diseases 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000011982 device technology Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 239000003381 stabilizer Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H01L21/28035—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities
- H01L21/28044—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer
- H01L21/28061—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer the conductor comprising a metal or metal silicide formed by deposition, e.g. sputter deposition, i.e. without a silicidation reaction
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/30604—Chemical etching
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/3065—Plasma etching; Reactive-ion etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
- H01L21/3081—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their composition, e.g. multilayer masks, materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66613—Lateral single gate silicon transistors with a gate recessing step, e.g. using local oxidation
- H01L29/66621—Lateral single gate silicon transistors with a gate recessing step, e.g. using local oxidation using etching to form a recess at the gate location
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Chemical & Material Sciences (AREA)
- Ceramic Engineering (AREA)
- General Chemical & Material Sciences (AREA)
- Plasma & Fusion (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Semiconductor Memories (AREA)
- Electrodes Of Semiconductors (AREA)
- Element Separation (AREA)
- Junction Field-Effect Transistors (AREA)
Description
2 素子分離膜
3 酸化膜
4 ポリシリコン膜
5 反射防止膜
6 マスクパターン
7 第1溝
8 第2溝
9 ゲート酸化膜
10 ゲートポリシリコン膜
11 ゲート金属シリサイド膜
12 ゲートハードマスク膜
13 リセスゲート
Claims (11)
- アクティブ領域を画定する素子分離膜が形成された半導体基板を設けるステップと、
前記半導体基板全面上に酸化膜、ポリシリコン膜、及び反射防止膜を順次形成するステップと、
前記反射防止膜上に前記半導体基板の前記アクティブ領域におけるリセス予定領域を画定するマスクパターンを形成するステップと、
前記マスクパターンをエッチングマスクとして用い、前記反射防止膜、前記ポリシリコン膜、及び前記酸化膜を順次エッチングして前記アクティブ領域の前記リセス予定領域を露出させるステップと、
露出された前記リセス予定領域を1次エッチングして、第1の幅及び第1の深さを有する第1溝を形成するステップと、
前記マスクパターン及び前記反射防止膜を順次除去するステップと、
エッチングされた前記ポリシリコン膜をエッチングマスクとして用い、前記第1溝の底面下の前記半導体基板部分を2次エッチングして、前記第1の幅より狭い第2の幅及び第2の深さを有する第2溝を形成するステップと、
前記ポリシリコン膜及び前記酸化膜を順次除去するステップと、
前記第2溝を含む第1溝の上にゲートを形成するステップと、を含むことを特徴とする半導体素子の製造方法。 - 前記1次エッチングは、HF、NH4F、HNO3、CH3COOH、H2O2及びH2Oの混合溶液を利用したウェトエッチングであることを特徴とする請求項1に記載の半導体素子の製造方法。
- 前記CH3COOH溶液は、前記混合溶液全体に対する比率が約1〜50%であることを特徴とする請求項2に記載の半導体素子の製造方法。
- 前記HNO3溶液は、前記混合溶液全体に対する比率が約1〜50%であることを特徴とする請求項2に記載の半導体素子の製造方法。
- 前記1次エッチングは、反応性が向上するように約25〜100℃の温度で行われることを特徴とする請求項2に記載の半導体素子の製造方法。
- 前記第1溝は、約10〜1000Åの深さを有するように形成されることを特徴とする請求項1に記載の半導体素子の製造方法。
- 前記2次エッチングは、 HBr、N2、Ar、Ne及びCl基を含んだ混合ガスを利用したドライエッチングであることを特徴とする請求項1に記載の半導体素子の製造方法。
- 前記2次エッチングは、前記第1溝のエッチング底面にダメージを与えて結晶格子を破壊するプラズマドライエッチングであることを特徴とする請求項7に記載の半導体素子の製造方法。
- 前記プラズマドライエッチングは、約25〜700℃の温度、約13.3〜13332.2Pa(0.1〜100Torr)の圧力、約10〜2000Wのパワー、そして、還元雰囲気下で行われることを特徴とする請求項8に記載の半導体素子の製造方法。
- 前記プラズマドライエッチングは、Ne、He、NH3、Kr、Xe及びRnから構成されるグループより選択されるいずれか一つのガスを触媒ガスとして添加して行われることを特徴とする請求項8に記載の半導体素子の製造方法。
- 前記第2溝は、約300〜3000Åの深さを有するように形成されることを特徴とする請求項1に記載の半導体素子の製造方法。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020050058570A KR100608386B1 (ko) | 2005-06-30 | 2005-06-30 | 반도체 소자의 제조방법 |
KR10-2005-0058570 | 2005-06-30 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2007013085A JP2007013085A (ja) | 2007-01-18 |
JP5127137B2 true JP5127137B2 (ja) | 2013-01-23 |
Family
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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JP2005378696A Expired - Fee Related JP5127137B2 (ja) | 2005-06-30 | 2005-12-28 | 半導体素子の製造方法 |
Country Status (5)
Country | Link |
---|---|
US (2) | US7413969B2 (ja) |
JP (1) | JP5127137B2 (ja) |
KR (1) | KR100608386B1 (ja) |
CN (1) | CN100463113C (ja) |
TW (1) | TWI263307B (ja) |
Families Citing this family (20)
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KR100732767B1 (ko) * | 2005-12-29 | 2007-06-27 | 주식회사 하이닉스반도체 | 반도체 소자의 리세스 채널용 트렌치 형성방법 |
DE102006045441B4 (de) * | 2006-09-26 | 2008-09-25 | Infineon Technologies Austria Ag | Verfahren zur Herstellung einer Halbleiterbauelementanordnung mit einer Trenchtransistorstruktur |
KR100842908B1 (ko) * | 2006-09-30 | 2008-07-02 | 주식회사 하이닉스반도체 | 리세스 게이트를 갖는 반도체 소자 및 그의 제조방법 |
US7645671B2 (en) | 2006-11-13 | 2010-01-12 | Micron Technology, Inc. | Recessed access device for a memory |
KR100840789B1 (ko) | 2007-02-05 | 2008-06-23 | 삼성전자주식회사 | 리세스 트랜지스터 및 그 제조 방법 |
KR100849189B1 (ko) | 2007-02-12 | 2008-07-30 | 주식회사 하이닉스반도체 | 리세스 게이트를 갖는 반도체 소자 및 그 제조 방법 |
JP2008210994A (ja) * | 2007-02-27 | 2008-09-11 | Nec Electronics Corp | 横型mosfetおよびその製造方法 |
KR100951566B1 (ko) * | 2007-03-15 | 2010-04-09 | 주식회사 하이닉스반도체 | 리세스 게이트를 갖는 반도체 소자의 제조 방법 |
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KR100908522B1 (ko) * | 2007-06-28 | 2009-07-20 | 주식회사 하이닉스반도체 | 반도체 소자 및 그 제조 방법 |
DE102007045734B3 (de) * | 2007-09-25 | 2008-11-13 | Qimonda Ag | Verfahren zur Herstellung eines Integrierten Schaltkreises und damit hergestellter Integrierter Schaltkreis |
KR20090076317A (ko) * | 2008-01-08 | 2009-07-13 | 삼성전자주식회사 | 반도체 장치 및 그의 형성방법 |
CN101587908B (zh) * | 2008-05-23 | 2010-11-17 | 南亚科技股份有限公司 | 凹入式沟道晶体管结构 |
US9012318B2 (en) | 2012-09-21 | 2015-04-21 | Micron Technology, Inc. | Etching polysilicon |
KR101506888B1 (ko) * | 2013-10-02 | 2015-03-30 | 주식회사 에스앤에스텍 | 블랭크 마스크 및 포토마스크 |
US10008417B1 (en) * | 2017-06-12 | 2018-06-26 | International Business Machines Corporation | Vertical transport fin field effect transistors having different channel lengths |
CN107464749B (zh) * | 2017-07-28 | 2021-09-17 | 北京北方华创微电子装备有限公司 | 蚀刻方法和蚀刻*** |
CN112885770A (zh) * | 2019-11-29 | 2021-06-01 | 长鑫存储技术有限公司 | 浅沟槽隔离结构、半导体结构及其制备方法 |
CN112864155B (zh) * | 2021-01-04 | 2022-05-03 | 长鑫存储技术有限公司 | 半导体结构的制造方法及半导体结构 |
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2005
- 2005-06-30 KR KR1020050058570A patent/KR100608386B1/ko not_active IP Right Cessation
- 2005-12-26 TW TW094146561A patent/TWI263307B/zh not_active IP Right Cessation
- 2005-12-27 US US11/318,960 patent/US7413969B2/en active Active
- 2005-12-28 JP JP2005378696A patent/JP5127137B2/ja not_active Expired - Fee Related
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2006
- 2006-02-27 CN CNB2006100549508A patent/CN100463113C/zh not_active Expired - Fee Related
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2008
- 2008-07-17 US US12/174,735 patent/US20080272431A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
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KR100608386B1 (ko) | 2006-08-08 |
TWI263307B (en) | 2006-10-01 |
CN100463113C (zh) | 2009-02-18 |
US7413969B2 (en) | 2008-08-19 |
TW200701403A (en) | 2007-01-01 |
CN1892988A (zh) | 2007-01-10 |
JP2007013085A (ja) | 2007-01-18 |
US20070004145A1 (en) | 2007-01-04 |
US20080272431A1 (en) | 2008-11-06 |
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