JP4992158B2 - 3次元アルミニウムパッケージモジュール及びその製造方法 - Google Patents
3次元アルミニウムパッケージモジュール及びその製造方法 Download PDFInfo
- Publication number
- JP4992158B2 JP4992158B2 JP2008548364A JP2008548364A JP4992158B2 JP 4992158 B2 JP4992158 B2 JP 4992158B2 JP 2008548364 A JP2008548364 A JP 2008548364A JP 2008548364 A JP2008548364 A JP 2008548364A JP 4992158 B2 JP4992158 B2 JP 4992158B2
- Authority
- JP
- Japan
- Prior art keywords
- package module
- aluminum
- layer
- substrate
- aluminum substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 229910052782 aluminium Inorganic materials 0.000 title claims description 161
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 title claims description 161
- 238000004519 manufacturing process Methods 0.000 title claims description 52
- 239000000758 substrate Substances 0.000 claims description 160
- 239000010410 layer Substances 0.000 claims description 148
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 60
- 230000000873 masking effect Effects 0.000 claims description 39
- 238000002048 anodisation reaction Methods 0.000 claims description 33
- 229910018072 Al 2 O 3 Inorganic materials 0.000 claims description 31
- 230000000903 blocking effect Effects 0.000 claims description 28
- 239000010949 copper Substances 0.000 claims description 20
- 229910052751 metal Inorganic materials 0.000 claims description 20
- 239000002184 metal Substances 0.000 claims description 20
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 claims description 20
- 239000004065 semiconductor Substances 0.000 claims description 20
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 19
- 229910052802 copper Inorganic materials 0.000 claims description 19
- 238000007747 plating Methods 0.000 claims description 16
- 238000005530 etching Methods 0.000 claims description 13
- 239000000463 material Substances 0.000 claims description 12
- 230000003647 oxidation Effects 0.000 claims description 12
- 238000007254 oxidation reaction Methods 0.000 claims description 12
- 239000000853 adhesive Substances 0.000 claims description 10
- 230000001070 adhesive effect Effects 0.000 claims description 10
- 239000012044 organic layer Substances 0.000 claims description 6
- 229920001721 polyimide Polymers 0.000 claims description 6
- 239000004642 Polyimide Substances 0.000 claims description 5
- 238000003486 chemical etching Methods 0.000 claims description 5
- 239000011368 organic material Substances 0.000 claims description 5
- 238000007743 anodising Methods 0.000 claims description 4
- 230000002401 inhibitory effect Effects 0.000 claims description 4
- 239000000126 substance Substances 0.000 claims description 3
- 239000010407 anodic oxide Substances 0.000 claims 2
- 238000005469 granulation Methods 0.000 claims 2
- 230000003179 granulation Effects 0.000 claims 2
- 150000002894 organic compounds Chemical class 0.000 claims 1
- 230000001590 oxidative effect Effects 0.000 claims 1
- 238000000034 method Methods 0.000 description 50
- 238000010586 diagram Methods 0.000 description 27
- 230000008569 process Effects 0.000 description 19
- 239000011347 resin Substances 0.000 description 12
- 229920005989 resin Polymers 0.000 description 12
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 10
- 229920002120 photoresistant polymer Polymers 0.000 description 8
- 239000010931 gold Substances 0.000 description 7
- 229910004298 SiO 2 Inorganic materials 0.000 description 6
- 239000000919 ceramic Substances 0.000 description 6
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 6
- 229910052737 gold Inorganic materials 0.000 description 6
- 230000005764 inhibitory process Effects 0.000 description 6
- 230000004048 modification Effects 0.000 description 5
- 238000012986 modification Methods 0.000 description 5
- 229910052759 nickel Inorganic materials 0.000 description 5
- 239000012212 insulator Substances 0.000 description 4
- 230000010354 integration Effects 0.000 description 3
- 239000007769 metal material Substances 0.000 description 3
- 238000001039 wet etching Methods 0.000 description 3
- 239000003990 capacitor Substances 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 238000005553 drilling Methods 0.000 description 2
- 238000012858 packaging process Methods 0.000 description 2
- 238000000206 photolithography Methods 0.000 description 2
- 230000008054 signal transmission Effects 0.000 description 2
- YCKRFDGAMUMZLT-UHFFFAOYSA-N Fluorine atom Chemical compound [F] YCKRFDGAMUMZLT-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 229910052731 fluorine Inorganic materials 0.000 description 1
- 239000011737 fluorine Substances 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 239000004033 plastic Substances 0.000 description 1
- 239000009719 polyimide resin Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/66—High-frequency adaptations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4857—Multilayer substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49822—Multilayer substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/50—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5389—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/645—Inductive arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L24/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L24/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
- H01L25/072—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
- H01L25/162—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits the devices being mounted on two or more different substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
- H01L2223/64—Impedance arrangements
- H01L2223/66—High-frequency adaptations
- H01L2223/6605—High-frequency electrical connections
- H01L2223/6616—Vertical connections, e.g. vias
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
- H01L2223/64—Impedance arrangements
- H01L2223/66—High-frequency adaptations
- H01L2223/6605—High-frequency electrical connections
- H01L2223/6627—Waveguides, e.g. microstrip line, strip line, coplanar line
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
- H01L2223/64—Impedance arrangements
- H01L2223/66—High-frequency adaptations
- H01L2223/6644—Packaging aspects of high-frequency amplifiers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
- H01L2224/241—Disposition
- H01L2224/24151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/24221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/24225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/24227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the HDI interconnect not connecting to the same level of the item at which the semiconductor or solid-state body is mounted, e.g. the semiconductor or solid-state body being mounted in a cavity or on a protrusion of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73267—Layer and HDI connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
- H01L2924/097—Glass-ceramics, e.g. devitrified glass
- H01L2924/09701—Low temperature co-fired ceramic [LTCC]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12044—OLED
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1517—Multilayer substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
- H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1903—Structure including wave guides
- H01L2924/19033—Structure including wave guides being a coplanar line type
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19041—Component type being a capacitor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19042—Component type being an inductor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/05—Insulated conductive substrates, e.g. insulated metal substrate
- H05K1/053—Insulated conductive substrates, e.g. insulated metal substrate the metal substrate being covered by an inorganic insulating layer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Semiconductor Integrated Circuits (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Description
図6を参照すると、前記開口14には接着物質17を介して第1素子16、例えば、PA、LNA、フェースシフタなどが装着される。前記第1素子16はその上部表面に複数の電極端子18を有する。
図7を参照すると、前記第1素子16とAl2O3層12上に有機絶縁膜20、例えば、BCBまたはポリイミド層が所定の厚さで形成される。
12、63、91 Al2O3層
14、56、110 開口
16 第1素子
17 接着物質
18 電極
20 有機絶縁膜
22 コンタクトホール
24 第2素子
26、90 配線
32 Al2O3パターン
34 銅メッキ層
36 金属層
42 フォトレジストパターン
44 陽極酸化阻止膜
61 ビア
68 第1Al2O3
69 第1Al2O3
71 第1信号線
72 クロックビア
84 第1陽極酸化阻止パターン
92 能動素子
94 集積受動素子
96 マッチング回路
98 上部配線
99、136、144 アルミナ層
101、111 マスキングパターン
104、114、123 アルミナ層
106 金属のメッキパターン
108 エアーブリッジ
112 湿式エッチング阻止マスキングパターン
118 マスキングパターン
126 インダクタ電極
124、134、135、146、166 陽極酸化阻止マスキングパターン
128 エアーブリッジ
129 エッチング阻止マスキングパターン
154 エアーブリッジパターン
163 インダクタブリッジパターン
168 第2陽極酸化阻止マスキングパターン
170 インダクタパターン
300 ベースパッケージモジュール
400 エンベデッドコプレーナ導波管
500 再分配層
600 受動素子パッケージモジュール
Claims (15)
- アルミニウム基板、
前記アルミニウム基板上に形成されて側面が前記アルミニウム基板の上部表面に対して垂直であって少なくとも1つの第1開口を有するアルミニウム酸化物層、
前記第1開口内に接着物質を介して装着された半導体装置、
前記アルミニウム酸化物層と前記半導体装置を覆う有機物層、
前記有機物層に形成されるコンタクトホールと電気的に連結される第1配線、及び
前記有機物層及びアルミニウム酸化物層上に形成され、前記半導体装置と前記コンタクトホール及び前記第1配線を通じて電気的に連結される受動素子回路を含み、
前記第1開口は、前記アルミニウム酸化物層を化学的エッチングすることにより形成されていることを特徴とする3次元アルミニウムパッケージモジュール。 - 前記アルミニウム酸化物層に形成された第2開口の側面と底面に沿って形成されて埋込まれた第2配線をさらに含み、前記第2配線は前記第1配線及び/または前記半導体装置の端子と電気的に連結されることを特徴とする、請求項1に記載の3次元アルミニウムパッケージモジュール。
- 前記アルミニウム酸化物層はAl2O3であり、100μm程度の厚さを有することを特徴とする、請求項1に記載の3次元アルミニウムパッケージモジュール。
- 前記有機物層はBCBまたはポリイミドであることを特徴とする、請求項1に記載の3次元アルミニウムパッケージモジュール。
- 前記アルミニウム基板、前記アルミニウム酸化物層、前記半導体装置、前記有機物層、前記第1配線及び前記受動素子回路を含んで第1パッケージモジュールが構成され、
前記第1パッケージモジュールと電気的に連結されるエンベデッドコプレーナ導波管が前記第1パッケージモジュール上に積層され、
前記エンベデッドコプレーナ導波管と電気的に連結される第2パッケージモジュールが前記エンベデッドコプレーナ導波管上に積層されていることを特徴とする、請求項1に記載の3次元アルミニウムパッケージモジュール。 - 前記第1パッケージモジュール、前記エンベデッドコプレーナ導波管及び前記第2パッケージモジュールは同軸ビアを通じて電気的に連結されることを特徴とする、請求項5に記載の3次元アルミニウムパッケージモジュール。
- 前記第2パッケージモジュールは、
アルミナ基板、
前記アルミナ基板内に埋込まれて形成された配線、
前記配線と電気的に連結する受動素子、
前記配線と電気的に連結されるインダクタを含むことを特徴とする、請求項5に記載の3次元アルミニウムパッケージモジュール。 - 前記インダクタはエアー上に浮かんでいるエアーギャップインダクタであることを特徴とする、請求項7に記載の3次元アルミニウムパッケージモジュール。
- 前記エンベデッドコプレーナ導波管と前記第2パッケージモジュールの間に介されて前記エンベデッドコプレーナ導波管と前記第2パッケージモジュールの部品の電気的な連結を容易にするための再分配層をさらに含むことを特徴とする、請求項5に記載の3次元アルミニウムパッケージモジュール。
- 前記第1パッケージモジュール、前記エンベデッドコプレーナ導波管、前記第2パッケージモジュール、前記再分配層は必要に応じて選択的にかつ独立して使用され、その位置は移動されることを特徴とする、請求項9に記載の3次元アルミニウムパッケージモジュール。
- 上部表面と下部表面を有するアルミニウム基板を準備する段階;
前記アルミニウム基板の前記上部表面の所定部分及び前記下部表面全面に陽極酸化阻止マスキングパターンを形成する段階;
前記アルミニウム基板を前記上部表面から所定の深さまで酸化する為に前記陽極酸化阻止マスキングパターンを有する前記アルミニウム基板を陽極酸化する段階;
前記陽極酸化阻止マスキングパターンを除去する段階;
前記陽極酸化された前記アルミニウム基板の前記上部表面にマスキングパターンを形成し、化学的エッチングを加えて、その側面が前記アルミニウム基板の前記上部表面に垂直な開口を有するアルミニウム酸化物層を形成する段階;
前記マスキングパターンを除去する段階;
前記開口内に接着物質を介して素子を装着する段階;
前記素子と前記陽極酸化された前記アルミニウム基板の前記上部表面上に有機物層を形成する段階;及び
前記有機物層及び前記アルミニウム酸化物層の上に回路を形成する段階を含むことを特徴とする3次元アルミニウムパッケージモジュールの製造方法。 - 前記アルミニウム酸化物層はAl2O3であり、100μm程度の厚さを有することを特徴とする、請求項11に記載の3次元アルミニウムパッケージモジュールの製造方法。
- 前記有機物層はBCBまたはポリイミドであることを特徴とする、請求項11に記載の3次元アルミニウムパッケージモジュールの製造方法。
- 前記アルミニウム基板の前記下部表面にメッキによって厚い銅膜を形成する段階;
前記アルミニウム基板の前記上部表面に所定厚さの陽極酸化層を形成する段階;
形成された前記陽極酸化層にマスキングと化学的エッチングを利用して前記銅膜の上部表面が露出された開口を形成する段階をさらに含むことを特徴とする、請求項11に記載の3次元アルミニウムパッケージモジュールの製造方法。 - 前記厚い銅膜と前記アルミニウム基板の前記下部表面との間に金属膜を形成することを特徴とする、請求項14に記載の3次元アルミニウムパッケージモジュールの製造方法。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR10-2005-0133793 | 2005-12-29 | ||
KR1020050133793A KR100656300B1 (ko) | 2005-12-29 | 2005-12-29 | 3차원 알루미늄 패키지 모듈, 그의 제조방법 및 3차원알루미늄 패키지 모듈에 적용되는 수동소자 제작방법 |
PCT/KR2006/000751 WO2007074954A1 (en) | 2005-12-29 | 2006-03-03 | Three-dimensional package module, method of fabricating the same, and method of fabricating passive device applied to the three-dimensional package module |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2009522767A JP2009522767A (ja) | 2009-06-11 |
JP4992158B2 true JP4992158B2 (ja) | 2012-08-08 |
Family
ID=37732894
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2008548364A Expired - Fee Related JP4992158B2 (ja) | 2005-12-29 | 2006-03-03 | 3次元アルミニウムパッケージモジュール及びその製造方法 |
Country Status (5)
Country | Link |
---|---|
US (2) | US7851918B2 (ja) |
EP (2) | EP2325879A2 (ja) |
JP (1) | JP4992158B2 (ja) |
KR (1) | KR100656300B1 (ja) |
WO (1) | WO2007074954A1 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20180050472A (ko) * | 2016-11-04 | 2018-05-15 | (주)제이디 | 회로 임베디드 웨이퍼 및 그의 제조 방법 |
Families Citing this family (27)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100656295B1 (ko) * | 2004-11-29 | 2006-12-11 | (주)웨이브닉스이에스피 | 선택적 양극 산화된 금속을 이용한 패키지 및 그 제작방법 |
US7432690B2 (en) * | 2005-05-27 | 2008-10-07 | Hubbell Incorporated | Dual circuit wall switch occupancy sensor and method of operating same |
KR101093718B1 (ko) * | 2010-01-04 | 2011-12-19 | (주)웨이브닉스이에스피 | 에어 캐비티를 갖는 고품질 수동소자 모듈 및 그 제조방법 |
KR101093719B1 (ko) | 2010-01-04 | 2011-12-19 | (주)웨이브닉스이에스피 | 금속기판을 이용한 고출력 소자의 패키지 모듈 구조 및 그 제조방법 |
JP5136632B2 (ja) * | 2010-01-08 | 2013-02-06 | 大日本印刷株式会社 | 電子部品 |
US8664538B2 (en) | 2010-04-30 | 2014-03-04 | Wavenics Inc. | Terminal-integrated metal base package module and terminal-integrated metal base packaging method |
KR101109359B1 (ko) * | 2010-06-14 | 2012-01-31 | 삼성전기주식회사 | 방열기판 및 그 제조방법 |
KR20120035394A (ko) * | 2010-10-05 | 2012-04-16 | 삼성전자주식회사 | 수직구조의 전송선로 트랜지션 및 랜드 그리드 어레이 접합를 이용한 단일 칩 패키지를 위한 장치 |
US8440012B2 (en) | 2010-10-13 | 2013-05-14 | Rf Micro Devices, Inc. | Atomic layer deposition encapsulation for acoustic wave devices |
US8313985B2 (en) | 2010-10-21 | 2012-11-20 | Rf Micro Devices, Inc. | Atomic layer deposition encapsulation for power amplifiers in RF circuits |
KR101255944B1 (ko) * | 2011-07-20 | 2013-04-23 | 삼성전기주식회사 | 전력 모듈 패키지용 기판 및 그 제조방법 |
US9570420B2 (en) * | 2011-09-29 | 2017-02-14 | Broadcom Corporation | Wireless communicating among vertically arranged integrated circuits (ICs) in a semiconductor package |
US8670638B2 (en) | 2011-09-29 | 2014-03-11 | Broadcom Corporation | Signal distribution and radiation in a wireless enabled integrated circuit (IC) using a leaky waveguide |
US9318785B2 (en) | 2011-09-29 | 2016-04-19 | Broadcom Corporation | Apparatus for reconfiguring an integrated waveguide |
US9075105B2 (en) | 2011-09-29 | 2015-07-07 | Broadcom Corporation | Passive probing of various locations in a wireless enabled integrated circuit (IC) |
US9006889B2 (en) | 2011-11-11 | 2015-04-14 | Skyworks Solutions, Inc. | Flip chip packages with improved thermal performance |
CN104185365B (zh) * | 2013-05-23 | 2018-06-26 | 比亚迪股份有限公司 | 一种线路板及其制备方法 |
US9343369B2 (en) * | 2014-05-19 | 2016-05-17 | Qualcomm Incorporated | Three dimensional (3D) integrated circuits (ICs) (3DICs) and related systems |
US9899794B2 (en) * | 2014-06-30 | 2018-02-20 | Texas Instruments Incorporated | Optoelectronic package |
CN206976318U (zh) * | 2014-11-21 | 2018-02-06 | 株式会社村田制作所 | 模块 |
US9554469B2 (en) * | 2014-12-05 | 2017-01-24 | Zhuhai Advanced Chip Carriers & Electronic Substrate Solutions Technologies Co. Ltd. | Method of fabricating a polymer frame with a rectangular array of cavities |
US10629551B2 (en) * | 2015-12-22 | 2020-04-21 | Intel Corporation | Microelectronic devices with high frequency communication modules having compound semiconductor devices integrated on a package fabric |
US10181449B1 (en) * | 2017-09-28 | 2019-01-15 | Taiwan Semiconductor Manufacturing Co., Ltd. | Semiconductor structure |
US11228089B2 (en) * | 2019-07-22 | 2022-01-18 | Sj Semiconductor (Jiangyin) Corporation | Antenna packaging module and making method thereof |
US11482767B2 (en) | 2020-04-17 | 2022-10-25 | Honeywell Federal Manufacturing & Technologies, Llc | Method of manufacturing a waveguide comprising stacking dielectric layers having aligned metallized channels formed therein to form the waveguide |
US11393698B2 (en) * | 2020-12-18 | 2022-07-19 | STATS ChipPAC Pte. Ltd. | Mask design for improved attach position |
CN112928077A (zh) * | 2021-01-20 | 2021-06-08 | 上海先方半导体有限公司 | 一种多芯片异质集成封装单元及其制造方法、堆叠结构 |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS49131863U (ja) * | 1973-03-10 | 1974-11-13 | ||
US4939316A (en) | 1988-10-05 | 1990-07-03 | Olin Corporation | Aluminum alloy semiconductor packages |
US5043794A (en) * | 1990-09-24 | 1991-08-27 | At&T Bell Laboratories | Integrated circuit package and compact assemblies thereof |
US5198693A (en) | 1992-02-05 | 1993-03-30 | International Business Machines Corporation | Aperture formation in aluminum circuit card for enhanced thermal dissipation |
US5629559A (en) * | 1993-04-06 | 1997-05-13 | Tokuyama Corporation | Package for semiconductor device |
JP3250187B2 (ja) | 1994-07-15 | 2002-01-28 | 三菱マテリアル株式会社 | 高放熱性セラミックパッケージ |
JP3117377B2 (ja) * | 1994-11-29 | 2000-12-11 | 京セラ株式会社 | 半導体装置 |
JP2000133745A (ja) * | 1998-10-27 | 2000-05-12 | Matsushita Electric Works Ltd | 半導体装置 |
JP2002124594A (ja) * | 2000-10-18 | 2002-04-26 | Hitachi Cable Ltd | 半導体素子搭載部品及びそれを用いた半導体装置 |
FR2818804B1 (fr) * | 2000-12-21 | 2003-10-03 | Thomson Csf | Procede de realisation d'un module multi-composants enterres et module obtenu par ce procede |
TW511415B (en) | 2001-01-19 | 2002-11-21 | Matsushita Electric Ind Co Ltd | Component built-in module and its manufacturing method |
JP4280979B2 (ja) * | 2003-06-13 | 2009-06-17 | ソニー株式会社 | 半導体装置及びその実装構造、並びにその製造方法 |
US20070247048A1 (en) * | 2005-09-23 | 2007-10-25 | General Electric Company | Gated nanorod field emitters |
-
2005
- 2005-12-29 KR KR1020050133793A patent/KR100656300B1/ko active IP Right Grant
-
2006
- 2006-03-03 EP EP11156130A patent/EP2325879A2/en not_active Withdrawn
- 2006-03-03 WO PCT/KR2006/000751 patent/WO2007074954A1/en active Application Filing
- 2006-03-03 JP JP2008548364A patent/JP4992158B2/ja not_active Expired - Fee Related
- 2006-03-03 EP EP06716201A patent/EP1966823A4/en not_active Withdrawn
- 2006-03-03 US US12/158,726 patent/US7851918B2/en active Active
-
2010
- 2010-10-28 US US12/914,725 patent/US8034664B2/en not_active Expired - Fee Related
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20180050472A (ko) * | 2016-11-04 | 2018-05-15 | (주)제이디 | 회로 임베디드 웨이퍼 및 그의 제조 방법 |
KR101950884B1 (ko) | 2016-11-04 | 2019-02-22 | (주)제이디 | 회로 임베디드 웨이퍼 및 그의 제조 방법 |
Also Published As
Publication number | Publication date |
---|---|
US20110037164A1 (en) | 2011-02-17 |
US8034664B2 (en) | 2011-10-11 |
EP2325879A2 (en) | 2011-05-25 |
WO2007074954A1 (en) | 2007-07-05 |
EP1966823A1 (en) | 2008-09-10 |
US7851918B2 (en) | 2010-12-14 |
KR100656300B1 (ko) | 2006-12-11 |
US20090032914A1 (en) | 2009-02-05 |
JP2009522767A (ja) | 2009-06-11 |
EP1966823A4 (en) | 2010-09-15 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP4992158B2 (ja) | 3次元アルミニウムパッケージモジュール及びその製造方法 | |
US9646926B2 (en) | Wiring substrate and method of manufacturing the same | |
US9093459B2 (en) | Package structure having a semiconductor component embedded therein and method of fabricating the same | |
US7365006B1 (en) | Semiconductor package and substrate having multi-level vias fabrication method | |
KR101531097B1 (ko) | 인터포저 기판 및 이의 제조방법 | |
KR100907508B1 (ko) | 패키지 기판 및 그 제조방법 | |
JP2003163323A (ja) | 回路モジュール及びその製造方法 | |
JP2004152812A (ja) | 半導体装置及び積層型半導体装置 | |
TW201911569A (zh) | 半導體模組 | |
JP2008522402A (ja) | 選択的陽極酸化された金属を用いたパッケージ及びその製作方法 | |
JP4890959B2 (ja) | 配線基板及びその製造方法並びに半導体パッケージ | |
KR100860533B1 (ko) | 금속 인쇄회로기판 제조방법 | |
US20090008766A1 (en) | High-Density Fine Line Structure And Method Of Manufacturing The Same | |
US8471375B2 (en) | High-density fine line structure and method of manufacturing the same | |
JP2007081100A (ja) | 配線基板およびその製造方法 | |
KR101186879B1 (ko) | 리드 프레임 및 그 제조 방법 | |
WO2008133369A9 (en) | The manufacturing method of the thin film ceramic multi layer substrate | |
US7193297B2 (en) | Semiconductor device, method for manufacturing the same, circuit substrate and electronic device | |
KR100894247B1 (ko) | 양극산화막을 이용한 반도체 패키지 모듈 및 그 제조방법 | |
KR100625196B1 (ko) | 선택적 양극 산화된 금속을 이용한 패키지에서의 고품질인덕터 제조방법 | |
JPH11354667A (ja) | 電子部品およびその実装方法 | |
KR20020086000A (ko) | 인쇄회로기판 및 그 제조방법 | |
US20090001547A1 (en) | High-Density Fine Line Structure And Method Of Manufacturing The Same | |
JP4402256B2 (ja) | 半導体チップ塔載用配線部材の製造方法 | |
US20080303150A1 (en) | High-Density Fine Line Structure And Method Of Manufacturing The Same |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20110121 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20110208 |
|
A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20110509 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20110509 |
|
A602 | Written permission of extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A602 Effective date: 20110602 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20110708 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A821 Effective date: 20110708 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20120403 |
|
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20120420 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20150518 Year of fee payment: 3 |
|
R150 | Certificate of patent or registration of utility model |
Free format text: JAPANESE INTERMEDIATE CODE: R150 Ref document number: 4992158 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
S111 | Request for change of ownership or part of ownership |
Free format text: JAPANESE INTERMEDIATE CODE: R313114 |
|
R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
LAPS | Cancellation because of no payment of annual fees |