JP4980616B2 - 半導体チップを製作するための方法 - Google Patents
半導体チップを製作するための方法 Download PDFInfo
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- JP4980616B2 JP4980616B2 JP2005367794A JP2005367794A JP4980616B2 JP 4980616 B2 JP4980616 B2 JP 4980616B2 JP 2005367794 A JP2005367794 A JP 2005367794A JP 2005367794 A JP2005367794 A JP 2005367794A JP 4980616 B2 JP4980616 B2 JP 4980616B2
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- 239000004065 semiconductor Substances 0.000 title claims description 105
- 238000000034 method Methods 0.000 title claims description 45
- 239000000758 substrate Substances 0.000 claims description 100
- -1 nitride compound Chemical class 0.000 claims description 22
- 238000005468 ion implantation Methods 0.000 claims description 18
- 238000000926 separation method Methods 0.000 claims description 17
- 239000000463 material Substances 0.000 claims description 12
- 230000005855 radiation Effects 0.000 claims description 11
- 238000002955 isolation Methods 0.000 claims description 6
- 238000000151 deposition Methods 0.000 claims description 5
- 238000010438 heat treatment Methods 0.000 claims description 5
- 229910052738 indium Inorganic materials 0.000 claims description 5
- 230000008569 process Effects 0.000 claims description 5
- 230000008021 deposition Effects 0.000 claims description 4
- 239000001257 hydrogen Substances 0.000 claims description 4
- 229910052739 hydrogen Inorganic materials 0.000 claims description 4
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims description 3
- 230000005693 optoelectronics Effects 0.000 description 15
- 238000004519 manufacturing process Methods 0.000 description 9
- 239000000126 substance Substances 0.000 description 6
- 229910052782 aluminium Inorganic materials 0.000 description 5
- 239000013078 crystal Substances 0.000 description 4
- 229910052733 gallium Inorganic materials 0.000 description 4
- 238000001465 metallisation Methods 0.000 description 4
- 229910052757 nitrogen Inorganic materials 0.000 description 4
- 238000000137 annealing Methods 0.000 description 3
- 230000008901 benefit Effects 0.000 description 3
- 229910052737 gold Inorganic materials 0.000 description 3
- 150000002500 ions Chemical class 0.000 description 3
- 229910052750 molybdenum Inorganic materials 0.000 description 3
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000005219 brazing Methods 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 230000032798 delamination Effects 0.000 description 2
- 238000002513 implantation Methods 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 230000000704 physical effect Effects 0.000 description 2
- 229910052594 sapphire Inorganic materials 0.000 description 2
- 239000010980 sapphire Substances 0.000 description 2
- 238000010521 absorption reaction Methods 0.000 description 1
- 230000009471 action Effects 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 230000005496 eutectics Effects 0.000 description 1
- 238000004299 exfoliation Methods 0.000 description 1
- 238000000227 grinding Methods 0.000 description 1
- 229910052734 helium Inorganic materials 0.000 description 1
- 239000001307 helium Substances 0.000 description 1
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 description 1
- 230000001771 impaired effect Effects 0.000 description 1
- 229910052743 krypton Inorganic materials 0.000 description 1
- DNNSSWSSYDEUBZ-UHFFFAOYSA-N krypton atom Chemical compound [Kr] DNNSSWSSYDEUBZ-UHFFFAOYSA-N 0.000 description 1
- 150000002736 metal compounds Chemical class 0.000 description 1
- 229910001092 metal group alloy Inorganic materials 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 229910052754 neon Inorganic materials 0.000 description 1
- GKAOGPIIYCISHV-UHFFFAOYSA-N neon atom Chemical compound [Ne] GKAOGPIIYCISHV-UHFFFAOYSA-N 0.000 description 1
- 229910052756 noble gas Inorganic materials 0.000 description 1
- 150000002835 noble gases Chemical class 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 238000012805 post-processing Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 230000003595 spectral effect Effects 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 238000000927 vapour-phase epitaxy Methods 0.000 description 1
- 229910052724 xenon Inorganic materials 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0093—Wafer bonding; Removal of the growth substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
- H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/40—Materials therefor
- H01L33/405—Reflective materials
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Led Devices (AREA)
- Recrystallisation Techniques (AREA)
- Semiconductor Lasers (AREA)
Description
Claims (15)
- エピタキシャル成長により製作された機能的な半導体層列(2)を有する半導体チップを製作するための方法において、当該方法が、以下の方法ステップ:すなわち、
−成長基板(1)を準備し、
−機能的な半導体層列(2)を成長基板(1)にエピタキシャル成長させ、
−該成長基板(1)の主面(8)に対して平行に位置する分離領域(4)を成長基板(1)にイオン注入によって形成し、この場合、成長基板(1)へのイオン注入をエピタキシャル成長に後続させ、機能的な半導体層列(2)を貫いて行い、
−支持基板(6)を機能的な半導体層列(2)に被着し、
−成長基板(1)の、分離領域(4)から見て支持基板(6)と反対の側の部分を分離領域(4)に沿って分離する
を有していることを特徴とする、半導体チップを製作するための方法。 - 成長基板(1)と機能的な半導体層列(2)とが、主として、同じ格子係数を有している、請求項1記載の方法。
- 成長基板(1)と機能的な半導体層列(2)とが、同じ半導体材料をベースとしている、請求項1または2記載の方法。
- 成長基板(1)と機能的な半導体層列(2)とが、それぞれ窒化物化合物半導体材料から形成されている、請求項3記載の方法。
- 機能的な半導体層列(2)が、放射線放出する活性層(3)を有しており、該活性層(3)が、0≦x≦1、0≦y≦1およびx+y≦1を備えたInxAlyGa1−x−yNを有している、請求項1から4までのいずれか1項記載の方法。
- 成長基板(1)が、GaN基板またはAlN基板である、請求項1から5までのいずれか1項記載の方法。
- 分離領域(4)に沿った成長基板(1)の、分離領域(4)から見て支持基板(6)と反対の側の部分の分離を熱的な剥離によって行う、請求項1から6までのいずれか1項記載の方法。
- 成長基板(1)が、導電性の基板である、請求項1から7までのいずれか1項記載の方法。
- 前記導電性の成長基板(1)が、n型伝導性の基板である、請求項8記載の方法。
- 支持基板(6)が、導電性の基板である、請求項1から9までのいずれか1項記載の方法。
- 前記導電性の支持基板(6)が、p型伝導性の基板である、請求項10記載の方法。
- イオン注入時に水素イオンを注入する、請求項1から11までのいずれか1項記載の方法。
- イオン注入後、機能的な半導体層列(2)の熱処理を行う、請求項1から12までのいずれか1項記載の方法。
- 機能的な半導体層列(2)に、支持基板(6)の被着前に電気的なコンタクト層またはコンタクト層列(5)を設ける、請求項1から13までのいずれか1項記載の方法。
- 機能的な半導体層列(2)が、放射線放出する活性層(3)を有しており、電気的なコンタクト層(5)が、放出された放射線に対するリフレクタとして働く、請求項14記載の方法。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102004062290A DE102004062290A1 (de) | 2004-12-23 | 2004-12-23 | Verfahren zur Herstellung eines Halbleiterchips |
DE102004062290.6 | 2004-12-23 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2006179922A JP2006179922A (ja) | 2006-07-06 |
JP4980616B2 true JP4980616B2 (ja) | 2012-07-18 |
Family
ID=35840707
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2005367794A Expired - Fee Related JP4980616B2 (ja) | 2004-12-23 | 2005-12-21 | 半導体チップを製作するための方法 |
Country Status (4)
Country | Link |
---|---|
US (1) | US7524737B2 (ja) |
EP (1) | EP1675189A3 (ja) |
JP (1) | JP4980616B2 (ja) |
DE (1) | DE102004062290A1 (ja) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102005052358A1 (de) * | 2005-09-01 | 2007-03-15 | Osram Opto Semiconductors Gmbh | Verfahren zum lateralen Zertrennen eines Halbleiterwafers und optoelektronisches Bauelement |
DE102005052357A1 (de) * | 2005-09-01 | 2007-03-15 | Osram Opto Semiconductors Gmbh | Verfahren zum lateralen Zertrennen eines Halbleiterwafers und optoelektronisches Bauelement |
DE102006061167A1 (de) | 2006-04-25 | 2007-12-20 | Osram Opto Semiconductors Gmbh | Optoelektronisches Halbleiterbauelement |
KR100863805B1 (ko) * | 2007-04-24 | 2008-10-16 | 고려대학교 산학협력단 | 질화물 발광소자 및 그 제조 방법 |
US7791063B2 (en) * | 2007-08-30 | 2010-09-07 | Intel Corporation | High hole mobility p-channel Ge transistor structure on Si substrate |
DE102008019268A1 (de) | 2008-02-29 | 2009-09-03 | Osram Opto Semiconductors Gmbh | Optoelektronisches Bauelement und Verfahren zur Herstellung eines optoelektronischen Bauelements |
KR101111748B1 (ko) | 2008-11-28 | 2012-03-09 | 삼성엘이디 주식회사 | 수직구조 질화갈륨계 반도체 발광소자의 제조방법 |
JP2012230969A (ja) * | 2011-04-25 | 2012-11-22 | Sumitomo Electric Ind Ltd | GaN系半導体デバイスの製造方法 |
DE102011113775B9 (de) | 2011-09-19 | 2021-10-21 | OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung | Verfahren zur Herstellung eines optoelektronischen Bauelements |
FR3109469B1 (fr) * | 2020-04-15 | 2022-04-29 | Centre Nat Rech Scient | Procédé de fabrication d’un dispositif émetteur de rayonnement |
Family Cites Families (24)
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FR2681472B1 (fr) * | 1991-09-18 | 1993-10-29 | Commissariat Energie Atomique | Procede de fabrication de films minces de materiau semiconducteur. |
US5376580A (en) * | 1993-03-19 | 1994-12-27 | Hewlett-Packard Company | Wafer bonding of light emitting diode layers |
FR2747506B1 (fr) * | 1996-04-11 | 1998-05-15 | Commissariat Energie Atomique | Procede d'obtention d'un film mince de materiau semiconducteur comprenant notamment des composants electroniques |
DE19640594B4 (de) * | 1996-10-01 | 2016-08-04 | Osram Gmbh | Bauelement |
US6251754B1 (en) * | 1997-05-09 | 2001-06-26 | Denso Corporation | Semiconductor substrate manufacturing method |
US5882987A (en) * | 1997-08-26 | 1999-03-16 | International Business Machines Corporation | Smart-cut process for the production of thin semiconductor material films |
FR2775121B1 (fr) * | 1998-02-13 | 2000-05-05 | Picogiga Sa | Procede de fabrication de substrats en film mince de materiau semiconducteur, structures epitaxiales de materiau semiconducteur formees sur de tels substrats, et composants obtenus a partir de ces structures |
US6346459B1 (en) * | 1999-02-05 | 2002-02-12 | Silicon Wafer Technologies, Inc. | Process for lift off and transfer of semiconductor devices onto an alien substrate |
DE19959182A1 (de) * | 1999-12-08 | 2001-06-28 | Max Planck Gesellschaft | Verfahren zum Herstellen eines optoelektronischen Bauelements |
DE10051465A1 (de) * | 2000-10-17 | 2002-05-02 | Osram Opto Semiconductors Gmbh | Verfahren zur Herstellung eines Halbleiterbauelements auf GaN-Basis |
FR2840731B3 (fr) * | 2002-06-11 | 2004-07-30 | Soitec Silicon On Insulator | Procede de fabrication d'un substrat comportant une couche utile en materiau semi-conducteur monocristallin de proprietes ameliorees |
FR2817394B1 (fr) * | 2000-11-27 | 2003-10-31 | Soitec Silicon On Insulator | Procede de fabrication d'un substrat notamment pour l'optique, l'electronique ou l'optoelectronique et substrat obtenu par ce procede |
JP3729065B2 (ja) * | 2000-12-05 | 2005-12-21 | 日立電線株式会社 | 窒化物半導体エピタキシャルウェハの製造方法及び窒化物半導体エピタキシャルウェハ |
US20030064535A1 (en) * | 2001-09-28 | 2003-04-03 | Kub Francis J. | Method of manufacturing a semiconductor device having a thin GaN material directly bonded to an optimized substrate |
US6995430B2 (en) * | 2002-06-07 | 2006-02-07 | Amberwave Systems Corporation | Strained-semiconductor-on-insulator device structures |
US6953736B2 (en) * | 2002-07-09 | 2005-10-11 | S.O.I.Tec Silicon On Insulator Technologies S.A. | Process for transferring a layer of strained semiconductor material |
JP3997523B2 (ja) * | 2002-11-28 | 2007-10-24 | 信越半導体株式会社 | 発光素子 |
KR100874788B1 (ko) * | 2003-01-07 | 2008-12-18 | 에스. 오. 이. 떼끄 씰리꽁 오 냉쉴라또흐 떼끄놀로지 | 박층 박리 후에 박리 구조를 포함하는 웨이퍼의 기계적수단에 의한 재활용 방법 |
TWI243488B (en) * | 2003-02-26 | 2005-11-11 | Osram Opto Semiconductors Gmbh | Electrical contact-area for optoelectronic semiconductor-chip and its production method |
DE10350707B4 (de) * | 2003-02-26 | 2014-02-13 | Osram Opto Semiconductors Gmbh | Elektrischer Kontakt für optoelektronischen Halbleiterchip und Verfahren zu dessen Herstellung |
US7348260B2 (en) * | 2003-02-28 | 2008-03-25 | S.O.I.Tec Silicon On Insulator Technologies | Method for forming a relaxed or pseudo-relaxed useful layer on a substrate |
TWI240434B (en) | 2003-06-24 | 2005-09-21 | Osram Opto Semiconductors Gmbh | Method to produce semiconductor-chips |
DE102004030063A1 (de) | 2004-06-23 | 2006-03-16 | Heinz Leiber | Permanentmagneterregte Drehfeldmaschine |
US6893936B1 (en) * | 2004-06-29 | 2005-05-17 | International Business Machines Corporation | Method of Forming strained SI/SIGE on insulator with silicon germanium buffer |
-
2004
- 2004-12-23 DE DE102004062290A patent/DE102004062290A1/de not_active Withdrawn
-
2005
- 2005-12-05 EP EP05026485A patent/EP1675189A3/de not_active Withdrawn
- 2005-12-20 US US11/314,447 patent/US7524737B2/en not_active Expired - Fee Related
- 2005-12-21 JP JP2005367794A patent/JP4980616B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
US7524737B2 (en) | 2009-04-28 |
JP2006179922A (ja) | 2006-07-06 |
EP1675189A2 (de) | 2006-06-28 |
DE102004062290A1 (de) | 2006-07-06 |
US20060172506A1 (en) | 2006-08-03 |
EP1675189A3 (de) | 2007-11-07 |
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