JP4980295B2 - 配線基板の製造方法、及び半導体装置の製造方法 - Google Patents

配線基板の製造方法、及び半導体装置の製造方法 Download PDF

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Publication number
JP4980295B2
JP4980295B2 JP2008133992A JP2008133992A JP4980295B2 JP 4980295 B2 JP4980295 B2 JP 4980295B2 JP 2008133992 A JP2008133992 A JP 2008133992A JP 2008133992 A JP2008133992 A JP 2008133992A JP 4980295 B2 JP4980295 B2 JP 4980295B2
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manufacturing
electrode
wiring board
wiring
opening
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JP2008133992A
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Japanese (ja)
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JP2008258646A (ja
Inventor
順一 中村
祐治 小林
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Shinko Electric Industries Co Ltd
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Shinko Electric Industries Co Ltd
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Priority to JP2008133992A priority Critical patent/JP4980295B2/ja
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68345Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used as a support during the manufacture of self supporting substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01046Palladium [Pd]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01078Platinum [Pt]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/014Solder alloys
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP2008133992A 2005-05-31 2008-05-22 配線基板の製造方法、及び半導体装置の製造方法 Active JP4980295B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2008133992A JP4980295B2 (ja) 2005-05-31 2008-05-22 配線基板の製造方法、及び半導体装置の製造方法

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2005159993 2005-05-31
JP2005159993 2005-05-31
JP2008133992A JP4980295B2 (ja) 2005-05-31 2008-05-22 配線基板の製造方法、及び半導体装置の製造方法

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP2006014199A Division JP4146864B2 (ja) 2005-05-31 2006-01-23 配線基板及びその製造方法、並びに半導体装置及び半導体装置の製造方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2011149852A Division JP5254406B2 (ja) 2005-05-31 2011-07-06 配線基板、及び半導体装置

Publications (2)

Publication Number Publication Date
JP2008258646A JP2008258646A (ja) 2008-10-23
JP4980295B2 true JP4980295B2 (ja) 2012-07-18

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JP2008133992A Active JP4980295B2 (ja) 2005-05-31 2008-05-22 配線基板の製造方法、及び半導体装置の製造方法
JP2011149852A Active JP5254406B2 (ja) 2005-05-31 2011-07-06 配線基板、及び半導体装置

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP2011149852A Active JP5254406B2 (ja) 2005-05-31 2011-07-06 配線基板、及び半導体装置

Country Status (2)

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JP (2) JP4980295B2 (zh)
CN (1) CN1873935B (zh)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3257392B2 (ja) * 1996-02-23 2002-02-18 トヨタ自動車株式会社 車輌の挙動制御装置
US9162656B2 (en) 2003-02-26 2015-10-20 Ford Global Technologies, Llc Active driven wheel lift identification for an automotive vehicle
US8569894B2 (en) 2010-01-13 2013-10-29 Advanced Semiconductor Engineering, Inc. Semiconductor package with single sided substrate design and manufacturing methods thereof
JP5436259B2 (ja) * 2010-02-16 2014-03-05 日本特殊陶業株式会社 多層配線基板の製造方法及び多層配線基板
JP5566720B2 (ja) * 2010-02-16 2014-08-06 日本特殊陶業株式会社 多層配線基板及びその製造方法
KR101678052B1 (ko) * 2010-02-25 2016-11-22 삼성전자 주식회사 단층 배선 패턴을 포함한 인쇄회로기판(pcb), pcb를 포함한 반도체 패키지, 반도체 패키지를 포함한 전기전자장치, pcb제조방법, 및 반도체 패키지 제조방법
TWI538137B (zh) * 2010-03-04 2016-06-11 日月光半導體製造股份有限公司 具有單側基板設計的半導體封裝及其製造方法
TWI463622B (zh) * 2010-03-04 2014-12-01 Advanced Semiconductor Eng 具有單側基板設計的半導體封裝及其製造方法
TWI411075B (zh) 2010-03-22 2013-10-01 Advanced Semiconductor Eng 半導體封裝件及其製造方法
US9406658B2 (en) 2010-12-17 2016-08-02 Advanced Semiconductor Engineering, Inc. Embedded component device and manufacturing methods thereof
TWI527173B (zh) * 2013-10-01 2016-03-21 旭德科技股份有限公司 封裝載板
JP6652443B2 (ja) * 2016-05-06 2020-02-26 株式会社日本マイクロニクス 多層配線基板及びこれを用いたプローブカード
TW201826899A (zh) * 2017-01-03 2018-07-16 台虹科技股份有限公司 可撓性電路板之製造方法
CN111564374A (zh) * 2020-07-15 2020-08-21 珠海越亚半导体股份有限公司 封装基板制作方法

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11307883A (ja) * 1998-04-20 1999-11-05 Ngk Spark Plug Co Ltd 配線基板
JP3437453B2 (ja) * 1998-07-06 2003-08-18 イビデン株式会社 Icチップ実装用プリント配線板およびその製造方法
KR100333627B1 (ko) * 2000-04-11 2002-04-22 구자홍 다층 인쇄회로기판 및 그 제조방법
JP3546961B2 (ja) * 2000-10-18 2004-07-28 日本電気株式会社 半導体装置搭載用配線基板およびその製造方法、並びに半導体パッケージ
JP2002261190A (ja) * 2001-02-28 2002-09-13 Sony Corp 半導体装置、その製造方法及び電子機器
US7474538B2 (en) * 2002-05-27 2009-01-06 Nec Corporation Semiconductor device mounting board, method of manufacturing the same, method of inspecting the same, and semiconductor package
JP2004031710A (ja) * 2002-06-27 2004-01-29 Shinko Electric Ind Co Ltd 配線基板の製造方法
JP2005129904A (ja) * 2003-09-29 2005-05-19 Sanyo Electric Co Ltd 半導体装置およびその製造方法
JP4333492B2 (ja) * 2004-06-16 2009-09-16 ソニー株式会社 回路モジュール体の製造方法

Also Published As

Publication number Publication date
JP2008258646A (ja) 2008-10-23
JP5254406B2 (ja) 2013-08-07
CN1873935A (zh) 2006-12-06
JP2011228737A (ja) 2011-11-10
CN1873935B (zh) 2010-06-16

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