JP4893304B2 - 半導体装置及びその製造方法 - Google Patents
半導体装置及びその製造方法 Download PDFInfo
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- JP4893304B2 JP4893304B2 JP2006512220A JP2006512220A JP4893304B2 JP 4893304 B2 JP4893304 B2 JP 4893304B2 JP 2006512220 A JP2006512220 A JP 2006512220A JP 2006512220 A JP2006512220 A JP 2006512220A JP 4893304 B2 JP4893304 B2 JP 4893304B2
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
- H01L21/76826—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. by contacting the layer with gases, liquids or plasmas
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
- H01L21/76828—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. thermal treatment
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
- H01L28/55—Capacitors with a dielectric comprising a perovskite structure material
- H01L28/57—Capacitors with a dielectric comprising a perovskite structure material comprising a barrier layer to prevent diffusion of hydrogen or oxygen
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
- H01L28/40—Capacitors
- H01L28/60—Electrodes
- H01L28/65—Electrodes comprising a noble metal or a noble metal oxide, e.g. platinum (Pt), ruthenium (Ru), ruthenium dioxide (RuO2), iridium (Ir), iridium dioxide (IrO2)
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B53/00—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
- H10B53/30—Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors characterised by the memory core region
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76832—Multiple layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76834—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers formation of thin insulating films on the sidewalls or on top of conductors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53228—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being copper
- H01L23/53238—Additional layers associated with copper layers, e.g. adhesion, barrier, cladding layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/5329—Insulating materials
- H01L23/53295—Stacked insulating layers
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
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- Engineering & Computer Science (AREA)
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- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Plasma & Fusion (AREA)
- Semiconductor Memories (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Description
Claims (8)
- 半導体基板と、
前記半導体基板の上方に形成された強誘電体キャパシタと、
前記強誘電体キャパシタを覆う第1の層間絶縁膜と、
前記層間絶縁膜上に形成された水素拡散防止膜と、
前記水素拡散防止膜上に形成されたエッチングストッパ膜と、
前記エッチングストッパ膜上に形成された第2の層間絶縁膜と、
前記第1の層間絶縁膜に埋め込まれ、前記強誘電体キャパシタと接するプラグと、
前記第2の層間絶縁膜、前記エッチングストッパ膜及び前記水素拡散防止膜に埋め込まれ、Cuを含有し、前記プラグを介して前記強誘電体キャパシタに接続された配線と、
を有することを特徴とする半導体装置。 - 前記水素拡散防止膜は、酸化アルミニウム膜、窒化アルミニウム膜、酸化タンタル膜、窒化タンタル膜、酸化チタン膜及び酸化ジルコニウム膜からなる群から選択された1種の膜であることを特徴とする請求項1に記載の半導体装置。
- 前記第2の層間絶縁膜は、SiON膜であることを特徴とする請求項1に記載の半導体装置。
- 前記基板上に形成されたトランジスタを有し、
前記強誘電体キャパシタの電極の一方は、前記トランジスタに接続されていることを特徴とする請求項1に記載の半導体装置。 - 半導体基板の上方に強誘電体キャパシタを形成する工程と、
前記強誘電体キャパシタを覆う第1の層間絶縁膜を形成する工程と、
前記第1の層間絶縁膜に前記強誘電体キャパシタを露出する孔を形成する工程と、
前記孔内に前記強誘電体キャパシタと接するプラグを形成する工程と、
前記第1の層間絶縁膜上に水素拡散防止膜を形成する工程と、
前記水素拡散防止膜上にエッチングストッパ膜を形成する工程と、
前記エッチングストッパ膜上に第2の層間絶縁膜を形成する工程と、
前記第2の層間絶縁膜、前記エッチングストッパ膜及び前記水素拡散防止膜に前記プラグを露出する溝を形成する工程と、
前記溝内に、Cuを含有し、前記プラグを介して前記強誘電体キャパシタに接続される配線を形成する工程と、
を有することを特徴とする半導体装置の製造方法。 - 前記水素拡散防止膜として、酸化アルミニウム膜、窒化アルミニウム膜、酸化タンタル膜、窒化タンタル膜、酸化チタン膜及び酸化ジルコニウム膜からなる群から選択された1種の膜を形成することを特徴とする請求項5に記載の半導体装置の製造方法。
- 前記第2の層間絶縁膜として、SiON膜を形成することを特徴とする請求項5に記載の半導体装置の製造方法。
- 前記強誘電体キャパシタを形成する工程の前に、前記半導体基板の表面に、前記強誘電体キャパシタに設けられた一方の電極に接続されるトランジスタを形成する工程を有することを特徴とする請求項5に記載の半導体装置の製造方法。
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/JP2004/005302 WO2005101509A1 (ja) | 2004-04-14 | 2004-04-14 | 半導体装置及びその製造方法 |
Publications (2)
Publication Number | Publication Date |
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JPWO2005101509A1 JPWO2005101509A1 (ja) | 2008-03-06 |
JP4893304B2 true JP4893304B2 (ja) | 2012-03-07 |
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JP2006512220A Expired - Fee Related JP4893304B2 (ja) | 2004-04-14 | 2004-04-14 | 半導体装置及びその製造方法 |
Country Status (4)
Country | Link |
---|---|
US (1) | US7781812B2 (ja) |
JP (1) | JP4893304B2 (ja) |
CN (1) | CN100466260C (ja) |
WO (1) | WO2005101509A1 (ja) |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008010758A (ja) | 2006-06-30 | 2008-01-17 | Fujitsu Ltd | 半導体装置及びその製造方法 |
KR100806034B1 (ko) * | 2006-12-05 | 2008-02-26 | 동부일렉트로닉스 주식회사 | Mim 캐패시터를 가지는 반도체 소자 및 그 제조방법 |
FR2916187B1 (fr) * | 2007-05-14 | 2009-07-17 | Marguerite Deperrois | Bouchon pour recipient formant reservoir d'additif |
JP2009064935A (ja) * | 2007-09-06 | 2009-03-26 | Renesas Technology Corp | 半導体集積回路装置の製造方法 |
KR101061353B1 (ko) * | 2008-12-24 | 2011-08-31 | 주식회사 하이닉스반도체 | 반도체 소자의 레저부아 캐패시터의 제조 방법 |
JP5423723B2 (ja) * | 2011-04-08 | 2014-02-19 | 富士通セミコンダクター株式会社 | 半導体装置及びその製造方法 |
CN102420174B (zh) * | 2011-06-07 | 2013-09-11 | 上海华力微电子有限公司 | 一种双大马士革工艺中通孔填充的方法 |
CN102420105B (zh) * | 2011-06-07 | 2013-09-11 | 上海华力微电子有限公司 | 铜大马士革工艺金属-绝缘层-金属电容制造工艺及结构 |
CN102420177A (zh) * | 2011-06-15 | 2012-04-18 | 上海华力微电子有限公司 | 一种超厚顶层金属的双大马士革工艺制作方法 |
KR102546639B1 (ko) | 2017-11-21 | 2023-06-23 | 삼성전자주식회사 | 반도체 장치 |
JP2021044426A (ja) * | 2019-09-12 | 2021-03-18 | キオクシア株式会社 | 半導体記憶装置 |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0822986A (ja) * | 1994-07-05 | 1996-01-23 | Sony Corp | 絶縁膜の成膜方法 |
WO2005067051A1 (ja) * | 2003-12-26 | 2005-07-21 | Fujitsu Limited | 半導体装置、半導体装置の製造方法 |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH10135425A (ja) * | 1996-11-05 | 1998-05-22 | Hitachi Ltd | 半導体集積回路装置およびその製造方法 |
JP2000082684A (ja) | 1998-07-01 | 2000-03-21 | Toshiba Corp | 半導体装置の製造方法 |
US6611014B1 (en) * | 1999-05-14 | 2003-08-26 | Kabushiki Kaisha Toshiba | Semiconductor device having ferroelectric capacitor and hydrogen barrier film and manufacturing method thereof |
JP2001358309A (ja) * | 1999-05-14 | 2001-12-26 | Toshiba Corp | 半導体装置 |
US6548343B1 (en) * | 1999-12-22 | 2003-04-15 | Agilent Technologies Texas Instruments Incorporated | Method of fabricating a ferroelectric memory cell |
JP2001284448A (ja) | 2000-03-29 | 2001-10-12 | Seiko Epson Corp | 半導体装置及びその製造方法 |
KR100442103B1 (ko) * | 2001-10-18 | 2004-07-27 | 삼성전자주식회사 | 강유전성 메모리 장치 및 그 형성 방법 |
US6500678B1 (en) * | 2001-12-21 | 2002-12-31 | Texas Instruments Incorporated | Methods of preventing reduction of IrOx during PZT formation by metalorganic chemical vapor deposition or other processing |
US6713342B2 (en) * | 2001-12-31 | 2004-03-30 | Texas Instruments Incorporated | FeRAM sidewall diffusion barrier etch |
JP4088120B2 (ja) * | 2002-08-12 | 2008-05-21 | 株式会社ルネサステクノロジ | 半導体装置 |
JP2004095861A (ja) * | 2002-08-30 | 2004-03-25 | Fujitsu Ltd | 半導体装置及びその製造方法 |
-
2004
- 2004-04-14 CN CNB2004800413263A patent/CN100466260C/zh not_active Expired - Fee Related
- 2004-04-14 JP JP2006512220A patent/JP4893304B2/ja not_active Expired - Fee Related
- 2004-04-14 WO PCT/JP2004/005302 patent/WO2005101509A1/ja active Application Filing
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2006
- 2006-07-06 US US11/480,906 patent/US7781812B2/en not_active Expired - Fee Related
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0822986A (ja) * | 1994-07-05 | 1996-01-23 | Sony Corp | 絶縁膜の成膜方法 |
WO2005067051A1 (ja) * | 2003-12-26 | 2005-07-21 | Fujitsu Limited | 半導体装置、半導体装置の製造方法 |
Also Published As
Publication number | Publication date |
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US20060249768A1 (en) | 2006-11-09 |
CN100466260C (zh) | 2009-03-04 |
JPWO2005101509A1 (ja) | 2008-03-06 |
CN1914734A (zh) | 2007-02-14 |
WO2005101509A1 (ja) | 2005-10-27 |
US7781812B2 (en) | 2010-08-24 |
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