JP4800290B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP4800290B2 JP4800290B2 JP2007318289A JP2007318289A JP4800290B2 JP 4800290 B2 JP4800290 B2 JP 4800290B2 JP 2007318289 A JP2007318289 A JP 2007318289A JP 2007318289 A JP2007318289 A JP 2007318289A JP 4800290 B2 JP4800290 B2 JP 4800290B2
- Authority
- JP
- Japan
- Prior art keywords
- terminal
- chip
- conductor member
- semiconductor device
- plate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
- H01L2224/0601—Structure
- H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
- H01L2224/401—Disposition
- H01L2224/40151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/40221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/40245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
- H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73221—Strap and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/30107—Inductance
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Description
図1は本発明の実施の形態1の半導体装置(非絶縁型DC/DCコンバータ用マルチチップモジュール)の構造の一例を封止体を透過して示す平面図、図17は図1に示す半導体装置の内部を透過して示す斜視図、図2は図1に示すA−A線に沿って切断した断面の構造を示す断面図、図3は図1に示す半導体装置の構造を示す裏面図、図4は図1に示す半導体装置の構造を示す外観斜視図、図5〜図7はそれぞれ本発明の実施の形態1の変形例の半導体装置の構造を示す断面図、図8は図1に示す半導体装置(非絶縁型DC/DCコンバータ)における実装時の等価回路の一例を示す回路図、図16は比較例の電源用マルチチップモジュールの構造を封止体を透過して示す平面図である。
図9は本発明の実施の形態2の半導体装置(非絶縁型DC/DCコンバータ用マルチチップモジュール)の構造の一例を封止体を透過して示す平面図、図10は図9に示すB−B線に沿って切断した断面の構造を示す断面図、図11は図9に示す半導体装置の構造を示す裏面図、図12は図9に示す半導体装置の構造を示す外観斜視図である。
図13は本発明の実施の形態3の半導体装置(非絶縁型DC/DCコンバータ用マルチチップモジュール)の構造の一例を示す断面図、図14は本発明の実施の形態3の変形例の半導体装置の構造を示す断面図である。
図15は本発明の実施の形態4の半導体装置(非絶縁型DC/DCコンバータ用マルチチップモジュール)の構造の一例を封止体を透過して示す平面図である。
2 制御用パワーMOSFETチップ(第1の半導体チップ)
2a 主面
2b 裏面
3 同期用パワーMOSFETチップ(第2の半導体チップ)
3a 主面
3b 裏面
4 ドライバICチップ(第3の半導体チップ)
4a 主面
5 入力側板状リード部(第1の板状導体部材)
6 出力側板状リード部(第3の板状導体部材)
7 接地側板状リード部
8 ドライバ側板状リード部
9 端子
10 ワイヤ
11 外部接続端子
12,12a ソース用板状リード部(第2の板状導体部材)
13,13a ソース用板状リード部(第4の板状導体部材)
14 銀ペースト
15 金バンプ
16 導体
17 封止体(封止用絶縁樹脂)
17a 表面
17b 裏面
18 はんだ
19 非絶縁型DC/DCコンバータ回路
20 コイル
21 入力電源
22,23 コンデンサ
24 負荷
25 ワイヤ
26 金属板
27 放熱フィン(放熱部材)
28 絶縁シート
29 金属板(他の板状導体部材)
ST1 制御用パワーMOSFETのソース端子
DT1 制御用パワーMOSFETのドレイン端子
GT1 制御用パワーMOSFETのゲート端子
ST2 同期用パワーMOSFETのソース端子
DT2 同期用パワーMOSFETのドレイン端子
GT2 同期用パワーMOSFETのゲート端子
Claims (5)
- 一つのパッケージに形成される半導体装置であって、
入力側板状導体部材、接地側板状導体部材および出力側板状導体部材と、
制御用MOSFETチップと、
同期用MOSFETチップと、
前記制御用MOSFETチップおよび前記同期用MOSFETチップを制御するドライバチップとを備え、
前記制御用MOSFETチップのドレイン端子は前記入力側板状導体部材と電気的に接続され、
前記制御用MOSFETチップのソース端子は前記出力側板状導体部材と電気的に接続され、
前記同期用MOSFETチップのドレイン端子は前記出力側板状導体部材と電気的に接続され、
前記同期用MOSFETチップのソース端子は前記接地側板状導体部材と電気的に接続され、
前記入力側板状導体部材、前記接地側板状導体部材および前記出力側板状導体部材は、前記パッケージの裏面に形成され、
前記接地側板状導体部材の上部に前記同期用MOSFETチップは配置され、
前記同期用MOSFETチップの裏面にはソース端子と、ゲート端子が形成され、かつ、主面にはドレイン端子が形成され、前記同期用MOSFETチップのソース端子とゲート端子は前記パッケージの裏面側を向いており、
前記同期用MOSFETチップのドレイン端子は前記出力側板状導体部材と導体部材により電気的に接続され、
前記同期用MOSFETチップのゲート端子は、該ゲート端子と対向して前記パッケージの裏面側に設けられたゲート端子用板状導体部材と電気的に接続され、
前記ドライバチップは第1端子、第2端子、第3端子及び第4端子を有し、
前記ドライバチップの前記第1端子は前記制御用MOSFETチップのゲート端子と電気的に接続され、かつ、前記ドライバチップの前記第2端子は前記制御用MOSFETチップの前記ソース端子と電気的に接続され、
前記ドライバチップの前記第3端子は前記同期用MOSFETチップの前記ゲート端子と前記ゲート端子用板状導体部材を介して電気的に接続され、かつ、前記ドライバチップの前記第4端子は前記同期用MOSFETチップの前記ソース端子と電気的に接続されていることを特徴とする半導体装置。 - 請求項1記載の半導体装置において、
前記同期用MOSFETチップの前記ゲート端子と前記ゲート端子用板状導体部材は、バンプ電極を介して電気的に接続されていることを特徴とする半導体装置。 - 請求項1記載の半導体装置において、
前記パッケージの裏面において、前記接地側板状導体部材と前記出力側板状導体部材とは隣接して配置されることを特徴とする半導体装置。 - 請求項1記載の半導体装置において、
前記半導体装置はDC/DCコンバータ用の半導体装置であることを特徴とする半導体装置。 - 請求項1記載の半導体装置において、
前記制御用MOSFETチップおよび前記同期用MOSFETチップは、パワートランジスタチップであることを特徴とする半導体装置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007318289A JP4800290B2 (ja) | 2007-12-10 | 2007-12-10 | 半導体装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007318289A JP4800290B2 (ja) | 2007-12-10 | 2007-12-10 | 半導体装置 |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2007287544A Division JP4250191B2 (ja) | 2007-11-05 | 2007-11-05 | Dc/dcコンバータ用半導体装置 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2011136918A Division JP2011181970A (ja) | 2011-06-21 | 2011-06-21 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2008078685A JP2008078685A (ja) | 2008-04-03 |
JP4800290B2 true JP4800290B2 (ja) | 2011-10-26 |
Family
ID=39350351
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2007318289A Expired - Fee Related JP4800290B2 (ja) | 2007-12-10 | 2007-12-10 | 半導体装置 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP4800290B2 (ja) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2010034350A (ja) * | 2008-07-30 | 2010-02-12 | Sanyo Electric Co Ltd | 半導体装置 |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6477153A (en) * | 1987-09-18 | 1989-03-23 | Mitsubishi Electric Corp | Power module |
JPH04299849A (ja) * | 1991-03-28 | 1992-10-23 | Toshiba Corp | 半導体装置 |
JP3022178B2 (ja) * | 1994-06-21 | 2000-03-15 | 日産自動車株式会社 | パワーデバイスチップの実装構造 |
JP3879150B2 (ja) * | 1996-08-12 | 2007-02-07 | 株式会社デンソー | 半導体装置 |
JP2000049281A (ja) * | 1998-07-31 | 2000-02-18 | Toshiba Corp | 半導体装置 |
JP4192396B2 (ja) * | 2000-04-19 | 2008-12-10 | 株式会社デンソー | 半導体スイッチングモジュ−ル及びそれを用いた半導体装置 |
JP3578335B2 (ja) * | 2000-06-29 | 2004-10-20 | 株式会社デンソー | 電力用半導体装置 |
JP3639514B2 (ja) * | 2000-09-04 | 2005-04-20 | 三洋電機株式会社 | 回路装置の製造方法 |
-
2007
- 2007-12-10 JP JP2007318289A patent/JP4800290B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JP2008078685A (ja) | 2008-04-03 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR101168973B1 (ko) | 반도체장치 | |
JP4115882B2 (ja) | 半導体装置 | |
US9281306B2 (en) | Multi-transistor exposed conductive clip for semiconductor packages | |
US20120228696A1 (en) | Stacked die power converter | |
US20070200537A1 (en) | Semiconductor device | |
JP4250191B2 (ja) | Dc/dcコンバータ用半導体装置 | |
JP4769784B2 (ja) | 半導体装置 | |
JP2001068498A (ja) | 半導体装置 | |
JP4705945B2 (ja) | 半導体装置 | |
JP2013141035A (ja) | 半導体装置 | |
JP5292388B2 (ja) | 半導体装置 | |
JP4800290B2 (ja) | 半導体装置 | |
JP2011181970A (ja) | 半導体装置 | |
JP4250193B2 (ja) | Dc/dcコンバータ用半導体装置 | |
JP5412559B2 (ja) | 半導体装置の製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A711 | Notification of change in applicant |
Free format text: JAPANESE INTERMEDIATE CODE: A712 Effective date: 20100528 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20101008 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20101019 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20101220 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20110506 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20110621 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20110712 |
|
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20110803 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20140812 Year of fee payment: 3 |
|
R150 | Certificate of patent or registration of utility model |
Free format text: JAPANESE INTERMEDIATE CODE: R150 Ref document number: 4800290 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
S531 | Written request for registration of change of domicile |
Free format text: JAPANESE INTERMEDIATE CODE: R313531 |
|
R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
LAPS | Cancellation because of no payment of annual fees |