JP4775683B2 - 半導体集積回路装置 - Google Patents
半導体集積回路装置 Download PDFInfo
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- JP4775683B2 JP4775683B2 JP2003338866A JP2003338866A JP4775683B2 JP 4775683 B2 JP4775683 B2 JP 4775683B2 JP 2003338866 A JP2003338866 A JP 2003338866A JP 2003338866 A JP2003338866 A JP 2003338866A JP 4775683 B2 JP4775683 B2 JP 4775683B2
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- Japan
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- 239000004065 semiconductor Substances 0.000 title claims description 39
- 238000009792 diffusion process Methods 0.000 claims description 143
- 239000000758 substrate Substances 0.000 claims description 48
- 238000002955 isolation Methods 0.000 claims description 19
- 230000015572 biosynthetic process Effects 0.000 claims description 12
- 238000000926 separation method Methods 0.000 claims 1
- 239000000969 carrier Substances 0.000 description 25
- 230000003071 parasitic effect Effects 0.000 description 14
- 230000007257 malfunction Effects 0.000 description 7
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 4
- 230000000149 penetrating effect Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 1
- 238000009795 derivation Methods 0.000 description 1
- 230000005283 ground state Effects 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 238000005192 partition Methods 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8222—Bipolar technology
- H01L21/8224—Bipolar technology comprising a combination of vertical and lateral transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/082—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including bipolar components only
- H01L27/0821—Combination of lateral and vertical transistors only
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/73—Bipolar junction transistors
- H01L29/732—Vertical transistors
- H01L29/7322—Vertical transistors having emitter-base and base-collector junctions leaving at the same surface of the body, e.g. planar transistor
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Semiconductor Integrated Circuits (AREA)
- Bipolar Integrated Circuits (AREA)
- Element Separation (AREA)
- Bipolar Transistors (AREA)
Description
源電位が印加されることを特徴とする。従って、本発明の半導体集積回路装置では、制御素子が形成された島領域は、電源電位が印加された一導電型の埋込拡散領域により基板と区分される。そのことで、モータの逆起電力により、駆動素子から発生する自由キャリア(電子)は、基板を通過して、制御素子に流れ込むことを防ぐことができる。また、該自由キャリア(電子)は、該一導電型の埋込拡散領域を介して引き抜かれる。その結果、駆動素子より発生する自由キャリア(電子)により、制御素子が誤動作することを防ぐことができる。
2 小信号部
3 パワーNPNトランジスタ
4 P型の半導体基板
5 N型のエピタキシャル層
6 分離領域
7 第1の島領域
8 第2の島領域
9 第3の島領域
10 第4の島領域
11 第1の分離領域
12 第2の分離領域
13、17、21、25、27、32、41、43 N型の埋込拡散領域
14、18、19、23、34 P型の拡散領域
15、16、20、22、24、26、33、35、36、44 N型の拡散領域
28、42 P型の埋込拡散領域
31 パワーMOSトランジスタ
37 ゲート酸化膜
38 ゲート電極
Claims (3)
- 半導体層と、前記半導体層を複数の一導電型の島領域に区分する逆導電型の分離領域と、前記複数の島領域には、少なくともモータを駆動させる駆動素子と、該駆動素子を制御する制御素子とが組み込まれる半導体集積回路装置において、
前記制御素子が形成される島領域では、逆導電型の埋込拡散領域が、一導電型の埋込拡散領域よりも前記半導体層表面側に配置され、且つ、前記制御素子が形成される島領域を区分する前記分離領域と連結し、
一導電型の拡散領域は、前記制御素子が形成される島領域の周囲にて前記一導電型の埋込拡散領域と連結し、且つ、前記一導電型の埋込拡散領域及び前記一導電型の拡散領域には電源電位が印加されることを特徴とする半導体集積回路装置。 - 前記制御素子が形成される島領域を囲むように配置された一導電型の環状島領域には、前記電源電位が印加された一導電型の拡散領域が配置されることを特徴とする請求項1に記載の半導体集積回路装置。
- 前記半導体層は逆導電型の半導体基板と一導電型のエピタキシャル層とを有し、前記半導体基板と前記エピタキシャル層とに渡り、前記一導電型の埋込拡散領域と前記逆導電型の埋込拡散領域とが、その形成領域を重畳させていることを特徴とする請求項1または請求項2に記載の半導体集積回路装置。
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003338866A JP4775683B2 (ja) | 2003-09-29 | 2003-09-29 | 半導体集積回路装置 |
TW093125464A TWI264111B (en) | 2003-09-29 | 2004-08-26 | Semiconductor integrated circuit device |
CNB2004100825212A CN1309080C (zh) | 2003-09-29 | 2004-09-20 | 半导体集成电路装置 |
US10/950,611 US7741694B2 (en) | 2003-09-29 | 2004-09-27 | Semiconductor integrated circuit device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003338866A JP4775683B2 (ja) | 2003-09-29 | 2003-09-29 | 半導体集積回路装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2005109051A JP2005109051A (ja) | 2005-04-21 |
JP4775683B2 true JP4775683B2 (ja) | 2011-09-21 |
Family
ID=34509665
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2003338866A Expired - Fee Related JP4775683B2 (ja) | 2003-09-29 | 2003-09-29 | 半導体集積回路装置 |
Country Status (4)
Country | Link |
---|---|
US (1) | US7741694B2 (ja) |
JP (1) | JP4775683B2 (ja) |
CN (1) | CN1309080C (ja) |
TW (1) | TWI264111B (ja) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7173315B2 (en) * | 2004-10-26 | 2007-02-06 | Matsushita Electric Industrial Co., Ltd. | Semiconductor device |
DE102008008498B4 (de) * | 2008-02-11 | 2016-10-13 | Austriamicrosystems Ag | Verfahren zur Verminderung von Punch-Through-Neigung zwischen dotierten Halbleiterbereichen und Halbleiterbauelement |
TWI615965B (zh) * | 2016-11-28 | 2018-02-21 | 新唐科技股份有限公司 | 半導體元件 |
CN114628498B (zh) * | 2022-05-16 | 2022-08-26 | 绍兴中芯集成电路制造股份有限公司 | 半导体器件 |
Family Cites Families (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4458158A (en) * | 1979-03-12 | 1984-07-03 | Sprague Electric Company | IC Including small signal and power devices |
IT1214808B (it) * | 1984-12-20 | 1990-01-18 | Ates Componenti Elettron | Tico e semiconduttore processo per la formazione di uno strato sepolto e di una regione di collettore in un dispositivo monoli |
JP2835116B2 (ja) * | 1989-09-29 | 1998-12-14 | 株式会社東芝 | 電力用icおよびその製造方法 |
JP2662446B2 (ja) * | 1989-12-11 | 1997-10-15 | キヤノン株式会社 | 記録ヘッド及び記録ヘッド用素子基板 |
ATE138321T1 (de) * | 1990-01-25 | 1996-06-15 | Canon Kk | Tintenstrahlaufzeichnungssystem |
JPH0456348A (ja) * | 1990-06-26 | 1992-02-24 | Fuji Electric Co Ltd | 半導体集積回路装置 |
JP3128808B2 (ja) * | 1990-07-20 | 2001-01-29 | ソニー株式会社 | 半導体装置 |
IT1246759B (it) * | 1990-12-31 | 1994-11-26 | Sgs Thomson Microelectronics | Struttura integrata di transistore bipolare di potenza e di transistore bipolare di bassa tensione nelle configurazioni ''emitter switching'' o ''semi-ponte'' e relativi processi di fabbricazione. |
JP3108125B2 (ja) * | 1991-05-27 | 2000-11-13 | 三洋電機株式会社 | 半導体集積回路 |
JPH06104459A (ja) * | 1992-09-21 | 1994-04-15 | Sanken Electric Co Ltd | 半導体装置 |
JP3182288B2 (ja) * | 1994-02-28 | 2001-07-03 | 三洋電機株式会社 | 半導体集積回路 |
US5801420A (en) * | 1994-09-08 | 1998-09-01 | Fuji Electric Co. Ltd. | Lateral semiconductor arrangement for power ICS |
JP3286511B2 (ja) * | 1995-11-30 | 2002-05-27 | 三洋電機株式会社 | 半導体集積回路 |
JP3439042B2 (ja) * | 1996-09-27 | 2003-08-25 | 三洋電機株式会社 | 半導体集積回路 |
EP0915508A1 (en) * | 1997-10-10 | 1999-05-12 | STMicroelectronics S.r.l. | Integrated circuit with highly efficient junction insulation |
US6225673B1 (en) * | 1998-03-03 | 2001-05-01 | Texas Instruments Incorporated | Integrated circuit which minimizes parasitic action in a switching transistor pair |
JP4065104B2 (ja) * | 2000-12-25 | 2008-03-19 | 三洋電機株式会社 | 半導体集積回路装置およびその製造方法 |
KR100363101B1 (ko) * | 2001-04-16 | 2002-12-05 | 페어차일드코리아반도체 주식회사 | 고내압 아이솔레이션 영역을 갖는 고전압 반도체 소자 |
-
2003
- 2003-09-29 JP JP2003338866A patent/JP4775683B2/ja not_active Expired - Fee Related
-
2004
- 2004-08-26 TW TW093125464A patent/TWI264111B/zh not_active IP Right Cessation
- 2004-09-20 CN CNB2004100825212A patent/CN1309080C/zh not_active Expired - Fee Related
- 2004-09-27 US US10/950,611 patent/US7741694B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
JP2005109051A (ja) | 2005-04-21 |
CN1309080C (zh) | 2007-04-04 |
CN1604327A (zh) | 2005-04-06 |
US20050082632A1 (en) | 2005-04-21 |
TWI264111B (en) | 2006-10-11 |
TW200520204A (en) | 2005-06-16 |
US7741694B2 (en) | 2010-06-22 |
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