JP4733050B2 - 薄膜に形成されたパターンの誤りの修正方法 - Google Patents
薄膜に形成されたパターンの誤りの修正方法 Download PDFInfo
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- JP4733050B2 JP4733050B2 JP2006544520A JP2006544520A JP4733050B2 JP 4733050 B2 JP4733050 B2 JP 4733050B2 JP 2006544520 A JP2006544520 A JP 2006544520A JP 2006544520 A JP2006544520 A JP 2006544520A JP 4733050 B2 JP4733050 B2 JP 4733050B2
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- 238000000034 method Methods 0.000 title claims description 93
- 239000010409 thin film Substances 0.000 title claims description 72
- 238000013461 design Methods 0.000 claims description 78
- 229920005989 resin Polymers 0.000 claims description 54
- 239000011347 resin Substances 0.000 claims description 54
- 238000012937 correction Methods 0.000 claims description 44
- 238000001459 lithography Methods 0.000 claims description 33
- 238000005530 etching Methods 0.000 claims description 30
- 230000004048 modification Effects 0.000 claims description 29
- 238000012986 modification Methods 0.000 claims description 29
- 238000000206 photolithography Methods 0.000 claims description 19
- 239000000463 material Substances 0.000 claims description 14
- 239000000758 substrate Substances 0.000 claims description 13
- 239000002245 particle Substances 0.000 claims description 10
- 239000004020 conductor Substances 0.000 claims description 8
- 239000012212 insulator Substances 0.000 claims description 8
- 238000012545 processing Methods 0.000 claims description 8
- 239000004065 semiconductor Substances 0.000 claims description 8
- 238000000151 deposition Methods 0.000 claims description 7
- 238000010894 electron beam technology Methods 0.000 claims description 7
- 230000003287 optical effect Effects 0.000 claims description 7
- 238000010884 ion-beam technique Methods 0.000 claims description 5
- 229920000642 polymer Polymers 0.000 claims description 2
- 238000002715 modification method Methods 0.000 claims 1
- 229920006254 polymer film Polymers 0.000 claims 1
- 230000010076 replication Effects 0.000 claims 1
- 238000005516 engineering process Methods 0.000 description 24
- 238000004519 manufacturing process Methods 0.000 description 18
- 239000010408 film Substances 0.000 description 9
- 230000007547 defect Effects 0.000 description 6
- 238000001020 plasma etching Methods 0.000 description 5
- 230000008569 process Effects 0.000 description 5
- 238000003486 chemical etching Methods 0.000 description 4
- 230000010365 information processing Effects 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- 238000004377 microelectronic Methods 0.000 description 3
- 230000004044 response Effects 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 238000012546 transfer Methods 0.000 description 3
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 2
- 238000004590 computer program Methods 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 2
- 230000005855 radiation Effects 0.000 description 2
- 238000003860 storage Methods 0.000 description 2
- 238000003631 wet chemical etching Methods 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 238000001900 extreme ultraviolet lithography Methods 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 229920003986 novolac Polymers 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 230000008439 repair process Effects 0.000 description 1
- 230000003362 replicative effect Effects 0.000 description 1
- 230000000284 resting effect Effects 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y40/00—Manufacture or treatment of nanostructures
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
- G03F1/22—Masks or mask blanks for imaging by radiation of 100nm or shorter wavelength, e.g. X-ray masks, extreme ultraviolet [EUV] masks; Preparation thereof
- G03F1/24—Reflection masks; Preparation thereof
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
- G03F1/68—Preparation processes not covered by groups G03F1/20 - G03F1/50
- G03F1/72—Repair or correction of mask defects
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31144—Etching the insulating layers by chemical or physical means using masks
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Nanotechnology (AREA)
- Chemical & Material Sciences (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Crystallography & Structural Chemistry (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Theoretical Computer Science (AREA)
- Mathematical Physics (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
- Electron Beam Exposure (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Preparing Plates And Mask In Photomechanical Process (AREA)
Description
110、610、810 第2副層
120、620、820 第1副層
300、700、900 第2薄膜
310 光線
500 情報処理装置
550 リソグラフィ装置
950 第3薄膜
M1、M1’、M2、M2’、M3、M3’、M4、M5、M6 パターン
D、D’ デザイン
C1、C2、C3、C4、C5 修正要素
Claims (20)
- 誤りのあるデザインを含む食刻された少なくとも1つの第1副層(120、620、820)と、基板(100、600、800)と前記第1副層との間に位置する少なくとも1つの第2副層と、を含む第1薄膜に形成された前記誤りのあるデザインの修正方法であり、
前記方法は、
(a)前記第1薄膜上に第2薄膜(300、700、900)を堆積し、
(b)所望の修正に応じて前記第2薄膜を食刻またはフォトリソグラフィし、
(b1)前記第2薄膜(300)を通して前記第1副層(120)を食刻し、
(b2)前記第2薄膜(300)を除去し、
(c)前記第1副層(120、620、820)を通して前記第2副層(110、610、810)を食刻することを含む修正方法。 - 前記修正は、1つ又はそれ以上のパターン(M2)の付加からなる、請求項1に記載の修正方法。
- 1つ又はそれ以上のパターン(M2)は前記デザインから欠落しており、前記リソグラフィ段階は、前記欠落したパターンの前記第2薄膜(300、900)内での複製を含む、請求項1または2に記載の修正方法。
- 前記修正は、1つ又はそれ以上のパターン(M’1)を除去することからなる、請求項1に記載の修正方法。
- 1つ又はそれ以上のパターン(M’1)は過剰であり、前記第2薄膜(700)におけるリソグラフィ段階は、前記過剰のパターンを満たす1つ又はそれ以上の妨害物(C2)を残す、請求項4に記載の修正方法。
- 誤りのあるデザインを含む食刻された少なくとも1つの第1副層(120、620、820)と、基板(100、600、800)と前記第1副層との間に位置する少なくとも1つの第2副層と、を含む第1薄膜に形成された前記誤りのあるデザインの修正方法であり、
前記方法は、
(a)前記第1薄膜上に第2薄膜(300、700、900)を堆積し、
(b)所望の修正に応じて前記第2薄膜を食刻またはフォトリソグラフィし、
(b1)前記第2薄膜(900)を通して前記第1副層(820)を食刻し、
(b2)前記第2薄膜(900)を除去し、
(b3)前記第1副層(820)上に第3薄膜(950)を堆積し、
(c)前記第1副層(120、620、820)を通して前記第2副層(110、610、810)を食刻することを含み、
前記修正は、1つ又はそれ以上の欠落したパターン(M6)を付加し、続いて1つ又はそれ以上の過剰のパターン(M’2)を除去することからなり、
前記第3薄膜(950)における第2のリソフラフィは、前記過剰のパターンを満たす妨害物(C 4 )を残す修正方法。 - 前記第3薄膜(950)は誘電体層である、請求項6に記載の方法。
- 前記第3薄膜(950)は樹脂または高分子層である、請求項7に記載の方法。
- 前記第3薄膜(950)は、正または負の感光性樹脂層である、請求項6から8の何れか一項に記載の方法。
- 前記(c)段階の後に、前記第3薄膜(950)を除去することを含む、請求項6から9の何れか一項に記載の方法。
- 前記第1副層を通して前記第2副層(810)を食刻する(c)段階の後に、前記第1副層(820)を除去することを含む、請求項1から10の何れか一項に記載の修正方法。
- 前記第1副層(120、620、820)は、第1の導体、半導体または絶縁体材料に基づき、前記基板(100、600、800)と前記第1副層との間に位置する前記第2副層(110、610、810)は、前記第1の材料とは異なる第2の導体、半導体または絶縁体材料に基づく、請求項1から11の何れか一項に記載の方法。
- 前記第1副層(120、620、820)は犠牲層である、請求項1から12の何れか一項に記載の方法。
- 前記第2薄膜(300、700、900)は誘電体層である、請求項1から13の何れか一項に記載の方法。
- 前記第2薄膜(300、700、900)は、樹脂または高分子膜である、請求項1から14の何れか一項に記載の方法。
- 前記リソグラフィ段階は、直接描画によって行われる、請求項1から15の何れか一項に記載の方法。
- 前記リソグラフィ段階は、1つ又はそれ以上の光学粒子線によって行われる、請求項1から16の何れか一項に記載の方法。
- 前記光線は、イオン線、電子線、陽子線、X線、レーザー光線および紫外線から選択される、請求項17に記載の方法。
- 前記光線は、誤りのあるデザインと所望の修正デザインに関連するデータとを含むデータ媒体に関連するデジタル素子によって制御される、請求項17または18に記載の方法。
- 少なくともリソグラフィ光線を生成するための適切な第1手段と、
薄膜に形成された誤りのあるデザインに関連するデータと、所望の修正デザインに関連するデータとを処理し、そのような処理に続いて修正データを生成する第2手段と、
前記第2手段によって生成された修正データに基づいて前記第1手段を制御する第3手段と、を含む、請求項1から19の何れか一項に記載の方法の1つ又はそれ以上の前記リソグラフィ段階を実行するために適切なリソグラフィ装置。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0351067 | 2003-12-16 | ||
FR0351067A FR2863772B1 (fr) | 2003-12-16 | 2003-12-16 | Procede de reparation d'erreurs de motifs realises dans des couches minces |
PCT/FR2004/050698 WO2005059651A2 (fr) | 2003-12-16 | 2004-12-15 | Procede de reparation d'erreurs de motifs realises dans des couches minces |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2007514205A JP2007514205A (ja) | 2007-05-31 |
JP4733050B2 true JP4733050B2 (ja) | 2011-07-27 |
Family
ID=34610750
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2006544520A Expired - Fee Related JP4733050B2 (ja) | 2003-12-16 | 2004-12-15 | 薄膜に形成されたパターンの誤りの修正方法 |
Country Status (5)
Country | Link |
---|---|
US (1) | US7767104B2 (ja) |
EP (1) | EP1695145B1 (ja) |
JP (1) | JP4733050B2 (ja) |
FR (1) | FR2863772B1 (ja) |
WO (1) | WO2005059651A2 (ja) |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0611827A (ja) * | 1992-03-31 | 1994-01-21 | Matsushita Electron Corp | ホトマスクおよびその修正方法 |
JPH06301195A (ja) * | 1993-04-15 | 1994-10-28 | Dainippon Printing Co Ltd | 位相シフトフォトマスクの修正方法 |
JPH07134397A (ja) * | 1993-11-09 | 1995-05-23 | Fujitsu Ltd | 位相シフトマスクの修正方法と位相シフトマスク用基板 |
JPH10274839A (ja) * | 1997-03-31 | 1998-10-13 | Fujitsu Ltd | 修正用マスク及びハーフトーン位相シフトマスクの修正方法 |
US20030039923A1 (en) * | 2001-08-27 | 2003-02-27 | Pawitter Mangat | Method of forming a pattern on a semiconductor wafer using an attenuated phase shifting reflective mask |
JP2003121989A (ja) * | 2001-10-12 | 2003-04-23 | Hoya Corp | ハーフトーン型位相シフトマスクの修正方法 |
US6596465B1 (en) * | 1999-10-08 | 2003-07-22 | Motorola, Inc. | Method of manufacturing a semiconductor component |
Family Cites Families (13)
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BE793605A (fr) * | 1972-01-03 | 1973-05-02 | Rca Corp | Appareil et procede pour corriger un masque photographique defectueux |
JPS60142518A (ja) * | 1983-12-28 | 1985-07-27 | Seiko Epson Corp | ハ−ドマスクのピンホ−ル修正方法 |
US4639301B2 (en) | 1985-04-24 | 1999-05-04 | Micrion Corp | Focused ion beam processing |
EP0203215B1 (de) * | 1985-05-29 | 1990-02-21 | Ibm Deutschland Gmbh | Verfahren zur Reparatur von Transmissionsmasken |
US5985518A (en) * | 1997-03-24 | 1999-11-16 | Clear Logic, Inc. | Method of customizing integrated circuits using standard masks and targeting energy beams |
US5945238A (en) * | 1998-02-06 | 1999-08-31 | Clear Logic, Inc. | Method of making a reusable photolithography mask |
US5953577A (en) * | 1998-09-29 | 1999-09-14 | Clear Logic, Inc. | Customization of integrated circuits |
US6387787B1 (en) * | 2001-03-02 | 2002-05-14 | Motorola, Inc. | Lithographic template and method of formation and use |
US6593041B2 (en) * | 2001-07-31 | 2003-07-15 | Intel Corporation | Damascene extreme ultraviolet lithography (EUVL) photomask and method of making |
US6777137B2 (en) * | 2002-07-10 | 2004-08-17 | International Business Machines Corporation | EUVL mask structure and method of formation |
US7504182B2 (en) * | 2002-09-18 | 2009-03-17 | Fei Company | Photolithography mask repair |
US7005215B2 (en) * | 2002-10-28 | 2006-02-28 | Synopsys, Inc. | Mask repair using multiple exposures |
US20050109278A1 (en) * | 2003-11-26 | 2005-05-26 | Ted Liang | Method to locally protect extreme ultraviolet multilayer blanks used for lithography |
-
2003
- 2003-12-16 FR FR0351067A patent/FR2863772B1/fr not_active Expired - Fee Related
-
2004
- 2004-12-15 US US10/582,791 patent/US7767104B2/en active Active
- 2004-12-15 JP JP2006544520A patent/JP4733050B2/ja not_active Expired - Fee Related
- 2004-12-15 WO PCT/FR2004/050698 patent/WO2005059651A2/fr not_active Application Discontinuation
- 2004-12-15 EP EP04816552.6A patent/EP1695145B1/fr not_active Not-in-force
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0611827A (ja) * | 1992-03-31 | 1994-01-21 | Matsushita Electron Corp | ホトマスクおよびその修正方法 |
JPH06301195A (ja) * | 1993-04-15 | 1994-10-28 | Dainippon Printing Co Ltd | 位相シフトフォトマスクの修正方法 |
JPH07134397A (ja) * | 1993-11-09 | 1995-05-23 | Fujitsu Ltd | 位相シフトマスクの修正方法と位相シフトマスク用基板 |
JPH10274839A (ja) * | 1997-03-31 | 1998-10-13 | Fujitsu Ltd | 修正用マスク及びハーフトーン位相シフトマスクの修正方法 |
US6596465B1 (en) * | 1999-10-08 | 2003-07-22 | Motorola, Inc. | Method of manufacturing a semiconductor component |
US20030039923A1 (en) * | 2001-08-27 | 2003-02-27 | Pawitter Mangat | Method of forming a pattern on a semiconductor wafer using an attenuated phase shifting reflective mask |
JP2003121989A (ja) * | 2001-10-12 | 2003-04-23 | Hoya Corp | ハーフトーン型位相シフトマスクの修正方法 |
Also Published As
Publication number | Publication date |
---|---|
FR2863772A1 (fr) | 2005-06-17 |
US20070190241A1 (en) | 2007-08-16 |
JP2007514205A (ja) | 2007-05-31 |
FR2863772B1 (fr) | 2006-05-26 |
EP1695145A2 (fr) | 2006-08-30 |
WO2005059651A3 (fr) | 2006-04-20 |
WO2005059651A2 (fr) | 2005-06-30 |
EP1695145B1 (fr) | 2017-08-23 |
US7767104B2 (en) | 2010-08-03 |
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