JP4312715B2 - 複数harq処理のための処理設定の方法 - Google Patents
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/12—Arrangements for detecting or preventing errors in the information received by using return channel
- H04L1/16—Arrangements for detecting or preventing errors in the information received by using return channel in which the return channel carries supervisory signals, e.g. repetition request signals
- H04L1/18—Automatic repetition systems, e.g. Van Duuren systems
- H04L1/1829—Arrangements specially adapted for the receiver end
- H04L1/1835—Buffer management
- H04L1/1841—Resequencing
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/12—Arrangements for detecting or preventing errors in the information received by using return channel
- H04L1/16—Arrangements for detecting or preventing errors in the information received by using return channel in which the return channel carries supervisory signals, e.g. repetition request signals
- H04L1/18—Automatic repetition systems, e.g. Van Duuren systems
- H04L1/1822—Automatic repetition systems, e.g. Van Duuren systems involving configuration of automatic repeat request [ARQ] with parallel processes
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/12—Arrangements for detecting or preventing errors in the information received by using return channel
- H04L1/16—Arrangements for detecting or preventing errors in the information received by using return channel in which the return channel carries supervisory signals, e.g. repetition request signals
- H04L1/18—Automatic repetition systems, e.g. Van Duuren systems
- H04L1/1867—Arrangements specially adapted for the transmitter end
- H04L1/1887—Scheduling and prioritising arrangements
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/12—Arrangements for detecting or preventing errors in the information received by using return channel
- H04L1/16—Arrangements for detecting or preventing errors in the information received by using return channel in which the return channel carries supervisory signals, e.g. repetition request signals
- H04L1/18—Automatic repetition systems, e.g. Van Duuren systems
- H04L1/1812—Hybrid protocols; Hybrid automatic repeat request [HARQ]
- H04L1/1819—Hybrid protocols; Hybrid automatic repeat request [HARQ] with retransmission of additional or different redundancy
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- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Mobile Radio Communication Systems (AREA)
- Communication Control (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Thin Film Transistor (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Description
"Throughput Performance of Memory ARQ Schemes", S. Kallel, R. Link, S. Bakhtiyari, IEEE Transactions on Vehicular Technology, Vol. 48 #3, May 1999 "Physical Layer Aspects of High Speed Downlink Packet Access TR25.848 V5.0.0", 3GPP TSGRAN "Performance of Coded Higher Order Modulation and Hybrid ARQ for Next Generation Cellular CDMA Systems", AmitavaGhosh , Louay Jalloul, Mark Cudak, Brian Classon, Proceedings of VTC 2000 "High Speed Downlink Packet Access (HSDPA): Overall Description Stage 2", V5.2.0, 3GPP TSG RAN TR 25.308 "RRCProtocol Specification", V5.0.0, 3GPP TSG RAN TS 25.331 "UEConformance Testing", V 4.1.0, 3GPP TSG RAN TS 34,108
・ ビット合成のタイプ(インクリメンタルリダンダンシ、チェイス合成)
及び
・ 可能な中で最も高いTFRC、つまり、特定処理で用いられる、可能な中で最も高いMCS及び直交符号最大数
Claims (15)
- 複数のHARQ処理が送信機及び受信機において確立される、移動通信システムにおけるパケット合成を伴うHARQ処理設定の方法であって、
所定のQoS要求を有するデータフローに対して複数のHARQ処理を設定するステップと、
前記受信機において、更なるHARQ処理をスケジューリングするためにソフトバッファサイズが十分であるかを決定するステップと、
ソフトバッファサイズが十分である場合、高優先度のデータフローに対して、ラウンドトリップ時間により必要とされる最小数のHARQ処理に加えて追加HARQ処理を追加設定するステップと、
前記追加HARQ処理でサポートされるトランスポートフォーマットの制限が必要かを決定するステップと、を有し、
前記複数のHARQ処理でサポートされるトランスポートフォーマットの制限が必要である場合、前記追加HARQ処理は、他のHARQ処理でサポートされるトランスポートフォーマットよりも低いトランスポートフォーマットをサポートする、
HARQ処理設定の方法。 - システムパラメータに従って、最小数のHARQ処理を設定するステップ、をさらに有する、
請求項1記載のHARQ処理設定の方法。 - 前記追加HARQ処理は、前記複数のHARQ処理に比して制限された機能を有する、
請求項1記載のHARQ処理設定の方法。 - 前記追加HARQ処理は、前記複数のHARQ処理に比してより低い変調符号化方式(MCS)レベルをサポートする、
請求項1記載のHARQ処理設定の方法。 - 前記追加HARQ処理は、前記複数のHARQ処理に比してより低いトランスポートフォーマットリソースコンビネーション(TFRC)をサポートする、
請求項1記載のHARQ処理設定の方法。 - 前記追加HARQ処理は、ソフトバッファ内の利用可能なメモリに応じて、チェイス合成又はインクリメンタルリダンダンシをサポートする、
請求項1記載のHARQ処理設定の方法。 - 前記追加HARQ処理に対しては、複数のHARQ処理の一つに対して予約されるものと比較して、より小さなソフトバッファサイズが予約される、
請求項1記載のHARQ処理設定の方法。 - 前記送信機は、前記受信機に対して、前記追加HARQ処理について別個の並べ替えバッファを用いるようシグナリングする、
請求項1記載のHARQ処理設定の方法。 - HARQ処理識別が前記受信機に対してシグナリングされる、
請求項1記載のHARQ処理設定の方法。 - HARQ処理数及び/又は追加処理の機能性は、前記受信機及び前記送信機での送信時間及び処理時間によって生じるラウンドトリップ遅延(RTD)に合わせられる、
請求項1記載のHARQ処理設定の方法。 - 設定されるHARQ処理の数は、システムパラメータに応じて動的に変動する、
請求項1記載のHARQ処理設定の方法。 - 前記システムパラメータは、ラウンドトリップ時間、処理時間、トラフィックバースト性、サービス品質(quality of service)、変調符号化方式、共有チャネルのタイミング、及び、最小トランスミッションタイムインターバルのいずれかである、
請求項2又は請求項11記載のHARQ処理設定の方法。 - HARQ処理設定は、HARQプロトコル制御パケットによって、前記送信機から前記受信機に対してシグナリングされる、
請求項1記載のHARQ処理設定の方法。 - 前記HARQプロトコル制御パケットは、インバンドシグナリングにより識別される、
請求項13記載のHARQ処理設定の方法。 - 制御情報を明示的又は黙示的にシグナリングすることができる、
請求項13記載のHARQ処理設定の方法。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP02018085A EP1389847B1 (en) | 2002-08-13 | 2002-08-13 | Hybrid automatic repeat request protocol |
PCT/EP2003/006626 WO2004019543A1 (en) | 2002-08-13 | 2003-06-24 | Method of process configuration for multiple harq processes |
Publications (2)
Publication Number | Publication Date |
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JP2005536159A JP2005536159A (ja) | 2005-11-24 |
JP4312715B2 true JP4312715B2 (ja) | 2009-08-12 |
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JP2004529976A Expired - Lifetime JP4312715B2 (ja) | 2002-08-13 | 2003-06-24 | 複数harq処理のための処理設定の方法 |
Country Status (8)
Country | Link |
---|---|
US (2) | US7631247B2 (ja) |
EP (1) | EP1389847B1 (ja) |
JP (1) | JP4312715B2 (ja) |
CN (1) | CN100409607C (ja) |
AT (1) | ATE349828T1 (ja) |
AU (1) | AU2003289830A1 (ja) |
DE (1) | DE60217097T2 (ja) |
WO (1) | WO2004019543A1 (ja) |
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CN1689261A (zh) | 2005-10-26 |
ATE349828T1 (de) | 2007-01-15 |
US20060092973A1 (en) | 2006-05-04 |
CN100409607C (zh) | 2008-08-06 |
JP2005536159A (ja) | 2005-11-24 |
DE60217097D1 (de) | 2007-02-08 |
DE60217097T2 (de) | 2007-05-10 |
US8719671B2 (en) | 2014-05-06 |
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WO2004019543A1 (en) | 2004-03-04 |
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