JP4188373B2 - 多層誘電体基板および半導体パッケージ - Google Patents
多層誘電体基板および半導体パッケージ Download PDFInfo
- Publication number
- JP4188373B2 JP4188373B2 JP2005518084A JP2005518084A JP4188373B2 JP 4188373 B2 JP4188373 B2 JP 4188373B2 JP 2005518084 A JP2005518084 A JP 2005518084A JP 2005518084 A JP2005518084 A JP 2005518084A JP 4188373 B2 JP4188373 B2 JP 4188373B2
- Authority
- JP
- Japan
- Prior art keywords
- dielectric substrate
- cavity
- opening
- ground conductor
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
- H01P1/00—Auxiliary devices
- H01P1/16—Auxiliary devices for mode selection, e.g. mode suppression or mode promotion; for mode conversion
- H01P1/162—Auxiliary devices for mode selection, e.g. mode suppression or mode promotion; for mode conversion absorbing spurious or unwanted modes of propagation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/66—High-frequency adaptations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
- H01L2223/64—Impedance arrangements
- H01L2223/66—High-frequency adaptations
- H01L2223/6605—High-frequency electrical connections
- H01L2223/6627—Waveguides, e.g. microstrip line, strip line, coplanar line
- H01L2223/6633—Transition between different waveguide types
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05552—Shape in top view
- H01L2224/05554—Shape in top view being square
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/4501—Shape
- H01L2224/45012—Cross-sectional shape
- H01L2224/45014—Ribbon connectors, e.g. rectangular cross-section
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49175—Parallel arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1203—Rectifying Diode
- H01L2924/12036—PN diode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
- H01L2924/141—Analog devices
- H01L2924/1423—Monolithic Microwave Integrated Circuit [MMIC]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1517—Multilayer substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
- H01L2924/1616—Cavity shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16195—Flat cap [not enclosing an internal cavity]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1903—Structure including wave guides
- H01L2924/19038—Structure including wave guides being a hybrid line type
- H01L2924/19039—Structure including wave guides being a hybrid line type impedance transition between different types of wave guides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3025—Electromagnetic shielding
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Health & Medical Sciences (AREA)
- Electromagnetism (AREA)
- Toxicology (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Non-Reversible Transmitting Devices (AREA)
Description
図1〜図3はこの発明にかかる半導体パッケージ1を示すものである。この発明は、任意の周波数帯で動作する半導体デバイス(半導体IC)が搭載された半導体パッケージに適用可能であるが、ここではマイクロ波帯、ミリ波帯などの高周波帯で動作する複数の高周波半導体デバイス(MMIC、以下高周波デバイスと略す)が搭載される半導体パッケージ1(以下、高周波パッケージという)に本発明を適用した場合を示している。半導体パッケージ1は、誘電体基板上に気密でかつ電気的に遮蔽されたキャビティを形成し、このキャビティ内に半導体デバイスを実装する多層誘電体基板2を備えて構成される。この半導体パッケージ1は、例えば、FM−CWレーダに適用して好適である。
図9は実施の形態2の高周波パッケージを示すものである。この実施の形態2においては、実施の形態1のインピーダンス変成器60を削除している。
図10は実施の形態3の高周波パッケージを示すものである。この実施の形態3においては、誘電体伝送路80に設けられた実施の形態1の先端短絡のグランドビア30dと結合開口65との間に誘電体基板の積層方向に抵抗体を配置している。図の例では導体ではなく、抵抗体を充填した抵抗体ビア列300を配置している。
2 多層誘電体基板
3 高周波デバイス(半導体デバイス)
4 シールリング
5 カバー
6 IC搭載凹部
6a 側壁
7 フィードスルー
8 マイクロストリップ線路
10 内部導体パッド
11 導体パッド
12 ワイヤ
15 外部導体パッド
16 グランド面(表層接地導体)
18 グランドパターン(表層接地導体)
19 誘電体
30 グランドビア
30b 側壁グランドビア
33 キャビティ
35 内層接地導体
40 信号ビア
45 内層信号線路
50 開口部
60 インピーダンス変成器
65 結合開口
70 抵抗体
80 誘電体伝送路、
300 抵抗体ビア列
Claims (11)
- 誘電体基板上に、電磁的にシールドされた空間であるキャビティを形成し、このキャビティ内に半導体デバイスを実装する多層誘電体基板において、
前記キャビティ内の誘電体基板上の全体に配される、前記キャビティの電磁シールドの一部である表層接地導体と、前記表層接地導体の一部に形成した開口部と、
誘電体基板内に形成され、前記開口部を介して前記キャビティと電気的に結合する、信号波の基板内実効波長の略1/4の奇数倍の長さを有するインピーダンス変成器と、
誘電体基板内に形成され、信号波の基板内実効波長の略1/4の奇数倍の長さを有する先端短絡の誘電体伝送路と、
前記インピーダンス変成器と誘電体伝送路との接続部における内層接地導体に形成された結合開口と、
この結合開口に形成される抵抗体と、
を備えることを特徴とする多層誘電体基板。 - 誘電体基板上に、電磁的にシールドされた空間であるキャビティを形成し、このキャビティ内に半導体デバイスを実装する多層誘電体基板において、
前記キャビティ内の誘電体基板上の全体に配される、前記キャビティの電磁シールドの一部である表層接地導体と、前記表層接地導体の一部に形成した開口部と、
誘電体基板内に形成され、前記開口部を介して前記キャビティと電気的に結合する、信号波の基板内実効波長の略1/4の奇数倍の長さを有するインピーダンス変成器と、
誘電体基板内に形成された先端短絡の誘電体伝送路と、
前記インピーダンス変成器と誘電体伝送路との接続部における内層接地導体に形成された結合開口と、
前記誘電体伝送路内であって前記先端短絡点から信号波の基板内実効波長の略1/4の奇数倍の位置に配置した抵抗体と、
を備えることを特徴とする多層誘電体基板。 - 誘電体基板上に、電磁的にシールドされた空間であるキャビティを形成し、このキャビティ内に半導体デバイスを実装する多層誘電体基板において、
前記キャビティ内の誘電体基板上の全体に配される、前記キャビティの電磁シールドの一部である表層接地導体と、前記表層接地導体の一部に形成した開口部と、
前記誘電体基板内に形成され、前記開口部を介して前記キャビティと電気的に結合する、信号波の基板内実効波長の略1/4の奇数倍の長さを有する先端短絡の誘電体伝送路と、
上記開口部に形成される抵抗体と、
を備えることを特徴とする多層誘電体基板。 - 誘電体基板上に、電磁的にシールドされた空間であるキャビティを形成し、このキャビティ内に半導体デバイスを実装する多層誘電体基板において、
前記キャビティ内の誘電体基板上の全体に配される、前記キャビティの電磁シールドの一部である表層接地導体と、前記表層接地導体の一部に形成した開口部と、
誘電体基板内に形成され、前記開口部を介して前記キャビティと電気的に結合する先端短絡の誘電体伝送路と、
前記誘電体伝送路内であって前記先端短絡点から信号波の基板内実効波長の略1/4の奇数倍の位置に配置した抵抗体と、
を備えることを特徴とする多層誘電体基板。 - 前記開口部は、前記誘電体基板上であって、キャビティの側端部あるいは側端部から信号波の波長の略1/2の整数倍の長さを有する位置に配置することを特徴とする請求項1〜4のいずれか一つに記載の多層誘電体基板。
- 前記開口部、誘電体伝送路および抵抗体を、半導体デバイスが搭載される部位の周囲に形成したことを特徴とする請求項1または2に記載の多層誘電体基板。
- 前記開口部、インピーダンス変成器、誘電体伝送路、結合開口および抵抗体を、半導体デバイスが搭載される部位の周囲に形成したことを特徴とする請求項3または4に記載の多層誘電体基板。
- 前記誘電体伝送路は、内層接地導体と、複数のグランドビアと、これら内層接地導体および複数のグランドビアの内部の誘電体とを有して構成したことを特徴とする請求項1〜4のいずれか一つに記載の多層誘電体基板。
- 前記インピーダンス変成器は、内層接地導体と、複数のグランドビアと、これら内層接地導体および複数のグランドビアの内部の誘電体とを有して構成したことを特徴とする請求項3または4に記載の多層誘電体基板。
- 請求項1〜4のいずれか一つに記載の多層誘電体基板と、
前記キャビティを形成する電磁シールド部材と、
を備えることを特徴とする半導体パッケージ。 - 1〜複数の半導体デバイスと、
前記半導体デバイスを搭載する請求項1〜4のいずれか一つに記載の多層誘電体基板と、
前記半導体デバイスを収容するための前記キャビティを形成する電磁シールド部材と、
を備えることを特徴とする半導体パッケージ。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004190316 | 2004-06-28 | ||
JP2004190316 | 2004-06-28 | ||
PCT/JP2005/011650 WO2006001389A1 (ja) | 2004-06-28 | 2005-06-24 | 多層誘電体基板および半導体パッケージ |
Publications (2)
Publication Number | Publication Date |
---|---|
JPWO2006001389A1 JPWO2006001389A1 (ja) | 2008-04-17 |
JP4188373B2 true JP4188373B2 (ja) | 2008-11-26 |
Family
ID=35781831
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2005518084A Active JP4188373B2 (ja) | 2004-06-28 | 2005-06-24 | 多層誘電体基板および半導体パッケージ |
Country Status (4)
Country | Link |
---|---|
US (2) | US7504710B2 (ja) |
EP (2) | EP1775765B1 (ja) |
JP (1) | JP4188373B2 (ja) |
WO (1) | WO2006001389A1 (ja) |
Families Citing this family (43)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1775765B1 (en) * | 2004-06-28 | 2018-05-02 | Mitsubishi Electric Corporation | Multilayer dielectric substrate and semiconductor package |
CN101317335B (zh) * | 2006-03-22 | 2012-04-11 | 三菱电机株式会社 | 发送接收装置 |
US7982684B2 (en) * | 2006-12-06 | 2011-07-19 | The Boeing Company | Method and structure for RF antenna module |
US7444737B2 (en) * | 2006-12-07 | 2008-11-04 | The Boeing Company | Method for manufacturing an antenna |
CN101578697B (zh) * | 2007-03-14 | 2011-12-28 | 三菱电机株式会社 | 高频封装件 |
EP2221867B1 (en) * | 2007-10-30 | 2017-08-02 | Kyocera Corporation | Connection terminal, package using the same, and electronic device |
US8384500B2 (en) | 2007-12-13 | 2013-02-26 | Broadcom Corporation | Method and system for MEMS switches fabricated in an integrated circuit package |
US8134425B2 (en) * | 2007-12-13 | 2012-03-13 | Broadcom Corporation | Method and system for filters embedded in an integrated circuit package |
US7859360B2 (en) * | 2007-12-13 | 2010-12-28 | Broadcom Corporation | Method and system for controlling MEMS switches in an integrated circuit package |
US8115567B2 (en) * | 2007-12-13 | 2012-02-14 | Broadcom Corporation | Method and system for matching networks embedded in an integrated circuit package |
US8072065B2 (en) * | 2008-02-14 | 2011-12-06 | Viasat, Inc. | System and method for integrated waveguide packaging |
US7863998B2 (en) * | 2008-02-25 | 2011-01-04 | Broadcom Corporation | Method and system for processing signals via directional couplers embedded in an integrated circuit package |
US7859359B2 (en) * | 2008-02-25 | 2010-12-28 | Broadcom Corporation | Method and system for a balun embedded in an integrated circuit package |
US20090219908A1 (en) * | 2008-02-29 | 2009-09-03 | Ahmadreza Rofougaran | Method and system for processing signals via diplexers embedded in an integrated circuit package |
JP5132760B2 (ja) * | 2008-03-17 | 2013-01-30 | 三菱電機株式会社 | 多層誘電体基板および半導体パッケージ |
US7982555B2 (en) * | 2008-03-28 | 2011-07-19 | Broadcom Corporation | Method and system for processing signals via power splitters embedded in an integrated circuit package |
US8269344B2 (en) * | 2008-03-28 | 2012-09-18 | Broadcom Corporation | Method and system for inter-chip communication via integrated circuit package waveguides |
US8450846B2 (en) * | 2008-06-19 | 2013-05-28 | Broadcom Corporation | Method and system for communicating via flip-chip die and package waveguides |
US8274147B2 (en) * | 2008-06-19 | 2012-09-25 | Broadcom Corporation | Method and system for intra-printed circuit board communication via waveguides |
US8384596B2 (en) * | 2008-06-19 | 2013-02-26 | Broadcom Corporation | Method and system for inter-chip communication via integrated circuit package antennas |
US20100020518A1 (en) * | 2008-07-28 | 2010-01-28 | Anadigics, Inc. | RF shielding arrangement for semiconductor packages |
US7772694B2 (en) * | 2008-11-26 | 2010-08-10 | Freescale Semiconductor, Inc. | Integrated circuit module and method of packaging same |
KR101038234B1 (ko) * | 2009-02-24 | 2011-06-01 | 삼성전기주식회사 | 전자기 밴드갭 구조를 이용한 emi 노이즈 저감 기판 |
US8238842B2 (en) * | 2009-03-03 | 2012-08-07 | Broadcom Corporation | Method and system for an on-chip and/or an on-package transmit/receive switch and antenna |
US8447250B2 (en) * | 2009-06-09 | 2013-05-21 | Broadcom Corporation | Method and system for an integrated voltage controlled oscillator-based transmitter and on-chip power distribution network |
TWI497679B (zh) * | 2009-11-27 | 2015-08-21 | Advanced Semiconductor Eng | 半導體封裝件及其製造方法 |
US8569894B2 (en) | 2010-01-13 | 2013-10-29 | Advanced Semiconductor Engineering, Inc. | Semiconductor package with single sided substrate design and manufacturing methods thereof |
US7999361B1 (en) * | 2010-02-19 | 2011-08-16 | Altera Corporation | Shielding structure for transmission lines |
TWI411075B (zh) | 2010-03-22 | 2013-10-01 | Advanced Semiconductor Eng | 半導體封裝件及其製造方法 |
AU2011218651B2 (en) | 2010-08-31 | 2014-10-09 | Viasat, Inc. | Leadframe package with integrated partial waveguide interface |
US8941222B2 (en) | 2010-11-11 | 2015-01-27 | Advanced Semiconductor Engineering Inc. | Wafer level semiconductor package and manufacturing methods thereof |
US9406658B2 (en) | 2010-12-17 | 2016-08-02 | Advanced Semiconductor Engineering, Inc. | Embedded component device and manufacturing methods thereof |
CN102544665B (zh) * | 2011-12-21 | 2015-01-21 | 中国科学院苏州纳米技术与纳米仿生研究所 | 一种等效介电常数能够调节的传输线 |
JP5823023B2 (ja) * | 2012-03-22 | 2015-11-25 | 京セラ株式会社 | 素子収納用パッケージ |
US9219041B2 (en) * | 2012-03-29 | 2015-12-22 | International Business Machines Corporation | Electronic package for millimeter wave semiconductor dies |
JP6054188B2 (ja) * | 2013-01-30 | 2016-12-27 | 株式会社東芝 | 半導体パッケージおよびその製造方法 |
JP5974956B2 (ja) * | 2013-03-29 | 2016-08-23 | 三菱電機株式会社 | 高周波パッケージ |
JP2015056606A (ja) * | 2013-09-13 | 2015-03-23 | 株式会社東芝 | 半導体装置 |
US10056306B2 (en) * | 2016-02-04 | 2018-08-21 | Globalfoundries Inc. | Test structure for monitoring interface delamination |
KR102639101B1 (ko) * | 2017-02-24 | 2024-02-22 | 에스케이하이닉스 주식회사 | 전자기간섭 차폐 구조를 갖는 반도체 패키지 |
US10390455B2 (en) * | 2017-03-27 | 2019-08-20 | Raytheon Company | Thermal isolation of cryo-cooled components from circuit boards or other structures |
US20190165108A1 (en) * | 2017-11-30 | 2019-05-30 | Raytheon Company | Reconstituted wafer structure |
US10928501B2 (en) * | 2018-08-28 | 2021-02-23 | Infineon Technologies Ag | Target detection in rainfall and snowfall conditions using mmWave radar |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5030935A (en) * | 1989-05-11 | 1991-07-09 | Ball Corporation | Method and apparatus for dampening resonant modes in packaged microwave circuits |
JPH0818310A (ja) | 1994-06-28 | 1996-01-19 | Kyocera Corp | 半導体パッケージ |
EP0874415B1 (en) * | 1997-04-25 | 2006-08-23 | Kyocera Corporation | High-frequency package |
JP3580680B2 (ja) | 1997-09-30 | 2004-10-27 | 京セラ株式会社 | 高周波用パッケージおよびその接続構造 |
JP2000058691A (ja) * | 1998-08-07 | 2000-02-25 | Sharp Corp | ミリ波半導体装置 |
US6255730B1 (en) * | 1999-04-30 | 2001-07-03 | Agilent Technologies, Inc. | Integrated low cost thick film RF module |
JP3683129B2 (ja) | 1999-07-07 | 2005-08-17 | サンヨー食品株式会社 | 光学活性アルコールの製造方法 |
JP4013432B2 (ja) | 2000-01-11 | 2007-11-28 | 三菱電機株式会社 | 半導体パッケージ |
JP2002124592A (ja) * | 2000-10-16 | 2002-04-26 | Sharp Corp | 高周波装置 |
JP4372360B2 (ja) | 2001-01-10 | 2009-11-25 | 三菱電機株式会社 | 導波管/マイクロストリップ線路変換器 |
JP2003078310A (ja) * | 2001-09-04 | 2003-03-14 | Murata Mfg Co Ltd | 高周波用線路変換器、部品、モジュールおよび通信装置 |
EP1351301B1 (en) * | 2002-04-03 | 2009-06-17 | Panasonic Corporation | Semiconductor built-in millimeter-wave band module |
EP1775765B1 (en) * | 2004-06-28 | 2018-05-02 | Mitsubishi Electric Corporation | Multilayer dielectric substrate and semiconductor package |
JP4947967B2 (ja) * | 2005-12-12 | 2012-06-06 | 富士通株式会社 | 回路モジュール |
-
2005
- 2005-06-24 EP EP05753423.2A patent/EP1775765B1/en active Active
- 2005-06-24 EP EP18158732.0A patent/EP3358670A1/en active Pending
- 2005-06-24 JP JP2005518084A patent/JP4188373B2/ja active Active
- 2005-06-24 US US11/630,996 patent/US7504710B2/en active Active
- 2005-06-24 WO PCT/JP2005/011650 patent/WO2006001389A1/ja not_active Application Discontinuation
-
2009
- 2009-01-16 US US12/355,363 patent/US7964937B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
US7964937B2 (en) | 2011-06-21 |
EP1775765A1 (en) | 2007-04-18 |
JPWO2006001389A1 (ja) | 2008-04-17 |
US7504710B2 (en) | 2009-03-17 |
US20070273008A1 (en) | 2007-11-29 |
EP3358670A1 (en) | 2018-08-08 |
WO2006001389A1 (ja) | 2006-01-05 |
EP1775765B1 (en) | 2018-05-02 |
US20090127674A1 (en) | 2009-05-21 |
EP1775765A4 (en) | 2009-09-09 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP4188373B2 (ja) | 多層誘電体基板および半導体パッケージ | |
EP2463953B1 (en) | Transmission line substrate and semiconductor package | |
US8222976B2 (en) | Multilayer dielectric substrate and semiconductor package | |
JP2007287916A (ja) | 電子部品パッケージ | |
JP5047357B2 (ja) | 高周波収納ケースおよび高周波モジュール | |
JP2008244289A (ja) | 電磁シールド構造 | |
JP4516101B2 (ja) | 伝送線路基板および半導体パッケージ | |
JP2006073935A (ja) | 半導体パッケージ | |
JP5495619B2 (ja) | 多層高周波パッケージ基板 | |
JP3813946B2 (ja) | 高周波モジュール用ボード | |
JP3701624B2 (ja) | 高周波モジュール用ボード | |
JP2001203290A (ja) | マイクロ波パッケージ | |
JP2008263021A (ja) | 誘電体パッケージ | |
JPH10163377A (ja) | マイクロ波回路用パッケージおよびその実装体 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20080909 |
|
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20080910 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 4188373 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20110919 Year of fee payment: 3 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20110919 Year of fee payment: 3 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20120919 Year of fee payment: 4 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20130919 Year of fee payment: 5 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |