JP3917624B2 - 低密度パリティチェック(ldpc)デコーダにおける経路指定方法およびシステム - Google Patents
低密度パリティチェック(ldpc)デコーダにおける経路指定方法およびシステム Download PDFInfo
- Publication number
- JP3917624B2 JP3917624B2 JP2004562621A JP2004562621A JP3917624B2 JP 3917624 B2 JP3917624 B2 JP 3917624B2 JP 2004562621 A JP2004562621 A JP 2004562621A JP 2004562621 A JP2004562621 A JP 2004562621A JP 3917624 B2 JP3917624 B2 JP 3917624B2
- Authority
- JP
- Japan
- Prior art keywords
- ldpc
- memory
- parity check
- bit
- edge
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000000034 method Methods 0.000 title claims description 36
- 239000011159 matrix material Substances 0.000 claims description 63
- 230000015654 memory Effects 0.000 claims description 53
- 238000012545 processing Methods 0.000 claims description 13
- 230000010363 phase shift Effects 0.000 claims description 11
- 238000004891 communication Methods 0.000 description 33
- 238000013459 approach Methods 0.000 description 21
- 238000010586 diagram Methods 0.000 description 21
- 238000002372 labelling Methods 0.000 description 19
- 230000008569 process Effects 0.000 description 14
- 230000008901 benefit Effects 0.000 description 8
- 230000006870 function Effects 0.000 description 8
- 238000013507 mapping Methods 0.000 description 7
- 230000003287 optical effect Effects 0.000 description 6
- 238000013461 design Methods 0.000 description 5
- 238000004088 simulation Methods 0.000 description 5
- 230000005540 biological transmission Effects 0.000 description 4
- 230000014509 gene expression Effects 0.000 description 3
- 230000006872 improvement Effects 0.000 description 3
- 239000013598 vector Substances 0.000 description 3
- 238000004364 calculation method Methods 0.000 description 2
- 238000010276 construction Methods 0.000 description 2
- 230000003068 static effect Effects 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 241000160777 Hipparchia semele Species 0.000 description 1
- 230000002238 attenuated effect Effects 0.000 description 1
- 238000004422 calculation algorithm Methods 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 238000012937 correction Methods 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000006731 degradation reaction Methods 0.000 description 1
- 230000008030 elimination Effects 0.000 description 1
- 238000003379 elimination reaction Methods 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 230000007246 mechanism Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000013307 optical fiber Substances 0.000 description 1
- 230000008520 organization Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 238000013139 quantization Methods 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
- 238000005303 weighing Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0045—Arrangements at the receiver end
- H04L1/0047—Decoding adapted to other signal detection operation
- H04L1/005—Iterative decoding, including iteration between signal detection and decoding operation
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/01—Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1105—Decoding
- H03M13/1111—Soft-decision decoding, e.g. by means of message passing or belief propagation algorithms
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1105—Decoding
- H03M13/1111—Soft-decision decoding, e.g. by means of message passing or belief propagation algorithms
- H03M13/1117—Soft-decision decoding, e.g. by means of message passing or belief propagation algorithms using approximations for check node processing, e.g. an outgoing message is depending on the signs and the minimum over the magnitudes of all incoming messages according to the min-sum rule
- H03M13/112—Soft-decision decoding, e.g. by means of message passing or belief propagation algorithms using approximations for check node processing, e.g. an outgoing message is depending on the signs and the minimum over the magnitudes of all incoming messages according to the min-sum rule with correction functions for the min-sum rule, e.g. using an offset or a scaling factor
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1105—Decoding
- H03M13/1131—Scheduling of bit node or check node processing
- H03M13/1137—Partly parallel processing, i.e. sub-blocks or sub-groups of nodes being processed in parallel
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/116—Quasi-cyclic LDPC [QC-LDPC] codes, i.e. the parity-check matrix being composed of permutation or circulant sub-matrices
- H03M13/1165—QC-LDPC codes as defined for the digital video broadcasting [DVB] specifications, e.g. DVB-Satellite [DVB-S2]
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/11—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
- H03M13/1102—Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
- H03M13/1148—Structural properties of the code parity-check or generator matrix
- H03M13/118—Parity check matrix structured for simplifying encoding, e.g. by having a triangular or an approximate triangular structure
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/25—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM]
- H03M13/255—Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] with Low Density Parity Check [LDPC] codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/29—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
- H03M13/2906—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes using block codes
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/35—Unequal or adaptive error protection, e.g. by providing a different level of protection according to significance of source information or by adapting the coding according to the change of transmission channel characteristics
- H03M13/356—Unequal error protection [UEP]
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/63—Joint error correction and other techniques
- H03M13/6325—Error control coding in combination with demodulation
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/65—Purpose and implementation aspects
- H03M13/6577—Representation or format of variables, register sizes or word-lengths and quantization
- H03M13/6583—Normalization other than scaling, e.g. by subtraction
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0041—Arrangements at the transmitter end
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0057—Block codes
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0059—Convolutional codes
- H04L1/006—Trellis-coded modulation
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0061—Error detection codes
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0064—Concatenated codes
- H04L1/0065—Serial concatenated codes
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
- H04L1/0056—Systems characterized by the type of code used
- H04L1/0071—Use of interleaving
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/06—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
- H04L25/067—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection providing soft decisions, i.e. decisions together with an estimate of reliability
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying
- H04L27/186—Phase-modulated carrier systems, i.e. using phase-shift keying in which the information is carried by both the individual signal points and the subset to which the individual signal points belong, e.g. coset coding or related schemes
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying
- H04L27/20—Modulator circuits; Transmitter circuits
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/32—Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
- H04L27/34—Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/32—Carrier systems characterised by combinations of two or more of the types covered by groups H04L27/02, H04L27/10, H04L27/18 or H04L27/26
- H04L27/34—Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
- H04L27/36—Modulator circuits; Transmitter circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/09—Error detection only, e.g. using cyclic redundancy check [CRC] codes or single parity bit
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
- H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
- H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
- H03M13/13—Linear codes
- H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes
- H03M13/151—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes using error location or error correction polynomials
- H03M13/152—Bose-Chaudhuri-Hocquenghem [BCH] codes
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04H—BROADCAST COMMUNICATION
- H04H40/00—Arrangements specially adapted for receiving broadcast information
- H04H40/18—Arrangements characterised by circuits or components specially adapted for receiving
- H04H40/27—Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95
- H04H40/90—Arrangements characterised by circuits or components specially adapted for receiving specially adapted for broadcast systems covered by groups H04H20/53 - H04H20/95 specially adapted for satellite broadcast receiving
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Probability & Statistics with Applications (AREA)
- Theoretical Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Mathematical Physics (AREA)
- Pure & Applied Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Algebra (AREA)
- Power Engineering (AREA)
- Multimedia (AREA)
- Error Detection And Correction (AREA)
- Detection And Correction Of Errors (AREA)
- Detection And Prevention Of Errors In Transmission (AREA)
- Medicines That Contain Protein Lipid Enzymes And Other Medicines (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
- Coloring Foods And Improving Nutritive Qualities (AREA)
- Reduction Or Emphasis Of Bandwidth Of Signals (AREA)
- Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
Description
低密度パリティチェック(LDPC)コードを効率的に復号するためのシステム、方法およびソフトウェアを説明する。以下の説明において、多くの特定の詳細は本発明を完全に理解するために説明の目的で記載されている。しかしながら、本発明はこれらの特定の詳細なしで、あるいは等価の構成により実現可能であることは当業者に明らかである。他の例において、よく知られている構造および装置は、本発明をいたずらに不明瞭にすることを避けるためにブロック図の形態で示されている。
H(n-k)xn=[A(n-k)xkB(n-k)x(n-k)]
の形式のものであり、ここで、Bは下方の三角である。
ej=aj−uj j=0,1,2
次に、8−PSKシンボル確率:pi (i=0,1,…,7)が決定される。
Claims (20)
- 低密度パリティチェック(LDPC)コード化された信号を生成するために使用された構成されたパリティチェックマトリックスに関連付けられたエッジ値を検索し、エッジ値はビットノードとチェックノードとの関係を特定し、エッジ値のセットの同時検索を可能にする予め定められた方式にしたがってメモリ内に記憶され、前記予め定められた方式はエッジ値のセットに対する隣接した物理的メモリ位置を特定し、
検索されたエッジ値に基づいてLDPCコード化された信号に対応した復号された信号を出力するステップを含んでいるLDPCコード化された信号の復号方法。 - メモリ(1501,1503)は、ビットノードの度数にしたがって区分されている請求項1記載の方法。
- n度のビットノードを有するエッジ値はメモリ(1501,1503)の第1の部分に記憶され、nより大きい度数のビットノードを有するエッジ値はメモリ(1501,1503)の第2の部分に記憶される請求項2記載の方法。
- メモリ(1501,1503)のアドレスは、読出し専用メモリ(ROM)中に記憶されている請求項1記載の方法。
- エッジ値のセットは、メモリ(1501,1503)に接続されたプロセッサの単一のクロックサイクルで検索され、MのビットノードまたはMのチェックノードのグループに隣接しており、ここでMは並列処理エンジンの数である請求項1記載の方法。
- エッジの隣接した配置は、パリティチェックマトリックスのある部分を三角であるように制限を与える請求項1記載の方法。
- LDPCコード化された信号は、8−PSK(位相シフトキーイング)、16−QAM(直交振幅変調)、16−APSK(振幅位相シフトキーイング)、32−APSKおよびQPSK(直交位相シフトキーイング)の1つを含む信号コンステレーションにしたがって変調される請求項1記載の方法。
- 検索するステップにおけるエッジ値のセットは、固定されたサイズのものである請求項1記載の方法。
- 低密度パリティチェック(LDPC)コード化された信号を復号する命令が実行されたときに、それが1以上のプロセッサに請求項1記載の方法を行わせるように構成されている命令を有しているコンピュータ読出し可能な媒体。
- 低密度パリティチェック(LDPC)コード化された信号を生成するために使用された構成されたパリティチェックマトリックスに関連付けられたエッジ値を検索する手段と、
ビットノードとチェックノードとの関係を特定するエッジ値のセットの同時検索を可能にする予め定められた方式にしたがってエッジ値を記憶するメモリ(1501,1503)と、
検索されたエッジ値に基づいてLDPCコード化された信号に対応した復号された信号を出力する手段とを備え、
前記予め定められた方式はエッジ値のセットに対する隣接した物理的メモリ位置を特定する、LDPCコード化された信号を復号するデコーダ。 - メモリ(1501,1503)は、ビットノードの度数にしたがって区分されている請求項10記載のデコーダ。
- n度のビットノードに接続されたエッジ値はメモリ(1501,1503)の第1の部分に記憶され、nより大きい度数のビットノードに接続されたエッジ値はメモリ(1501,1503)の第2の部分に記憶される請求項10記載のデコーダ。
- 構成されたパリティチェックマトリックスは、パリティチェックマトリックスのサブマトリックスが下方三角領域に制限されたパリティチェック値を含んでいる請求項10記載のデコーダ。
- LDPCコード化された信号は、8−PSK(位相シフトキーイング)、16−QAM(直交振幅変調)、16−APSK(振幅位相シフトキーイング)、32−APSKおよびQPSK(直交位相シフトキーイング)の1つを含む信号コンステレーションにしたがって変調される請求項10記載のデコーダ。
- さらに、メモリ(1501,1503)のアドレスを記憶する読出し専用メモリを備えている請求項10記載のデコーダ。
- さらに、メモリ(1501,1503)に接続されたプロセッサを備えており、エッジ値のセットはこのプロセッサの単一のクロックサイクルで検索され、MのビットノードまたはMのチェックノードのグループに隣接しており、ここでMは並列処理エンジンの数である請求項10記載のデコーダ。
- n度のビットノードに接続されており、LDPCコード化された信号を生成するために使用された構成されたパリティチェックマトリックスに関連付けられたエッジ値の第1のグループを記憶する第1の部分と、
nより大きい度数のビットノードに接続されており、(LDPC)コード化された信号を生成するために使用された構成されたパリティチェックマトリックスに関連付けられたエッジ値の第2のグループを記憶する第2の部分とを備えており、
復号された信号を出力するために第1のグループまたは第2のグループからのエッジ値のセットが検索されるLDPCコード化された信号を復号するLDPCデコーダによりアクセス可能なメモリ。 - 前記エッジ値のセットを同時検索するため、エッジ値は予め定められた方式にしたがって隣接した物理的メモリ位置に記憶される請求項17記載のメモリ。
- エッジの隣接した配置は、パリティチェックマトリックスのある部分を三角であるように制限を与える請求項18記載のメモリ。
- LDPCコード化された信号は、8−PSK(位相シフトキーイング)、16−QAM(直交振幅変調)、16−APSK(振幅位相シフトキーイング)、32−APSKおよびQPSK(直交位相シフトキーイング)の1つを含む信号コンステレーションにしたがって変調される請求項17記載のメモリ。
Applications Claiming Priority (13)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US39345702P | 2002-07-03 | 2002-07-03 | |
US39876002P | 2002-07-26 | 2002-07-26 | |
US40381202P | 2002-08-15 | 2002-08-15 | |
US42150502P | 2002-10-25 | 2002-10-25 | |
US42199902P | 2002-10-29 | 2002-10-29 | |
US42371002P | 2002-11-04 | 2002-11-04 | |
US44019903P | 2003-01-15 | 2003-01-15 | |
US44764103P | 2003-02-14 | 2003-02-14 | |
US45622003P | 2003-03-20 | 2003-03-20 | |
US46935603P | 2003-05-09 | 2003-05-09 | |
US48211203P | 2003-06-24 | 2003-06-24 | |
US48210703P | 2003-06-24 | 2003-06-24 | |
PCT/US2003/021071 WO2004006441A2 (en) | 2002-07-03 | 2003-07-03 | Method and system for memory management in low density parity check (ldpc) decoders |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2005520467A JP2005520467A (ja) | 2005-07-07 |
JP3917624B2 true JP3917624B2 (ja) | 2007-05-23 |
Family
ID=30119573
Family Applications (3)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2004562622A Expired - Lifetime JP3836859B2 (ja) | 2002-07-03 | 2003-07-03 | 構成されたパリティチェックマトリックスを使用する低密度パリティチェック(ldpc)コードの符号化 |
JP2004562621A Expired - Fee Related JP3917624B2 (ja) | 2002-07-03 | 2003-07-03 | 低密度パリティチェック(ldpc)デコーダにおける経路指定方法およびシステム |
JP2004562643A Pending JP2005520469A (ja) | 2002-07-03 | 2003-07-03 | 低密度パリティチェック(ldpc)コードにより使用される振幅位相シフトコンステレーションのためのビットラベル付け |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2004562622A Expired - Lifetime JP3836859B2 (ja) | 2002-07-03 | 2003-07-03 | 構成されたパリティチェックマトリックスを使用する低密度パリティチェック(ldpc)コードの符号化 |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2004562643A Pending JP2005520469A (ja) | 2002-07-03 | 2003-07-03 | 低密度パリティチェック(ldpc)コードにより使用される振幅位相シフトコンステレーションのためのビットラベル付け |
Country Status (12)
Country | Link |
---|---|
US (5) | US7191378B2 (ja) |
EP (3) | EP1413059B9 (ja) |
JP (3) | JP3836859B2 (ja) |
KR (3) | KR100683600B1 (ja) |
CN (3) | CN100356697C (ja) |
AT (4) | ATE556491T1 (ja) |
AU (3) | AU2003249708A1 (ja) |
CA (3) | CA2456485C (ja) |
DK (1) | DK1518328T3 (ja) |
ES (3) | ES2381012T3 (ja) |
HK (4) | HK1069933A1 (ja) |
WO (3) | WO2004006441A2 (ja) |
Families Citing this family (408)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7587659B2 (en) | 2002-05-31 | 2009-09-08 | Broadcom Corporation | Efficient front end memory arrangement to support parallel bit node and check node processing in LDPC (Low Density Parity Check) decoders |
ES2381012T3 (es) * | 2002-07-03 | 2012-05-22 | Dtvg Licensing, Inc | Procedimiento y sistema para generar códigos de comprobación de paridad de baja densidad (LDPC) |
US7020829B2 (en) * | 2002-07-03 | 2006-03-28 | Hughes Electronics Corporation | Method and system for decoding low density parity check (LDPC) codes |
US7577207B2 (en) * | 2002-07-03 | 2009-08-18 | Dtvg Licensing, Inc. | Bit labeling for amplitude phase shift constellation used with low density parity check (LDPC) codes |
US7266750B1 (en) | 2002-07-10 | 2007-09-04 | Maxtor Corporation | Error recovery strategies for iterative decoders |
US20040019845A1 (en) * | 2002-07-26 | 2004-01-29 | Hughes Electronics | Method and system for generating low density parity check codes |
US7864869B2 (en) * | 2002-07-26 | 2011-01-04 | Dtvg Licensing, Inc. | Satellite communication system utilizing low density parity check codes |
US7395487B2 (en) | 2002-08-15 | 2008-07-01 | Broadcom Corporation | Common circuitry supporting both bit node and check node processing in LDPC (Low Density Parity Check) decoder |
US7409628B2 (en) * | 2002-08-15 | 2008-08-05 | Broadcom Corporation | Efficient design to implement LDPC (Low Density Parity Check) decoder |
KR20050059208A (ko) * | 2002-09-27 | 2005-06-17 | 아이비큐티 디지털 코포레이션 | 디지털 신호의 비트를 인터리빙하는 장치 및 방법, 디지털정보를 방송하는 장치 및 방법, 디지털 신호의 비트를디인터리빙하는 장치 및 방법, 및 디지털 정보를 수신하는장치 및 방법 |
US7216283B2 (en) * | 2003-06-13 | 2007-05-08 | Broadcom Corporation | Iterative metric updating when decoding LDPC (low density parity check) coded signals and LDPC coded modulation signals |
KR100936022B1 (ko) * | 2002-12-21 | 2010-01-11 | 삼성전자주식회사 | 에러 정정을 위한 부가정보 생성 방법 및 그 장치 |
US7159170B2 (en) * | 2003-06-13 | 2007-01-02 | Broadcom Corporation | LDPC (low density parity check) coded modulation symbol decoding |
US7334181B2 (en) * | 2003-09-04 | 2008-02-19 | The Directv Group, Inc. | Method and system for providing short block length low density parity check (LDPC) codes |
US7376883B2 (en) * | 2003-10-27 | 2008-05-20 | The Directv Group, Inc. | Method and system for providing long and short block length low density parity check (LDPC) codes |
KR20050052184A (ko) * | 2003-11-29 | 2005-06-02 | 삼성전자주식회사 | 저밀도 패리티 검사 부호화를 위한 인터리빙 방법 |
JP3875693B2 (ja) * | 2004-03-24 | 2007-01-31 | 株式会社東芝 | Lpc符号を用いた符号化ビットのマッピング方法及び送信装置 |
KR100594818B1 (ko) * | 2004-04-13 | 2006-07-03 | 한국전자통신연구원 | 순차적 복호를 이용한 저밀도 패리티 검사 부호의 복호장치 및 그 방법 |
KR100540663B1 (ko) * | 2004-04-19 | 2006-01-10 | 삼성전자주식회사 | 저밀도 패리티 체크 코딩의 패리티 체크 행렬 변환 방법 |
KR20050118056A (ko) * | 2004-05-12 | 2005-12-15 | 삼성전자주식회사 | 다양한 부호율을 갖는 Block LDPC 부호를 이용한이동 통신 시스템에서의 채널부호화 복호화 방법 및 장치 |
US7814402B2 (en) | 2004-05-14 | 2010-10-12 | The Governors Of The University Of Alberta | Method and apparatus for digit-serial communications for iterative digital processing algorithms |
US7581157B2 (en) | 2004-06-24 | 2009-08-25 | Lg Electronics Inc. | Method and apparatus of encoding and decoding data using low density parity check code in a wireless communication system |
JP4282558B2 (ja) | 2004-06-30 | 2009-06-24 | 株式会社東芝 | 低密度パリティチェック符号復号器及び方法 |
US7346832B2 (en) | 2004-07-21 | 2008-03-18 | Qualcomm Incorporated | LDPC encoding methods and apparatus |
US7143333B2 (en) * | 2004-08-09 | 2006-11-28 | Motorola, Inc. | Method and apparatus for encoding and decoding data |
CN101341659B (zh) * | 2004-08-13 | 2012-12-12 | Dtvg许可公司 | 用于多输入多输出通道的低密度奇偶校验码的码设计与实现的改进 |
EP1790083B1 (en) * | 2004-08-13 | 2011-01-12 | Dtvg Licensing, Inc | Code design and implementation improvements for low density parity check codes for multiple-input multiple-output channels |
US7559010B2 (en) * | 2004-08-18 | 2009-07-07 | Broadcom Corporation | Short length LDPC (Low Density Parity Check) code and modulation adapted for high speed Ethernet applications |
FI121431B (fi) * | 2004-09-13 | 2010-11-15 | Tamfelt Pmc Oy | Paperikoneessa käytettävä kudosrakenne ja menetelmä sen valmistamiseksi |
US7401283B2 (en) * | 2004-09-28 | 2008-07-15 | Broadcom Corporation | Amplifying magnitude metric of received signals during iterative decoding of LDPC (Low Density Parity Check) code and LDPC coded modulation |
JP2008515342A (ja) * | 2004-10-01 | 2008-05-08 | トムソン ライセンシング | 低密度パリティ検査(ldpc)復号器 |
JP4551740B2 (ja) * | 2004-11-08 | 2010-09-29 | 株式会社東芝 | 低密度パリティチェック符号復号器及び方法 |
CN100385796C (zh) * | 2004-11-25 | 2008-04-30 | 上海交通大学 | 低密度校验码的信道编码方法 |
KR100641052B1 (ko) * | 2004-12-08 | 2006-11-02 | 한국전자통신연구원 | Ldpc 부호기 및 복호기, 및 ldpc 부호화 방법 및복호화 방법 |
EP1820275A4 (en) * | 2004-12-08 | 2009-11-25 | Korea Electronics Telecomm | LDPC CODERS AND DECODERS AND METHOD FOR LDPC CODING AND DECODING |
KR100846869B1 (ko) | 2004-12-16 | 2008-07-16 | 한국전자통신연구원 | 저 복잡도 ldpc복호 장치 및 그 방법 |
US7756217B2 (en) * | 2004-12-21 | 2010-07-13 | Broadcom Corporation | Method and system for a robust initialization symbol for digital duplexing |
CN100583651C (zh) | 2004-12-22 | 2010-01-20 | Lg电子株式会社 | 用于使用信道代码解码的装置和方法 |
JP2008529448A (ja) * | 2005-02-03 | 2008-07-31 | エージェンシー フォー サイエンス,テクノロジー アンド リサーチ | データの送信方法、データの受信方法、送信機、受信機、並びにコンピュータプログラム製品 |
JP4177824B2 (ja) * | 2005-03-16 | 2008-11-05 | 株式会社東芝 | 符号化方法、復号化方法および符号化システム |
CA2602067A1 (en) * | 2005-03-31 | 2006-10-12 | Mitsubishi Denki Kabushiki Kaisha | Error correction coding apparatus |
JP4622654B2 (ja) * | 2005-04-25 | 2011-02-02 | ソニー株式会社 | 復号装置および復号方法 |
CN100414841C (zh) * | 2005-05-11 | 2008-08-27 | 电子科技大学 | 一种ldpc编码的实现方法 |
JP4065283B2 (ja) * | 2005-07-06 | 2008-03-19 | 松下電器産業株式会社 | 送信方法 |
KR100946884B1 (ko) * | 2005-07-15 | 2010-03-09 | 삼성전자주식회사 | 저밀도 패리티 검사 부호를 사용하는 통신 시스템에서 채널인터리빙/디인터리빙 장치 및 그 제어 방법 |
US7523375B2 (en) * | 2005-09-21 | 2009-04-21 | Distribution Control Systems | Set of irregular LDPC codes with random structure and low encoding complexity |
US7757149B2 (en) * | 2005-10-12 | 2010-07-13 | Weizhuang Xin | Broadcast message passing decoding of low density parity check codes |
US7581162B2 (en) * | 2005-10-14 | 2009-08-25 | Hughes Network Systems, Llc | System, method and computer program product for implementing rate ¾ low density parity check code |
US8122315B2 (en) * | 2005-12-01 | 2012-02-21 | Electronics And Telecommunications Research Institute | LDPC decoding apparatus and method using type-classified index |
US8271850B2 (en) * | 2005-12-29 | 2012-09-18 | Intel Corporation | Fast low-density parity-check code encoder |
KR100929080B1 (ko) * | 2006-02-20 | 2009-11-30 | 삼성전자주식회사 | 통신 시스템에서 신호 송수신 장치 및 방법 |
EP1841073A1 (en) * | 2006-03-29 | 2007-10-03 | STMicroelectronics N.V. | Fast convergence LDPC decoding using BCJR algorithm at the check nodes |
KR100987692B1 (ko) | 2006-05-20 | 2010-10-13 | 포항공과대학교 산학협력단 | 통신 시스템에서 신호 송수신 장치 및 방법 |
US7802163B2 (en) * | 2006-07-31 | 2010-09-21 | Agere Systems Inc. | Systems and methods for code based error reduction |
US7779331B2 (en) | 2006-07-31 | 2010-08-17 | Agere Systems Inc. | Systems and methods for tri-column code based error reduction |
US7801200B2 (en) * | 2006-07-31 | 2010-09-21 | Agere Systems Inc. | Systems and methods for code dependency reduction |
US7831884B2 (en) * | 2006-08-11 | 2010-11-09 | Aclara Power-Line Systems Inc. | Method of correcting message errors using cyclic redundancy checks |
WO2008023790A1 (fr) * | 2006-08-25 | 2008-02-28 | Panasonic Corporation | Dispositif de communication sans fil et procédé de codage à détection d'erreur |
US20110173509A1 (en) * | 2006-09-18 | 2011-07-14 | Availink, Inc. | Bit mapping scheme for an ldpc coded 16apsk system |
WO2008034289A1 (en) * | 2006-09-18 | 2008-03-27 | Juntan Zhang | Bit mapping scheme for an ldpc coded 32apsk system |
US8028219B2 (en) * | 2006-09-18 | 2011-09-27 | Availink, Inc. | Interleaving scheme for an LDPC coded 16APSK system |
US8230299B2 (en) | 2006-09-18 | 2012-07-24 | Availink, Inc. | Interleaving scheme for an LDPC coded QPSK/8PSK system |
CN101150550B (zh) * | 2006-09-18 | 2012-02-01 | 国家广播电影电视总局广播科学研究院 | 交织低密度奇偶校验编码比特的方法、发射器和接收器 |
US8504890B2 (en) * | 2006-12-17 | 2013-08-06 | Ramot At Tel Aviv University Ltd. | Scheduling for LDPC decoding |
US8583981B2 (en) * | 2006-12-29 | 2013-11-12 | Marvell World Trade Ltd. | Concatenated codes for holographic storage |
US7971125B2 (en) * | 2007-01-08 | 2011-06-28 | Agere Systems Inc. | Systems and methods for prioritizing error correction data |
WO2008096550A1 (ja) * | 2007-02-09 | 2008-08-14 | Panasonic Corporation | 無線通信装置およびレピティション方法 |
US8619974B2 (en) * | 2007-03-27 | 2013-12-31 | Hughes Network Systems, Llc | Method and system for providing spread scrambled coded multiple access (SSCMA) |
US9461765B2 (en) | 2007-03-27 | 2016-10-04 | Hughes Networks Systems, Llc | Method and system for providing scrambled coded multiple access (SCMA) |
US8140946B2 (en) * | 2007-03-27 | 2012-03-20 | Hughes Network Systems, Llc | Method and apparatus for generating low rate turbo codes |
US20100122143A1 (en) | 2007-03-27 | 2010-05-13 | Hughes Network Systems, Llc | Method and system for providing low density parity check (ldpc) coding for scrambled coded multiple access (scma) |
US10630512B2 (en) * | 2007-03-27 | 2020-04-21 | Hughes Network Systems, Llc | Optimal forward error correction for non-orthogonal multiple access (NOMA) communications systems |
US8171383B2 (en) * | 2007-04-13 | 2012-05-01 | Broadcom Corporation | Method and system for data-rate control by randomized bit-puncturing in communication systems |
US8418023B2 (en) | 2007-05-01 | 2013-04-09 | The Texas A&M University System | Low density parity check decoder for irregular LDPC codes |
US8196002B2 (en) * | 2007-06-01 | 2012-06-05 | Agere Systems Inc. | Systems and methods for joint LDPC encoding and decoding |
US7930621B2 (en) * | 2007-06-01 | 2011-04-19 | Agere Systems Inc. | Systems and methods for LDPC decoding with post processing |
ES2712914T3 (es) | 2007-06-05 | 2019-05-16 | Constellation Designs Inc | Método y aparato para la señalización con constelaciones de capacidad optimizada |
US8265175B2 (en) | 2007-06-05 | 2012-09-11 | Constellation Designs, Inc. | Methods and apparatuses for signaling with geometric constellations |
US9191148B2 (en) | 2007-06-05 | 2015-11-17 | Constellation Designs, Inc. | Methods and apparatuses for signaling with geometric constellations in a Raleigh fading channel |
US20100185914A1 (en) * | 2007-09-28 | 2010-07-22 | Weijun Tan | Systems and Methods for Reduced Complexity Data Processing |
CN101809872B (zh) * | 2007-09-28 | 2013-06-05 | 松下电器产业株式会社 | 编码方法、编码器以及解码器 |
JP4487213B2 (ja) * | 2007-10-19 | 2010-06-23 | ソニー株式会社 | 復号装置および方法、並びにプログラム |
JP4487212B2 (ja) * | 2007-10-19 | 2010-06-23 | ソニー株式会社 | 復号装置および方法、送受信システム、受信装置および方法、並びにプログラム |
KR101411777B1 (ko) | 2007-11-02 | 2014-07-01 | 삼성전자주식회사 | 저밀도 패리티 검사 부호를 사용하는 통신 시스템에서데이터 송수신 장치 및 방법 |
US8219878B1 (en) | 2007-12-03 | 2012-07-10 | Marvell International Ltd. | Post-processing decoder of LDPC codes for improved error floors |
KR100976727B1 (ko) * | 2007-12-11 | 2010-08-19 | 한국전자통신연구원 | 디지털 변조신호의 비트 매핑 장치 및 그 방법 |
US8161348B2 (en) * | 2008-02-05 | 2012-04-17 | Agere Systems Inc. | Systems and methods for low cost LDPC decoding |
WO2009104898A2 (en) * | 2008-02-18 | 2009-08-27 | Samsung Electronics Co., Ltd. | Apparatus and method for encoding and decoding channel in a communication system using low-density parity-check codes |
US20090252146A1 (en) * | 2008-04-03 | 2009-10-08 | Microsoft Corporation | Continuous network coding in wireless relay networks |
CN100589359C (zh) * | 2008-04-23 | 2010-02-10 | 中兴通讯股份有限公司 | 一种里德索罗蒙码的译码方法及装置 |
US8245104B2 (en) | 2008-05-02 | 2012-08-14 | Lsi Corporation | Systems and methods for queue based data detection and decoding |
JP5173021B2 (ja) * | 2008-05-19 | 2013-03-27 | アギア システムズ インコーポレーテッド | データ検出器フィードバックループにおいて遅延を軽減するためのシステム及び方法 |
EP2139119A1 (en) * | 2008-06-25 | 2009-12-30 | Thomson Licensing | Serial concatenation of trellis coded modulation and an inner non-binary LDPC code |
EP2139139A1 (en) * | 2008-06-27 | 2009-12-30 | THOMSON Licensing | Method and apparatus for non binary low density parity check coding |
US8660220B2 (en) * | 2008-09-05 | 2014-02-25 | Lsi Corporation | Reduced frequency data processing using a matched filter set front end |
US8245120B2 (en) * | 2008-09-17 | 2012-08-14 | Lsi Corporation | Power reduced queue based data detection and decoding systems and methods for using such |
TWI469533B (zh) * | 2008-11-07 | 2015-01-11 | Realtek Semiconductor Corp | 同位檢查碼解碼器及接收系統 |
KR20110086504A (ko) * | 2008-11-20 | 2011-07-28 | 엘에스아이 코포레이션 | 노이즈 감소 데이터 프로세싱 회로, 노이즈 감소 데이터 프로세싱 회로를 위한 시스템 및 방법 |
US8935601B1 (en) | 2008-12-03 | 2015-01-13 | Marvell International Ltd. | Post-processing methodologies in decoding LDPC codes |
CN102265520B (zh) * | 2008-12-26 | 2014-05-14 | 松下电器产业株式会社 | 编码方法、编码器以及解码器 |
US8225166B2 (en) * | 2009-02-09 | 2012-07-17 | Mediatek Inc. | Signal processing apparatus for setting error indication information according error detection result of outer-code decoder output and related method thereof |
US8458114B2 (en) * | 2009-03-02 | 2013-06-04 | Analog Devices, Inc. | Analog computation using numerical representations with uncertainty |
TW201037529A (en) | 2009-03-02 | 2010-10-16 | David Reynolds | Belief propagation processor |
US8411737B2 (en) * | 2009-03-05 | 2013-04-02 | Nokia Corporation | Transmission of physical layer signaling in a broadcast system |
US8504891B2 (en) * | 2009-03-27 | 2013-08-06 | University Of Connecticut | Apparatus, systems and methods including nonbinary low density parity check coding for enhanced multicarrier underwater acoustic communications |
US7990642B2 (en) * | 2009-04-17 | 2011-08-02 | Lsi Corporation | Systems and methods for storage channel testing |
US8443267B2 (en) * | 2009-04-28 | 2013-05-14 | Lsi Corporation | Systems and methods for hard decision assisted decoding |
KR20120012960A (ko) | 2009-04-28 | 2012-02-13 | 엘에스아이 코포레이션 | 판독된 데이터 처리 시스템의 동적 스케일링을 위한 시스템 및 방법 |
US9252813B2 (en) | 2009-05-27 | 2016-02-02 | Novelsat Ltd. | Iterative decoding of LDPC codes with iteration scheduling |
US8250434B2 (en) * | 2009-06-18 | 2012-08-21 | Lsi Corporation | Systems and methods for codec usage control during storage pre-read |
US8352841B2 (en) | 2009-06-24 | 2013-01-08 | Lsi Corporation | Systems and methods for out of order Y-sample memory management |
US8458553B2 (en) | 2009-07-28 | 2013-06-04 | Lsi Corporation | Systems and methods for utilizing circulant parity in a data processing system |
US8312343B2 (en) * | 2009-07-28 | 2012-11-13 | Lsi Corporation | Systems and methods for re-using decoding parity in a detector circuit |
US8321746B2 (en) | 2009-07-30 | 2012-11-27 | Lsi Corporation | Systems and methods for quasi-cyclic LDPC code production and decoding |
US8250431B2 (en) * | 2009-07-30 | 2012-08-21 | Lsi Corporation | Systems and methods for phase dependent data detection in iterative decoding |
US8266505B2 (en) | 2009-08-12 | 2012-09-11 | Lsi Corporation | Systems and methods for retimed virtual data processing |
US8176404B2 (en) * | 2009-09-09 | 2012-05-08 | Lsi Corporation | Systems and methods for stepped data retry in a storage system |
KR101644656B1 (ko) * | 2009-11-02 | 2016-08-10 | 삼성전자주식회사 | 선형 블록 부호를 사용하는 통신 시스템에서 패리티 검사 행렬을 생성하는 방법과 이를 이용한 채널 부호화/복호화 장치 및 방법 |
US8688873B2 (en) | 2009-12-31 | 2014-04-01 | Lsi Corporation | Systems and methods for monitoring out of order data decoding |
US8578253B2 (en) | 2010-01-04 | 2013-11-05 | Lsi Corporation | Systems and methods for updating detector parameters in a data processing circuit |
US8683306B2 (en) * | 2010-01-04 | 2014-03-25 | Lsi Corporation | Systems and methods for data detection including dynamic scaling |
US8743936B2 (en) * | 2010-01-05 | 2014-06-03 | Lsi Corporation | Systems and methods for determining noise components in a signal set |
US8972831B2 (en) | 2010-01-11 | 2015-03-03 | Analog Devices, Inc. | Belief propagation processor |
JP5523120B2 (ja) * | 2010-01-14 | 2014-06-18 | 三菱電機株式会社 | 誤り訂正符号化方法、誤り訂正復号方法、誤り訂正符号化装置、および、誤り訂正復号装置 |
US8402341B2 (en) * | 2010-02-18 | 2013-03-19 | Mustafa Eroz | Method and system for providing low density parity check (LDPC) encoding and decoding |
US8782489B2 (en) | 2010-02-18 | 2014-07-15 | Hughes Network Systems, Llc | Method and system for providing Low Density Parity Check (LDPC) encoding and decoding |
TWI581578B (zh) * | 2010-02-26 | 2017-05-01 | 新力股份有限公司 | 編碼器及提供遞增冗餘之編碼方法 |
US8161351B2 (en) | 2010-03-30 | 2012-04-17 | Lsi Corporation | Systems and methods for efficient data storage |
US9343082B2 (en) | 2010-03-30 | 2016-05-17 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Systems and methods for detecting head contact |
CN102214360B (zh) * | 2010-04-06 | 2013-07-17 | 腾讯科技(深圳)有限公司 | 一种位图构建方法及装置、求交的方法及装置 |
US8418019B2 (en) | 2010-04-19 | 2013-04-09 | Lsi Corporation | Systems and methods for dynamic scaling in a data decoding system |
US8527831B2 (en) | 2010-04-26 | 2013-09-03 | Lsi Corporation | Systems and methods for low density parity check data decoding |
US8443249B2 (en) | 2010-04-26 | 2013-05-14 | Lsi Corporation | Systems and methods for low density parity check data encoding |
US9288089B2 (en) | 2010-04-30 | 2016-03-15 | Ecole Polytechnique Federale De Lausanne (Epfl) | Orthogonal differential vector signaling |
US8593305B1 (en) | 2011-07-05 | 2013-11-26 | Kandou Labs, S.A. | Efficient processing and detection of balanced codes |
US9106238B1 (en) | 2010-12-30 | 2015-08-11 | Kandou Labs, S.A. | Sorting decoder |
US9077386B1 (en) | 2010-05-20 | 2015-07-07 | Kandou Labs, S.A. | Methods and systems for selection of unions of vector signaling codes for power and pin efficient chip-to-chip communication |
US9596109B2 (en) | 2010-05-20 | 2017-03-14 | Kandou Labs, S.A. | Methods and systems for high bandwidth communications interface |
US9251873B1 (en) | 2010-05-20 | 2016-02-02 | Kandou Labs, S.A. | Methods and systems for pin-efficient memory controller interface using vector signaling codes for chip-to-chip communications |
US9362962B2 (en) | 2010-05-20 | 2016-06-07 | Kandou Labs, S.A. | Methods and systems for energy-efficient communications interface |
US9300503B1 (en) | 2010-05-20 | 2016-03-29 | Kandou Labs, S.A. | Methods and systems for skew tolerance in and advanced detectors for vector signaling codes for chip-to-chip communication |
US9401828B2 (en) * | 2010-05-20 | 2016-07-26 | Kandou Labs, S.A. | Methods and systems for low-power and pin-efficient communications with superposition signaling codes |
US9985634B2 (en) | 2010-05-20 | 2018-05-29 | Kandou Labs, S.A. | Data-driven voltage regulator |
US9246713B2 (en) | 2010-05-20 | 2016-01-26 | Kandou Labs, S.A. | Vector signaling with reduced receiver complexity |
US9288082B1 (en) | 2010-05-20 | 2016-03-15 | Kandou Labs, S.A. | Circuits for efficient detection of vector signaling codes for chip-to-chip communication using sums of differences |
US9479369B1 (en) | 2010-05-20 | 2016-10-25 | Kandou Labs, S.A. | Vector signaling codes with high pin-efficiency for chip-to-chip communication and storage |
US9450744B2 (en) | 2010-05-20 | 2016-09-20 | Kandou Lab, S.A. | Control loop management and vector signaling code communications links |
US9564994B2 (en) | 2010-05-20 | 2017-02-07 | Kandou Labs, S.A. | Fault tolerant chip-to-chip communication with advanced voltage |
US8381071B1 (en) | 2010-05-21 | 2013-02-19 | Lsi Corporation | Systems and methods for decoder sharing between data sets |
US8381074B1 (en) | 2010-05-21 | 2013-02-19 | Lsi Corporation | Systems and methods for utilizing a centralized queue based data processing circuit |
US8208213B2 (en) | 2010-06-02 | 2012-06-26 | Lsi Corporation | Systems and methods for hybrid algorithm gain adaptation |
US9667379B2 (en) | 2010-06-04 | 2017-05-30 | Ecole Polytechnique Federale De Lausanne (Epfl) | Error control coding for orthogonal differential vector signaling |
WO2011156750A2 (en) * | 2010-06-10 | 2011-12-15 | The Regents Of The University Of California | Efficient two and multiple write wom-codes, coding methods and devices |
US8804260B2 (en) | 2010-09-13 | 2014-08-12 | Lsi Corporation | Systems and methods for inter-track interference compensation |
US8295001B2 (en) | 2010-09-21 | 2012-10-23 | Lsi Corporation | Systems and methods for low latency noise cancellation |
US9219469B2 (en) | 2010-09-21 | 2015-12-22 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Systems and methods for filter constraint estimation |
US8385014B2 (en) | 2010-10-11 | 2013-02-26 | Lsi Corporation | Systems and methods for identifying potential media failure |
US8560930B2 (en) | 2010-10-11 | 2013-10-15 | Lsi Corporation | Systems and methods for multi-level quasi-cyclic low density parity check codes |
US8661071B2 (en) | 2010-10-11 | 2014-02-25 | Lsi Corporation | Systems and methods for partially conditioned noise predictive equalization |
US8443250B2 (en) | 2010-10-11 | 2013-05-14 | Lsi Corporation | Systems and methods for error correction using irregular low density parity check codes |
US8750447B2 (en) | 2010-11-02 | 2014-06-10 | Lsi Corporation | Systems and methods for variable thresholding in a pattern detector |
US8566379B2 (en) | 2010-11-17 | 2013-10-22 | Lsi Corporation | Systems and methods for self tuning target adaptation |
US8667039B2 (en) | 2010-11-17 | 2014-03-04 | Lsi Corporation | Systems and methods for variance dependent normalization for branch metric calculation |
US9275720B2 (en) | 2010-12-30 | 2016-03-01 | Kandou Labs, S.A. | Differential vector storage for dynamic random access memory |
US8810940B2 (en) | 2011-02-07 | 2014-08-19 | Lsi Corporation | Systems and methods for off track error recovery |
US8699167B2 (en) | 2011-02-16 | 2014-04-15 | Lsi Corporation | Systems and methods for data detection using distance based tuning |
US8446683B2 (en) | 2011-02-22 | 2013-05-21 | Lsi Corporation | Systems and methods for data pre-coding calibration |
US8693120B2 (en) | 2011-03-17 | 2014-04-08 | Lsi Corporation | Systems and methods for sample averaging in data processing |
US8854753B2 (en) | 2011-03-17 | 2014-10-07 | Lsi Corporation | Systems and methods for auto scaling in a data processing system |
US8839069B2 (en) | 2011-04-08 | 2014-09-16 | Micron Technology, Inc. | Encoding and decoding techniques using low-density parity check codes |
US8611033B2 (en) | 2011-04-15 | 2013-12-17 | Lsi Corporation | Systems and methods for selective decoder input data processing |
US8670955B2 (en) | 2011-04-15 | 2014-03-11 | Lsi Corporation | Systems and methods for reliability assisted noise predictive filtering |
US8887034B2 (en) | 2011-04-15 | 2014-11-11 | Lsi Corporation | Systems and methods for short media defect detection |
JP5637393B2 (ja) * | 2011-04-28 | 2014-12-10 | ソニー株式会社 | データ処理装置、及び、データ処理方法 |
US8499231B2 (en) | 2011-06-24 | 2013-07-30 | Lsi Corporation | Systems and methods for reduced format non-binary decoding |
US8560929B2 (en) | 2011-06-24 | 2013-10-15 | Lsi Corporation | Systems and methods for non-binary decoding |
US8566665B2 (en) | 2011-06-24 | 2013-10-22 | Lsi Corporation | Systems and methods for error correction using low density parity check codes using multiple layer check equations |
US8862972B2 (en) | 2011-06-29 | 2014-10-14 | Lsi Corporation | Low latency multi-detector noise cancellation |
US8595576B2 (en) | 2011-06-30 | 2013-11-26 | Lsi Corporation | Systems and methods for evaluating and debugging LDPC iterative decoders |
US8650451B2 (en) | 2011-06-30 | 2014-02-11 | Lsi Corporation | Stochastic stream decoding of binary LDPC codes |
US8566666B2 (en) | 2011-07-11 | 2013-10-22 | Lsi Corporation | Min-sum based non-binary LDPC decoder |
US8879182B2 (en) | 2011-07-19 | 2014-11-04 | Lsi Corporation | Storage media inter-track interference cancellation |
US8830613B2 (en) | 2011-07-19 | 2014-09-09 | Lsi Corporation | Storage media inter-track interference cancellation |
US8819527B2 (en) | 2011-07-19 | 2014-08-26 | Lsi Corporation | Systems and methods for mitigating stubborn errors in a data processing system |
US8539328B2 (en) | 2011-08-19 | 2013-09-17 | Lsi Corporation | Systems and methods for noise injection driven parameter selection |
US8854754B2 (en) | 2011-08-19 | 2014-10-07 | Lsi Corporation | Systems and methods for local iteration adjustment |
JP5509165B2 (ja) * | 2011-08-24 | 2014-06-04 | 株式会社東芝 | 誤り訂正符号化装置、誤り訂正復号装置、不揮発性半導体記憶システム及びパリティ検査行列生成方法 |
US9026572B2 (en) | 2011-08-29 | 2015-05-05 | Lsi Corporation | Systems and methods for anti-causal noise predictive filtering in a data channel |
US8656249B2 (en) | 2011-09-07 | 2014-02-18 | Lsi Corporation | Multi-level LDPC layer decoder |
US8756478B2 (en) | 2011-09-07 | 2014-06-17 | Lsi Corporation | Multi-level LDPC layer decoder |
US8661324B2 (en) | 2011-09-08 | 2014-02-25 | Lsi Corporation | Systems and methods for non-binary decoding biasing control |
US8681441B2 (en) | 2011-09-08 | 2014-03-25 | Lsi Corporation | Systems and methods for generating predictable degradation bias |
US8767333B2 (en) | 2011-09-22 | 2014-07-01 | Lsi Corporation | Systems and methods for pattern dependent target adaptation |
US8850276B2 (en) | 2011-09-22 | 2014-09-30 | Lsi Corporation | Systems and methods for efficient data shuffling in a data processing system |
US8689062B2 (en) | 2011-10-03 | 2014-04-01 | Lsi Corporation | Systems and methods for parameter selection using reliability information |
US8479086B2 (en) | 2011-10-03 | 2013-07-02 | Lsi Corporation | Systems and methods for efficient parameter modification |
US8578241B2 (en) | 2011-10-10 | 2013-11-05 | Lsi Corporation | Systems and methods for parity sharing data processing |
US8862960B2 (en) | 2011-10-10 | 2014-10-14 | Lsi Corporation | Systems and methods for parity shared data encoding |
US8996597B2 (en) | 2011-10-12 | 2015-03-31 | Lsi Corporation | Nyquist constrained digital finite impulse response filter |
US8707144B2 (en) | 2011-10-17 | 2014-04-22 | Lsi Corporation | LDPC decoder with targeted symbol flipping |
US8788921B2 (en) | 2011-10-27 | 2014-07-22 | Lsi Corporation | Detector with soft pruning |
US8527858B2 (en) | 2011-10-28 | 2013-09-03 | Lsi Corporation | Systems and methods for selective decode algorithm modification |
US8604960B2 (en) | 2011-10-28 | 2013-12-10 | Lsi Corporation | Oversampled data processing circuit with multiple detectors |
US8443271B1 (en) | 2011-10-28 | 2013-05-14 | Lsi Corporation | Systems and methods for dual process data decoding |
US8683309B2 (en) | 2011-10-28 | 2014-03-25 | Lsi Corporation | Systems and methods for ambiguity based decode algorithm modification |
US8531320B2 (en) | 2011-11-14 | 2013-09-10 | Lsi Corporation | Systems and methods for memory efficient data decoding |
US8751913B2 (en) | 2011-11-14 | 2014-06-10 | Lsi Corporation | Systems and methods for reduced power multi-layer data decoding |
US8700981B2 (en) | 2011-11-14 | 2014-04-15 | Lsi Corporation | Low latency enumeration endec |
US8760991B2 (en) | 2011-11-14 | 2014-06-24 | Lsi Corporation | Systems and methods for post processing gain correction |
US8719686B2 (en) | 2011-11-22 | 2014-05-06 | Lsi Corporation | Probability-based multi-level LDPC decoder |
US8631300B2 (en) | 2011-12-12 | 2014-01-14 | Lsi Corporation | Systems and methods for scalable data processing shut down |
US8674758B2 (en) * | 2011-12-15 | 2014-03-18 | Hughes Network Systems, Llc | Method and apparatus for improved high order modulation |
US8625221B2 (en) | 2011-12-15 | 2014-01-07 | Lsi Corporation | Detector pruning control system |
US8707123B2 (en) | 2011-12-30 | 2014-04-22 | Lsi Corporation | Variable barrel shifter |
US8819515B2 (en) | 2011-12-30 | 2014-08-26 | Lsi Corporation | Mixed domain FFT-based non-binary LDPC decoder |
US8751889B2 (en) | 2012-01-31 | 2014-06-10 | Lsi Corporation | Systems and methods for multi-pass alternate decoding |
US8850295B2 (en) | 2012-02-01 | 2014-09-30 | Lsi Corporation | Symbol flipping data processor |
US8775896B2 (en) | 2012-02-09 | 2014-07-08 | Lsi Corporation | Non-binary LDPC decoder with low latency scheduling |
US8749907B2 (en) | 2012-02-14 | 2014-06-10 | Lsi Corporation | Systems and methods for adaptive decoder message scaling |
US8782486B2 (en) | 2012-03-05 | 2014-07-15 | Lsi Corporation | Systems and methods for multi-matrix data processing |
US8610608B2 (en) | 2012-03-08 | 2013-12-17 | Lsi Corporation | Systems and methods for reduced latency loop correction |
US8731115B2 (en) | 2012-03-08 | 2014-05-20 | Lsi Corporation | Systems and methods for data processing including pre-equalizer noise suppression |
US8873182B2 (en) | 2012-03-09 | 2014-10-28 | Lsi Corporation | Multi-path data processing system |
US8977937B2 (en) | 2012-03-16 | 2015-03-10 | Lsi Corporation | Systems and methods for compression driven variable rate decoding in a data processing system |
US9230596B2 (en) | 2012-03-22 | 2016-01-05 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Systems and methods for variable rate coding in a data processing system |
US9043684B2 (en) | 2012-03-22 | 2015-05-26 | Lsi Corporation | Systems and methods for variable redundancy data protection |
US8670481B2 (en) * | 2012-04-12 | 2014-03-11 | Casa Systems, Inc. | System and method for dynamic profile management in cable modem systems |
US9268683B1 (en) | 2012-05-14 | 2016-02-23 | Kandou Labs, S.A. | Storage method and apparatus for random access memory using codeword storage |
US8612826B2 (en) | 2012-05-17 | 2013-12-17 | Lsi Corporation | Systems and methods for non-binary LDPC encoding |
US10318158B2 (en) | 2012-05-17 | 2019-06-11 | Brilliant Points, Inc. | System and method for digital signaling and digital storage |
WO2014100235A1 (en) * | 2012-12-18 | 2014-06-26 | Brilliant Points, Inc. | System and method for digital signaling and digital storage |
US8880986B2 (en) | 2012-05-30 | 2014-11-04 | Lsi Corporation | Systems and methods for improved data detection processing |
GB2499270B (en) * | 2012-06-07 | 2014-07-09 | Imagination Tech Ltd | Efficient demapping of constellations |
US9019647B2 (en) | 2012-08-28 | 2015-04-28 | Lsi Corporation | Systems and methods for conditional positive feedback data decoding |
US8972834B2 (en) | 2012-08-28 | 2015-03-03 | Hughes Network Systems, Llc | System and method for communicating with low density parity check codes |
US9324372B2 (en) | 2012-08-28 | 2016-04-26 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Systems and methods for local iteration randomization in a data decoder |
US8930780B2 (en) | 2012-08-28 | 2015-01-06 | Lsi Corporation | Systems and methods for non-zero syndrome based processing |
US8751915B2 (en) | 2012-08-28 | 2014-06-10 | Lsi Corporation | Systems and methods for selectable positive feedback data processing |
US9264182B2 (en) | 2012-09-13 | 2016-02-16 | Novelsat Ltd. | Iterative receiver loop |
US8949702B2 (en) | 2012-09-14 | 2015-02-03 | Lsi Corporation | Systems and methods for detector side trapping set mitigation |
US9112531B2 (en) | 2012-10-15 | 2015-08-18 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Systems and methods for enhanced local iteration randomization in a data decoder |
US8634152B1 (en) | 2012-10-15 | 2014-01-21 | Lsi Corporation | Systems and methods for throughput enhanced data detection in a data processing circuit |
US9048870B2 (en) | 2012-11-19 | 2015-06-02 | Lsi Corporation | Low density parity check decoder with flexible saturation |
US8929009B2 (en) | 2012-12-19 | 2015-01-06 | Lsi Corporation | Irregular low density parity check decoder with low syndrome error handling |
US9130589B2 (en) | 2012-12-19 | 2015-09-08 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Low density parity check decoder with dynamic scaling |
US8773791B1 (en) | 2013-01-14 | 2014-07-08 | Lsi Corporation | Systems and methods for X-sample based noise cancellation |
US9003263B2 (en) | 2013-01-15 | 2015-04-07 | Lsi Corporation | Encoder and decoder generation by state-splitting of directed graph |
WO2014113727A1 (en) | 2013-01-17 | 2014-07-24 | Kandou Labs, S.A. | Methods and systems for chip-to-chip communication with reduced simultaneous switching noise |
US9009557B2 (en) | 2013-01-21 | 2015-04-14 | Lsi Corporation | Systems and methods for reusing a layered decoder to yield a non-layered result |
CN103970619B (zh) * | 2013-02-06 | 2017-09-29 | 东芝存储器株式会社 | 控制器 |
US9294131B2 (en) | 2013-02-10 | 2016-03-22 | Hughes Network Systems, Llc | Apparatus and method for improved modulation and coding schemes for broadband satellite communications systems |
US9246634B2 (en) | 2013-02-10 | 2016-01-26 | Hughes Network Systems, Llc | Apparatus and method for improved modulation and coding schemes for broadband satellite communications systems |
US8887024B2 (en) | 2013-02-10 | 2014-11-11 | Hughes Network Systems, Llc | Apparatus and method for improved modulation and coding schemes for broadband satellite communications systems |
CN105122758B (zh) | 2013-02-11 | 2018-07-10 | 康杜实验室公司 | 高带宽芯片间通信接口方法和*** |
US8885276B2 (en) | 2013-02-14 | 2014-11-11 | Lsi Corporation | Systems and methods for shared layer data decoding |
US8930792B2 (en) | 2013-02-14 | 2015-01-06 | Lsi Corporation | Systems and methods for distributed low density parity check decoding |
US9214959B2 (en) | 2013-02-19 | 2015-12-15 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Systems and methods for skip layer data decoding |
US8797668B1 (en) | 2013-03-13 | 2014-08-05 | Lsi Corporation | Systems and methods for penalty based multi-variant encoding |
US9048873B2 (en) | 2013-03-13 | 2015-06-02 | Lsi Corporation | Systems and methods for multi-stage encoding of concatenated low density parity check codes |
WO2014145217A1 (en) * | 2013-03-15 | 2014-09-18 | Hughes Network Systems, Llc | Low density parity check (ldpc) encoding and decoding for small terminal applications |
US9048874B2 (en) | 2013-03-15 | 2015-06-02 | Lsi Corporation | Min-sum based hybrid non-binary low density parity check decoder |
US9281843B2 (en) | 2013-03-22 | 2016-03-08 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Systems and methods for reduced constraint code data processing |
CN110086736B (zh) * | 2013-04-12 | 2022-09-23 | 太阳专利托管公司 | 发送装置、发送方法、接收装置、接收方法 |
CN110166217B (zh) | 2013-04-16 | 2022-05-17 | 康杜实验室公司 | 高带宽通信接口方法和*** |
BR112015027153B1 (pt) * | 2013-05-02 | 2021-12-14 | Sony Corp | Dispositivo e método de processamento de dados |
US9048867B2 (en) | 2013-05-21 | 2015-06-02 | Lsi Corporation | Shift register-based layered low density parity check decoder |
US9274889B2 (en) | 2013-05-29 | 2016-03-01 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Systems and methods for data processing using global iteration result reuse |
US8959414B2 (en) | 2013-06-13 | 2015-02-17 | Lsi Corporation | Systems and methods for hybrid layer data decoding |
KR102104937B1 (ko) | 2013-06-14 | 2020-04-27 | 삼성전자주식회사 | Ldpc 부호의 부호화 장치, 그의 부호화 방법, 복호화 장치 및 그의 복호화 방법 |
CN105393512B (zh) | 2013-06-25 | 2019-06-28 | 康杜实验室公司 | 具有低接收器复杂度的向量信令 |
KR20150005853A (ko) | 2013-07-05 | 2015-01-15 | 삼성전자주식회사 | 송신 장치 및 그의 신호 처리 방법 |
KR102002559B1 (ko) * | 2013-07-05 | 2019-07-22 | 삼성전자주식회사 | 송신 장치 및 그의 신호 처리 방법 |
CN103581097B (zh) * | 2013-07-15 | 2016-12-28 | 上海数字电视国家工程研究中心有限公司 | 数字信号发射*** |
US8917466B1 (en) | 2013-07-17 | 2014-12-23 | Lsi Corporation | Systems and methods for governing in-flight data sets in a data processing system |
US8817404B1 (en) | 2013-07-18 | 2014-08-26 | Lsi Corporation | Systems and methods for data processing control |
CN105453548B (zh) | 2013-08-01 | 2019-04-16 | Lg 电子株式会社 | 发送广播信号的设备、接收广播信号的设备、发送广播信号的方法以及接收广播信号的方法 |
WO2015016671A1 (en) * | 2013-08-01 | 2015-02-05 | Lg Electronics Inc. | Apparatus for transmitting broadcast signals, apparatus for receiving broadcast signals, method for transmitting broadcast signals and method for receiving broadcast signals |
KR101730371B1 (ko) | 2013-08-01 | 2017-04-26 | 엘지전자 주식회사 | 방송 신호 송신 장치, 방송 신호 수신 장치, 방송 신호 송신 방법 및 방송 신호 수신 방법 |
CN105453506B (zh) * | 2013-08-01 | 2019-05-28 | Lg 电子株式会社 | 发送广播信号的设备、方法及接收广播信号的设备、方法 |
WO2015016672A1 (en) * | 2013-08-01 | 2015-02-05 | Lg Electronics Inc. | Apparatus for transmitting broadcast signals, apparatus for receiving broadcast signals, method for transmitting broadcast signals and method for receiving broadcast signals |
US9196299B2 (en) | 2013-08-23 | 2015-11-24 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Systems and methods for enhanced data encoding and decoding |
US8908307B1 (en) | 2013-08-23 | 2014-12-09 | Lsi Corporation | Systems and methods for hard disk drive region based data encoding |
US9129651B2 (en) | 2013-08-30 | 2015-09-08 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Array-reader based magnetic recording systems with quadrature amplitude modulation |
US9047882B2 (en) | 2013-08-30 | 2015-06-02 | Lsi Corporation | Systems and methods for multi-level encoding and decoding |
US20160197703A1 (en) * | 2013-09-10 | 2016-07-07 | Electronics And Telecommunications Research Institute | Ldpc-rs two-dimensional code for ground wave cloud broadcasting |
US9400797B2 (en) | 2013-09-17 | 2016-07-26 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Systems and methods for recovered data stitching |
KR102264832B1 (ko) | 2013-09-26 | 2021-06-14 | 삼성전자주식회사 | 송신 장치 및 그의 신호 처리 방법 |
CN104518801A (zh) | 2013-09-29 | 2015-04-15 | Lsi公司 | 非二进制的分层低密度奇偶校验解码器 |
US9479285B2 (en) * | 2013-10-14 | 2016-10-25 | Nec Corporation | Non-binary LDPC coded mode-multiplexed four-dimensional signaling based on orthogonal frequency division multiplexing |
US9219503B2 (en) | 2013-10-16 | 2015-12-22 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Systems and methods for multi-algorithm concatenation encoding and decoding |
US9323606B2 (en) | 2013-11-21 | 2016-04-26 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Systems and methods for FAID follower decoding |
US9106465B2 (en) | 2013-11-22 | 2015-08-11 | Kandou Labs, S.A. | Multiwire linear equalizer for vector signaling code receiver |
US9130599B2 (en) | 2013-12-24 | 2015-09-08 | Avago Technologies General Ip (Singapore) Pte. Ltd. | Systems and methods of converting detector output to multi-level soft information |
TWI528732B (zh) | 2013-12-30 | 2016-04-01 | 衡宇科技股份有限公司 | 具有ldpc碼及bch碼之解碼器及其解碼方法 |
US9577678B2 (en) | 2014-01-29 | 2017-02-21 | Electronics And Telecommunications Research Institute | Bit interleaver for low-density parity check codeword having length of 64800 and code rate of 7/15 and quadrature phase shift keying, and bit interleaving method using same |
US9806761B1 (en) | 2014-01-31 | 2017-10-31 | Kandou Labs, S.A. | Methods and systems for reduction of nearest-neighbor crosstalk |
EP4236217A3 (en) | 2014-02-02 | 2023-09-13 | Kandou Labs SA | Method and apparatus for low power chip-to-chip communications with constrained isi ratio |
US9369312B1 (en) | 2014-02-02 | 2016-06-14 | Kandou Labs, S.A. | Low EMI signaling for parallel conductor interfaces |
RU2014104571A (ru) | 2014-02-10 | 2015-08-20 | ЭлЭсАй Корпорейшн | Системы и способы для эффективного с точки зрения площади кодирования данных |
US10425110B2 (en) | 2014-02-19 | 2019-09-24 | Samsung Electronics Co., Ltd. | Transmitting apparatus and interleaving method thereof |
JP2015156530A (ja) * | 2014-02-19 | 2015-08-27 | ソニー株式会社 | データ処理装置、及び、データ処理方法 |
KR101776275B1 (ko) | 2014-02-19 | 2017-09-07 | 삼성전자주식회사 | 송신 장치 및 그의 인터리빙 방법 |
KR101800409B1 (ko) * | 2014-02-19 | 2017-11-23 | 삼성전자주식회사 | 송신 장치 및 그의 인터리빙 방법 |
US9602137B2 (en) | 2014-02-19 | 2017-03-21 | Samsung Electronics Co., Ltd. | Transmitting apparatus and interleaving method thereof |
US9602135B2 (en) | 2014-02-20 | 2017-03-21 | Electronics And Telecommunications Research Institute | Bit interleaver for low-density parity check codeword having length of 64800 and code rate of 5/15 and 64-symbol mapping, and bit interleaving method using same |
CN104868970B (zh) * | 2014-02-20 | 2019-11-26 | 上海数字电视国家工程研究中心有限公司 | Ldpc码字的交织映射方法及解交织解映射方法 |
US9602131B2 (en) | 2014-02-20 | 2017-03-21 | Electronics And Telecommunications Research Institute | Bit interleaver for low-density parity check codeword having length of 64800 and code rate of 3/15 and 16-symbol mapping, and bit interleaving method using same |
CN106105123B (zh) | 2014-02-28 | 2019-06-28 | 康杜实验室公司 | 用于发送时钟嵌入式向量信令码的方法和*** |
US9602136B2 (en) | 2014-03-06 | 2017-03-21 | Electronics And Telecommunications Research Institute | Bit interleaver for low-density parity check codeword having length of 64800 and code rate of 4/15 and 256-symbol mapping, and bit interleaving method using same |
US10419023B2 (en) | 2014-03-20 | 2019-09-17 | Electronics And Telecommunications Research Institute | Bit interleaver for low-density parity check codeword having length of 64800 and code rate of 3/15 and 1024-symbol mapping, and bit interleaving method using same |
KR102287624B1 (ko) | 2014-03-20 | 2021-08-10 | 한국전자통신연구원 | 길이가 64800이며, 부호율이 3/15인 ldpc 부호어 및 1024-심볼 맵핑을 위한 비트 인터리버 및 이를 이용한 비트 인터리빙 방법 |
KR102212163B1 (ko) * | 2014-03-27 | 2021-02-04 | 삼성전자주식회사 | 비이진 ldpc 부호를 이용한 이동 통신 시스템에서 복호 장치 및 방법 |
US10432228B2 (en) | 2014-03-27 | 2019-10-01 | Electronics And Telecommunications Research Institute | Bit interleaver for low-density parity check codeword having length of 64800 and code rate of 5/15 and 4096-symbol mapping, and bit interleaving method using same |
US9378765B2 (en) | 2014-04-03 | 2016-06-28 | Seagate Technology Llc | Systems and methods for differential message scaling in a decoding process |
US9509437B2 (en) | 2014-05-13 | 2016-11-29 | Kandou Labs, S.A. | Vector signaling code with improved noise margin |
US9148087B1 (en) | 2014-05-16 | 2015-09-29 | Kandou Labs, S.A. | Symmetric is linear equalization circuit with increased gain |
US9800269B2 (en) | 2014-05-21 | 2017-10-24 | Samsung Electronics Co., Ltd. | Transmitting apparatus and interleaving method thereof |
US9780808B2 (en) | 2014-05-21 | 2017-10-03 | Samsung Electronics Co., Ltd. | Transmitter apparatus and bit interleaving method thereof |
US9602245B2 (en) | 2014-05-21 | 2017-03-21 | Samsung Electronics Co., Ltd. | Transmitting apparatus and interleaving method thereof |
KR101775704B1 (ko) | 2014-05-21 | 2017-09-19 | 삼성전자주식회사 | 송신 장치 및 그의 인터리빙 방법 |
KR101785692B1 (ko) | 2014-05-21 | 2017-10-16 | 삼성전자주식회사 | 송신 장치 및 그의 인터리빙 방법 |
KR101775703B1 (ko) * | 2014-05-21 | 2017-09-06 | 삼성전자주식회사 | 송신 장치 및 그의 인터리빙 방법 |
US10326471B2 (en) | 2014-05-22 | 2019-06-18 | Electronics And Telecommunications Research Institute | Bit interleaver for low-density parity check codeword having length of 16200 and code rate of 3/15 and quadrature phase shift keying, and bit interleaving method using same |
US9600367B2 (en) | 2014-05-22 | 2017-03-21 | Electronics And Telecommunications Research Institute | Bit interleaver for low-density parity check codeword having length of 16200 and code rate of 4/15 and 16-symbol mapping, and bit interleaving method using same |
KR102260775B1 (ko) | 2014-05-22 | 2021-06-07 | 한국전자통신연구원 | 길이가 16200이며, 부호율이 10/15인 ldpc 부호어 및 256-심볼 맵핑을 위한 비트 인터리버 및 이를 이용한 비트 인터리빙 방법 |
US10361720B2 (en) * | 2014-05-22 | 2019-07-23 | Electronics And Telecommunications Research Institute | Bit interleaver for low-density parity check codeword having length of 16200 and code rate of 3/15 and 64-symbol mapping, and bit interleaving method using same |
KR102260767B1 (ko) | 2014-05-22 | 2021-06-07 | 한국전자통신연구원 | 길이가 16200이며, 부호율이 3/15인 ldpc 부호어 및 64-심볼 맵핑을 위한 비트 인터리버 및 이를 이용한 비트 인터리빙 방법 |
US10360102B2 (en) | 2014-05-22 | 2019-07-23 | Electronics And Telecommunications Research Institute | Bit interleaver for low-density parity check codeword having length of 16200 and code rate of 10/15 and 256-symbol mapping, and bit interleaving method using same |
US9852806B2 (en) | 2014-06-20 | 2017-12-26 | Kandou Labs, S.A. | System for generating a test pattern to detect and isolate stuck faults for an interface using transition coding |
US9112550B1 (en) | 2014-06-25 | 2015-08-18 | Kandou Labs, SA | Multilevel driver for high speed chip-to-chip communications |
KR102178262B1 (ko) * | 2014-07-08 | 2020-11-12 | 삼성전자주식회사 | 패리티 검사 행렬 생성 방법, 그를 이용한 부호화 장치, 부호화 방법, 복호화 장치 및 복호화 방법 |
US9900186B2 (en) | 2014-07-10 | 2018-02-20 | Kandou Labs, S.A. | Vector signaling codes with increased signal to noise characteristics |
US9432082B2 (en) | 2014-07-17 | 2016-08-30 | Kandou Labs, S.A. | Bus reversable orthogonal differential vector signaling codes |
US9444654B2 (en) | 2014-07-21 | 2016-09-13 | Kandou Labs, S.A. | Multidrop data transfer |
CN106576087B (zh) | 2014-08-01 | 2019-04-12 | 康杜实验室公司 | 带内嵌时钟的正交差分向量信令码 |
US9490846B2 (en) * | 2014-08-14 | 2016-11-08 | Electronics And Telecommunications Research Institute | Low density parity check encoder having length of 16200 and code rate of 3/15, and low density parity check encoding method using the same |
US9674014B2 (en) | 2014-10-22 | 2017-06-06 | Kandou Labs, S.A. | Method and apparatus for high speed chip-to-chip communications |
KR102240748B1 (ko) | 2015-01-20 | 2021-04-16 | 한국전자통신연구원 | 길이가 64800이며, 부호율이 3/15인 ldpc 부호어 및 qpsk를 위한 비트 인터리버 및 이를 이용한 비트 인터리빙 방법 |
KR102240750B1 (ko) | 2015-01-20 | 2021-04-16 | 한국전자통신연구원 | 길이가 64800이며, 부호율이 2/15인 ldpc 부호어 및 qpsk를 위한 비트 인터리버 및 이를 이용한 비트 인터리빙 방법 |
KR102240745B1 (ko) | 2015-01-20 | 2021-04-16 | 한국전자통신연구원 | 길이가 64800이며, 부호율이 4/15인 ldpc 부호어 및 qpsk를 위한 비트 인터리버 및 이를 이용한 비트 인터리빙 방법 |
KR102254102B1 (ko) * | 2015-01-23 | 2021-05-20 | 삼성전자주식회사 | 메모리 시스템 및 메모리 시스템의 동작 방법 |
KR102240744B1 (ko) | 2015-01-27 | 2021-04-16 | 한국전자통신연구원 | 길이가 16200이며, 부호율이 2/15인 ldpc 부호어 및 16-심볼 맵핑을 위한 비트 인터리버 및 이를 이용한 비트 인터리빙 방법 |
KR102240728B1 (ko) * | 2015-01-27 | 2021-04-16 | 한국전자통신연구원 | 길이가 64800이며, 부호율이 4/15인 ldpc 부호어 및 64-심볼 맵핑을 위한 비트 인터리버 및 이를 이용한 비트 인터리빙 방법 |
KR102240736B1 (ko) | 2015-01-27 | 2021-04-16 | 한국전자통신연구원 | 길이가 64800이며, 부호율이 3/15인 ldpc 부호어 및 64-심볼 맵핑을 위한 비트 인터리버 및 이를 이용한 비트 인터리빙 방법 |
KR102240740B1 (ko) | 2015-01-27 | 2021-04-16 | 한국전자통신연구원 | 길이가 16200이며, 부호율이 2/15인 ldpc 부호어 및 256-심볼 맵핑을 위한 비트 인터리버 및 이를 이용한 비트 인터리빙 방법 |
KR102240741B1 (ko) | 2015-01-27 | 2021-04-16 | 한국전자통신연구원 | 길이가 16200이며, 부호율이 2/15인 ldpc 부호어 및 64-심볼 맵핑을 위한 비트 인터리버 및 이를 이용한 비트 인터리빙 방법 |
KR102287619B1 (ko) * | 2015-02-12 | 2021-08-10 | 한국전자통신연구원 | 길이가 64800이며, 부호율이 2/15인 ldpc 부호어 및 64-심볼 맵핑을 위한 비트 인터리버 및 이를 이용한 비트 인터리빙 방법 |
KR102287614B1 (ko) | 2015-02-12 | 2021-08-10 | 한국전자통신연구원 | 길이가 64800이며, 부호율이 2/15인 ldpc 부호어 및 16-심볼 맵핑을 위한 비트 인터리버 및 이를 이용한 비트 인터리빙 방법 |
KR102287629B1 (ko) | 2015-02-16 | 2021-08-10 | 한국전자통신연구원 | 길이가 64800이며, 부호율이 3/15인 ldpc 부호어 및 4096-심볼 맵핑을 위한 비트 인터리버 및 이를 이용한 비트 인터리빙 방법 |
KR102287620B1 (ko) | 2015-02-16 | 2021-08-10 | 한국전자통신연구원 | 길이가 64800이며, 부호율이 2/15인 ldpc 부호어 및 1024-심볼 맵핑을 위한 비트 인터리버 및 이를 이용한 비트 인터리빙 방법 |
KR102287627B1 (ko) | 2015-02-16 | 2021-08-10 | 한국전자통신연구원 | 길이가 64800이며, 부호율이 4/15인 ldpc 부호어 및 4096-심볼 맵핑을 위한 비트 인터리버 및 이를 이용한 비트 인터리빙 방법 |
KR102287625B1 (ko) | 2015-02-16 | 2021-08-10 | 한국전자통신연구원 | 길이가 64800이며, 부호율이 2/15인 ldpc 부호어 및 4096-심볼 맵핑을 위한 비트 인터리버 및 이를 이용한 비트 인터리빙 방법 |
KR102287623B1 (ko) | 2015-02-16 | 2021-08-10 | 한국전자통신연구원 | 길이가 64800이며, 부호율이 4/15인 ldpc 부호어 및 1024-심볼 맵핑을 위한 비트 인터리버 및 이를 이용한 비트 인터리빙 방법 |
KR102287616B1 (ko) | 2015-02-16 | 2021-08-10 | 한국전자통신연구원 | 길이가 64800이며, 부호율이 2/15인 ldpc 부호어 및 256-심볼 맵핑을 위한 비트 인터리버 및 이를 이용한 비트 인터리빙 방법 |
KR102287621B1 (ko) | 2015-02-16 | 2021-08-10 | 한국전자통신연구원 | 길이가 64800이며, 부호율이 3/15인 ldpc 부호어 및 256-심볼 맵핑을 위한 비트 인터리버 및 이를 이용한 비트 인터리빙 방법 |
KR102287635B1 (ko) | 2015-02-17 | 2021-08-10 | 한국전자통신연구원 | 길이가 16200이며, 부호율이 3/15인 ldpc 부호어 및 256-심볼 맵핑을 위한 비트 인터리버 및 이를 이용한 비트 인터리빙 방법 |
KR102287637B1 (ko) | 2015-02-17 | 2021-08-10 | 한국전자통신연구원 | 길이가 16200이며, 부호율이 4/15인 ldpc 부호어 및 64-심볼 맵핑을 위한 비트 인터리버 및 이를 이용한 비트 인터리빙 방법 |
KR102287630B1 (ko) | 2015-02-17 | 2021-08-10 | 한국전자통신연구원 | 길이가 16200이며, 부호율이 3/15인 ldpc 부호어 및 16-심볼 맵핑을 위한 비트 인터리버 및 이를 이용한 비트 인터리빙 방법 |
KR102287639B1 (ko) | 2015-02-17 | 2021-08-10 | 한국전자통신연구원 | 길이가 16200이며, 부호율이 4/15인 ldpc 부호어 및 256-심볼 맵핑을 위한 비트 인터리버 및 이를 이용한 비트 인터리빙 방법 |
MY196159A (en) | 2015-02-25 | 2023-03-17 | Samsung Electronics Co Ltd | Transmitter And Method For Generating Additional Parity Thereof |
KR102426380B1 (ko) * | 2015-02-25 | 2022-07-29 | 삼성전자주식회사 | 송신 장치 및 그의 부가 패리티 생성 방법 |
MY195738A (en) | 2015-02-25 | 2023-02-08 | Samsung Electronics Co Ltd | Transmitter and Method for Generating Additional Parity Thereof |
KR101776273B1 (ko) * | 2015-02-25 | 2017-09-07 | 삼성전자주식회사 | 송신 장치 및 그의 부가 패리티 생성 방법 |
KR102325951B1 (ko) | 2015-03-02 | 2021-11-12 | 삼성전자주식회사 | 송신 장치 및 그의 쇼트닝 방법 |
US10340953B2 (en) | 2015-05-19 | 2019-07-02 | Samsung Electronics Co., Ltd. | Method and apparatus for encoding and decoding low density parity check codes |
WO2016210445A1 (en) | 2015-06-26 | 2016-12-29 | Kandou Labs, S.A. | High speed communications system |
CN106330200B (zh) * | 2015-07-09 | 2019-09-10 | 华邦电子股份有限公司 | 执行于通量图形处理器的低密度奇偶校验解码方法 |
US9557760B1 (en) | 2015-10-28 | 2017-01-31 | Kandou Labs, S.A. | Enhanced phase interpolation circuit |
US10055372B2 (en) | 2015-11-25 | 2018-08-21 | Kandou Labs, S.A. | Orthogonal differential vector signaling codes with embedded clock |
EP3408935B1 (en) | 2016-01-25 | 2023-09-27 | Kandou Labs S.A. | Voltage sampler driver with enhanced high-frequency gain |
US20170288698A1 (en) * | 2016-03-29 | 2017-10-05 | Silicon Motion Inc. | Power saving for bit flipping decoding algorithm in ldpc decoder |
CN115051705A (zh) | 2016-04-22 | 2022-09-13 | 康杜实验室公司 | 高性能锁相环 |
US10003454B2 (en) | 2016-04-22 | 2018-06-19 | Kandou Labs, S.A. | Sampler with low input kickback |
CN109417521B (zh) | 2016-04-28 | 2022-03-18 | 康杜实验室公司 | 低功率多电平驱动器 |
US10153591B2 (en) | 2016-04-28 | 2018-12-11 | Kandou Labs, S.A. | Skew-resistant multi-wire channel |
WO2017189931A1 (en) | 2016-04-28 | 2017-11-02 | Kandou Labs, S.A. | Vector signaling codes for densely-routed wire groups |
KR102589918B1 (ko) * | 2016-07-19 | 2023-10-18 | 삼성전자주식회사 | 저밀도 패리티 체크 디코더 및 그것을 포함하는 저장 장치 |
US9906358B1 (en) | 2016-08-31 | 2018-02-27 | Kandou Labs, S.A. | Lock detector for phase lock loop |
EP3291449B1 (en) * | 2016-09-02 | 2023-05-24 | Universite De Bretagne Sud | Methods and devices for generating optimized coded modulations |
US10411922B2 (en) | 2016-09-16 | 2019-09-10 | Kandou Labs, S.A. | Data-driven phase detector element for phase locked loops |
US10200188B2 (en) | 2016-10-21 | 2019-02-05 | Kandou Labs, S.A. | Quadrature and duty cycle error correction in matrix phase lock loop |
US10372665B2 (en) | 2016-10-24 | 2019-08-06 | Kandou Labs, S.A. | Multiphase data receiver with distributed DFE |
US10200218B2 (en) | 2016-10-24 | 2019-02-05 | Kandou Labs, S.A. | Multi-stage sampler with increased gain |
US10263640B2 (en) | 2017-04-04 | 2019-04-16 | Seagate Technology Llc | Low density parity check (LDPC) decoder with pre-saturation compensation |
US10666297B2 (en) | 2017-04-14 | 2020-05-26 | Kandou Labs, S.A. | Pipelined forward error correction for vector signaling code channel |
CN110535474B (zh) | 2017-05-05 | 2023-06-06 | 华为技术有限公司 | 信息处理的方法、通信装置 |
RU2740154C1 (ru) | 2017-06-15 | 2021-01-12 | Хуавей Текнолоджиз Ко., Лтд. | Способ обработки информации и устройство связи |
CN109150196B (zh) | 2017-06-27 | 2024-06-18 | 华为技术有限公司 | 信息处理的方法、装置和通信设备 |
CN109327225B9 (zh) | 2017-06-27 | 2021-12-10 | 华为技术有限公司 | 信息处理的方法、装置和通信设备 |
US10116468B1 (en) | 2017-06-28 | 2018-10-30 | Kandou Labs, S.A. | Low power chip-to-chip bidirectional communications |
US10171110B1 (en) | 2017-07-03 | 2019-01-01 | Seagate Technology Llc | Sequential power transitioning of multiple data decoders |
US10686583B2 (en) | 2017-07-04 | 2020-06-16 | Kandou Labs, S.A. | Method for measuring and correcting multi-wire skew |
US10693587B2 (en) | 2017-07-10 | 2020-06-23 | Kandou Labs, S.A. | Multi-wire permuted forward error correction |
US10203226B1 (en) | 2017-08-11 | 2019-02-12 | Kandou Labs, S.A. | Phase interpolation circuit |
US10574274B2 (en) * | 2017-09-29 | 2020-02-25 | Nyquist Semiconductor Limited | Systems and methods for decoding error correcting codes |
US10326623B1 (en) | 2017-12-08 | 2019-06-18 | Kandou Labs, S.A. | Methods and systems for providing multi-stage distributed decision feedback equalization |
CN111684772B (zh) | 2017-12-28 | 2023-06-16 | 康杜实验室公司 | 同步切换多输入解调比较器 |
US10554380B2 (en) | 2018-01-26 | 2020-02-04 | Kandou Labs, S.A. | Dynamically weighted exclusive or gate having weighted output segments for phase detection and phase interpolation |
US10680764B2 (en) * | 2018-02-09 | 2020-06-09 | Qualcomm Incorporated | Low-density parity check (LDPC) parity bit storage for redundancy versions |
US10691772B2 (en) * | 2018-04-20 | 2020-06-23 | Advanced Micro Devices, Inc. | High-performance sparse triangular solve on graphics processing units |
CN108900463B (zh) * | 2018-08-27 | 2021-02-19 | 南京邮电大学 | 基于apsk星座映射的编码调制*** |
US10892777B2 (en) | 2019-02-06 | 2021-01-12 | Seagate Technology Llc | Fast error recovery with error correction code (ECC) syndrome weight assist |
CN110035026B (zh) * | 2019-04-10 | 2022-06-10 | 中国电子科技集团公司第十三研究所 | 微波qpsk调制电路及电子设备 |
US11223372B2 (en) | 2019-11-27 | 2022-01-11 | Hughes Network Systems, Llc | Communication throughput despite periodic blockages |
CN112367088B (zh) * | 2020-10-27 | 2023-03-21 | 上海宇航***工程研究所 | 一种基于索引矩阵的编码方法及装置 |
US11356197B1 (en) | 2021-03-19 | 2022-06-07 | Kandou Labs SA | Error-tolerant forward error correction ordered set message decoder |
US11838127B2 (en) | 2022-03-11 | 2023-12-05 | Hughes Network Systems, Llc | Adaptive satellite communications |
CN115037415B (zh) * | 2022-05-31 | 2024-02-09 | 江苏屹信航天科技有限公司 | 基于crc的纠错编码的方法、装置、终端 |
Family Cites Families (86)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5099484A (en) * | 1989-06-09 | 1992-03-24 | Digital Equipment Corporation | Multiple bit error detection and correction system employing a modified Reed-Solomon code incorporating address parity and catastrophic failure detection |
US5559990A (en) | 1992-02-14 | 1996-09-24 | Advanced Micro Devices, Inc. | Memories with burst mode access |
JP3005396B2 (ja) | 1993-08-05 | 2000-01-31 | 日本電気株式会社 | ビットインタリーブ伝送方式 |
CN1126005A (zh) * | 1994-02-16 | 1996-07-03 | 菲利浦电子有限公司 | 基于半循环码的误差可校正数据传输方法及其设备 |
US6216200B1 (en) | 1994-10-14 | 2001-04-10 | Mips Technologies, Inc. | Address queue |
MY123040A (en) * | 1994-12-19 | 2006-05-31 | Salbu Res And Dev Proprietary Ltd | Multi-hop packet radio networks |
FR2756996A1 (fr) * | 1996-12-10 | 1998-06-12 | Philips Electronics Nv | Systeme et procede de transmission numerique comportant un code produit combine a une modulation multidimensionnelle |
CA2263277A1 (en) * | 1998-03-04 | 1999-09-04 | International Mobile Satellite Organization | Carrier activation for data communications |
US6530059B1 (en) | 1998-06-01 | 2003-03-04 | Her Majesty The Queen In Right Of Canada, As Represented By The Minister Of Industry Through The Communication Research Centre | Tail-biting turbo-code encoder and associated decoder |
WO2000011845A1 (en) * | 1998-08-21 | 2000-03-02 | Massachusetts Institute Of Technology | Power-efficient communication protocol |
US7068729B2 (en) * | 2001-12-21 | 2006-06-27 | Digital Fountain, Inc. | Multi-stage code generator and decoder for communication systems |
US6347124B1 (en) * | 1998-10-29 | 2002-02-12 | Hughes Electronics Corporation | System and method of soft decision decoding |
EP0998087A1 (en) * | 1998-10-30 | 2000-05-03 | Lucent Technologies Inc. | Multilevel transmission system and method with adaptive mapping |
US6075408A (en) * | 1998-12-30 | 2000-06-13 | International Business Machines Corp. | OQPSK phase and timing detection |
DE19902520B4 (de) * | 1999-01-22 | 2005-10-06 | Siemens Ag | Hybrid-Leistungs-MOSFET |
FR2799592B1 (fr) * | 1999-10-12 | 2003-09-26 | Thomson Csf | Procede de construction et de codage simple et systematique de codes ldpc |
DE60040805D1 (de) | 1999-12-20 | 2008-12-24 | Research In Motion Ltd | Hybrid-wiederholungsaufforderungsystem und -verfahren |
US7184486B1 (en) | 2000-04-27 | 2007-02-27 | Marvell International Ltd. | LDPC encoder and decoder and method thereof |
US20020051501A1 (en) | 2000-04-28 | 2002-05-02 | Victor Demjanenko | Use of turbo-like codes for QAM modulation using independent I and Q decoding techniques and applications to xDSL systems |
KR100566745B1 (ko) | 2000-05-03 | 2006-04-03 | 유니버시티 오브 써던 캘리포니아 | 레이턴시를 줄인 siso 모듈 |
US7116710B1 (en) | 2000-05-18 | 2006-10-03 | California Institute Of Technology | Serial concatenation of interleaved convolutional codes forming turbo-like codes |
US6539367B1 (en) * | 2000-05-26 | 2003-03-25 | Agere Systems Inc. | Methods and apparatus for decoding of general codes on probability dependency graphs |
CA2348941C (en) * | 2000-05-26 | 2008-03-18 | Stewart N. Crozier | Method and system for high-spread high-distance interleaving for turbo-codes |
US20020002695A1 (en) * | 2000-06-02 | 2002-01-03 | Frank Kschischang | Method and system for decoding |
EP1290802A1 (en) | 2000-06-16 | 2003-03-12 | Aware, Inc. | Systems and methods for ldpc coded modulation |
US7096412B2 (en) | 2000-06-19 | 2006-08-22 | Trellisware Technologies, Inc. | Method for iterative and non-iterative data detection using reduced-state soft-input/soft-output algorithms for complexity reduction |
US7072417B1 (en) | 2000-06-28 | 2006-07-04 | Marvell International Ltd. | LDPC encoder and method thereof |
US6965652B1 (en) | 2000-06-28 | 2005-11-15 | Marvell International Ltd. | Address generator for LDPC encoder and decoder and method thereof |
US7000177B1 (en) | 2000-06-28 | 2006-02-14 | Marvell International Ltd. | Parity check matrix and method of forming thereof |
US7173978B2 (en) * | 2000-07-21 | 2007-02-06 | Song Zhang | Method and system for turbo encoding in ADSL |
AU2001287101A1 (en) | 2000-09-05 | 2002-03-22 | Broadcom Corporation | Quasi error free (qef) communication using turbo codes |
US7107511B2 (en) | 2002-08-15 | 2006-09-12 | Broadcom Corporation | Low density parity check (LDPC) code decoder using min*, min**, max* or max** and their respective inverses |
US7242726B2 (en) * | 2000-09-12 | 2007-07-10 | Broadcom Corporation | Parallel concatenated code with soft-in soft-out interactive turbo decoder |
JP3833457B2 (ja) | 2000-09-18 | 2006-10-11 | シャープ株式会社 | 衛星放送受信システム |
JP4389373B2 (ja) | 2000-10-11 | 2009-12-24 | ソニー株式会社 | 2元巡回符号を反復型復号するための復号器 |
US6518892B2 (en) * | 2000-11-06 | 2003-02-11 | Broadcom Corporation | Stopping criteria for iterative decoding |
KR100380161B1 (ko) * | 2000-12-29 | 2003-04-11 | 주식회사 하이닉스반도체 | 고속 동작용 어드레스 카운터 및 그 카운팅 방법 |
US20040196861A1 (en) | 2001-01-12 | 2004-10-07 | Joseph Rinchiuso | Packet data transmission within a broad-band communication system |
US6985536B2 (en) * | 2001-01-12 | 2006-01-10 | International Business Machines Corporation | Block coding for multilevel data communication |
MXPA02009140A (es) * | 2001-01-16 | 2005-07-01 | Koninkl Philips Electronics Nv | Trazo de un mapa de una modulacion codificada con interhoja de bit (bicm). |
US7003045B2 (en) | 2001-01-31 | 2006-02-21 | Motorola, Inc. | Method and apparatus for error correction |
US20020150167A1 (en) * | 2001-02-17 | 2002-10-17 | Victor Demjanenko | Methods and apparatus for configurable or assymetric forward error correction |
US6901119B2 (en) | 2001-02-22 | 2005-05-31 | International Business Machines Corporation | Method and apparatus for implementing soft-input/soft-output iterative detectors/decoders |
WO2002091592A1 (en) | 2001-05-09 | 2002-11-14 | Comtech Telecommunications Corp. | Low density parity check codes and low density turbo product codes |
US6857097B2 (en) | 2001-05-16 | 2005-02-15 | Mitsubishi Electric Research Laboratories, Inc. | Evaluating and optimizing error-correcting codes using a renormalization group transformation |
US6567465B2 (en) * | 2001-05-21 | 2003-05-20 | Pc Tel Inc. | DSL modem utilizing low density parity check codes |
US7000168B2 (en) * | 2001-06-06 | 2006-02-14 | Seagate Technology Llc | Method and coding apparatus using low density parity check codes for data storage or data transmission |
US6633856B2 (en) * | 2001-06-15 | 2003-10-14 | Flarion Technologies, Inc. | Methods and apparatus for decoding LDPC codes |
US6938196B2 (en) * | 2001-06-15 | 2005-08-30 | Flarion Technologies, Inc. | Node processors for use in parity check decoders |
US7673223B2 (en) | 2001-06-15 | 2010-03-02 | Qualcomm Incorporated | Node processors for use in parity check decoders |
US6789227B2 (en) * | 2001-07-05 | 2004-09-07 | International Business Machines Corporation | System and method for generating low density parity check codes using bit-filling |
US6895547B2 (en) * | 2001-07-11 | 2005-05-17 | International Business Machines Corporation | Method and apparatus for low density parity check encoding of data |
US6928602B2 (en) * | 2001-07-18 | 2005-08-09 | Sony Corporation | Encoding method and encoder |
US7000167B2 (en) * | 2001-08-01 | 2006-02-14 | International Business Machines Corporation | Decoding low density parity check codes |
US6895546B2 (en) * | 2001-08-16 | 2005-05-17 | Broad-Light Ltd. | System and method for encoding and decoding data utilizing modified reed-solomon codes |
WO2003021440A1 (en) * | 2001-09-01 | 2003-03-13 | Bermai, Inc. | Decoding architecture for low density parity check codes |
US6842872B2 (en) * | 2001-10-01 | 2005-01-11 | Mitsubishi Electric Research Laboratories, Inc. | Evaluating and optimizing error-correcting codes using projective analysis |
US6948109B2 (en) * | 2001-10-24 | 2005-09-20 | Vitesse Semiconductor Corporation | Low-density parity check forward error correction |
US7023936B2 (en) * | 2001-10-29 | 2006-04-04 | Intel Corporation | Method and apparatus for decoding lattice codes and multilevel coset codes |
WO2003040920A1 (en) | 2001-11-05 | 2003-05-15 | Nokia Corporation | Partially filling block interleaver for a communication system |
AU2002312175A1 (en) | 2002-01-29 | 2003-09-02 | Seagate Technology Llc | A method and decoding apparatus using linear code with parity check matrices composed from circulants |
US20030152158A1 (en) * | 2002-02-11 | 2003-08-14 | Vocal Technologies, Ltd. | Method of asymmetrical forward error correction in a communication system. application to wireless local area networks (WLAN) using turbo codes and low density parity check codes |
US7274735B2 (en) | 2002-02-28 | 2007-09-25 | Texas Instruments Incorporated | Constellation selection in a communication system |
FR2837044A1 (fr) * | 2002-03-11 | 2003-09-12 | St Microelectronics Sa | Procede de modulation et de determination du nombre de bits a transmettre sur un canal de transmission |
JP4042841B2 (ja) * | 2002-03-29 | 2008-02-06 | 富士通株式会社 | 行列演算処理装置 |
FR2838581B1 (fr) | 2002-04-16 | 2005-07-08 | Universit De Bretagne Sud | Procede de codage et/ou de decodage de codes correcteurs d'erreurs, dispositifs et signal correspondants |
US6847678B2 (en) * | 2002-04-25 | 2005-01-25 | Raytheon Company | Adaptive air interface waveform |
US7177658B2 (en) | 2002-05-06 | 2007-02-13 | Qualcomm, Incorporated | Multi-media broadcast and multicast service (MBMS) in a wireless communications system |
US7123663B2 (en) * | 2002-06-04 | 2006-10-17 | Agence Spatiale Europeenne | Coded digital modulation method for communication system |
ES2381012T3 (es) * | 2002-07-03 | 2012-05-22 | Dtvg Licensing, Inc | Procedimiento y sistema para generar códigos de comprobación de paridad de baja densidad (LDPC) |
US7864869B2 (en) * | 2002-07-26 | 2011-01-04 | Dtvg Licensing, Inc. | Satellite communication system utilizing low density parity check codes |
US7178080B2 (en) * | 2002-08-15 | 2007-02-13 | Texas Instruments Incorporated | Hardware-efficient low density parity check code for digital communications |
WO2004019268A1 (en) | 2002-08-20 | 2004-03-04 | Flarion Technologies, Inc. | Methods and apparatus for encoding ldpc codes |
US7630456B2 (en) * | 2002-09-09 | 2009-12-08 | Lsi Corporation | Method and/or apparatus to efficiently transmit broadband service content using low density parity code based coded modulation |
US7222289B2 (en) * | 2002-09-30 | 2007-05-22 | Certance Llc | Channel processor using reduced complexity LDPC decoder |
AU2003257184A1 (en) * | 2002-09-30 | 2004-04-23 | Seagate Technology Llc | Iterative equalization and iterative decoding of a reed-muller coded signal |
US7702986B2 (en) | 2002-11-18 | 2010-04-20 | Qualcomm Incorporated | Rate-compatible LDPC codes |
KR100996029B1 (ko) | 2003-04-29 | 2010-11-22 | 삼성전자주식회사 | 저밀도 패리티 검사 코드의 부호화 장치 및 방법 |
US7296208B2 (en) * | 2003-07-03 | 2007-11-13 | The Directv Group, Inc. | Method and system for generating parallel decodable low density parity check (LDPC) codes |
KR20050046471A (ko) | 2003-11-14 | 2005-05-18 | 삼성전자주식회사 | 저밀도 패러티 검사 부호를 병렬 연접하는 채널부호화/복호화 장치 및 방법 |
US7395495B2 (en) | 2004-01-12 | 2008-07-01 | Intel Corporation | Method and apparatus for decoding forward error correction codes |
KR100981503B1 (ko) | 2004-02-13 | 2010-09-10 | 삼성전자주식회사 | 최대 오류 정정/오류 검출 능력을 가지는 저밀도 패리티검사 부호 부호화/복호화 장치 및 방법 |
US7165205B2 (en) | 2004-05-14 | 2007-01-16 | Motorola, Inc. | Method and apparatus for encoding and decoding data |
US20050265387A1 (en) | 2004-06-01 | 2005-12-01 | Khojastepour Mohammad A | General code design for the relay channel and factor graph decoding |
KR100640399B1 (ko) | 2004-10-27 | 2006-10-30 | 삼성전자주식회사 | 저밀도 패리티 검사 채널 부호의 천공 방법 |
US7620880B2 (en) | 2005-12-20 | 2009-11-17 | Samsung Electronics Co., Ltd. | LDPC concatenation rules for IEEE 802.11n system with packets length specified in OFDM symbols |
-
2003
- 2003-07-03 ES ES10001217T patent/ES2381012T3/es not_active Expired - Lifetime
- 2003-07-03 JP JP2004562622A patent/JP3836859B2/ja not_active Expired - Lifetime
- 2003-07-03 KR KR1020047002204A patent/KR100683600B1/ko active IP Right Grant
- 2003-07-03 KR KR1020047002229A patent/KR100602027B1/ko active IP Right Grant
- 2003-07-03 JP JP2004562621A patent/JP3917624B2/ja not_active Expired - Fee Related
- 2003-07-03 US US10/613,823 patent/US7191378B2/en active Active
- 2003-07-03 AU AU2003249708A patent/AU2003249708A1/en not_active Abandoned
- 2003-07-03 WO PCT/US2003/021071 patent/WO2004006441A2/en active Application Filing
- 2003-07-03 AT AT03763216T patent/ATE556491T1/de active
- 2003-07-03 CN CNB038008491A patent/CN100356697C/zh not_active Expired - Lifetime
- 2003-07-03 WO PCT/US2003/022334 patent/WO2004006443A1/en active Application Filing
- 2003-07-03 DK DK03763217T patent/DK1518328T3/da active
- 2003-07-03 CA CA2456485A patent/CA2456485C/en not_active Expired - Lifetime
- 2003-07-03 EP EP03763495.3A patent/EP1413059B9/en not_active Expired - Lifetime
- 2003-07-03 WO PCT/US2003/021073 patent/WO2004006442A1/en active IP Right Grant
- 2003-07-03 AU AU2003247805A patent/AU2003247805A1/en not_active Abandoned
- 2003-07-03 US US10/613,824 patent/US7203887B2/en not_active Expired - Lifetime
- 2003-07-03 AT AT10001217T patent/ATE548803T1/de active
- 2003-07-03 CA CA2457420A patent/CA2457420C/en not_active Expired - Lifetime
- 2003-07-03 KR KR1020047002194A patent/KR100674523B1/ko active IP Right Grant
- 2003-07-03 EP EP03763217A patent/EP1518328B1/en not_active Expired - Lifetime
- 2003-07-03 AT AT03763495T patent/ATE498946T1/de not_active IP Right Cessation
- 2003-07-03 US US10/613,877 patent/US6963622B2/en not_active Expired - Lifetime
- 2003-07-03 ES ES03763217T patent/ES2282671T3/es not_active Expired - Lifetime
- 2003-07-03 CA CA002454574A patent/CA2454574C/en not_active Expired - Lifetime
- 2003-07-03 AU AU2003256588A patent/AU2003256588A1/en not_active Abandoned
- 2003-07-03 CN CN03800852.1A patent/CN1593012B/zh not_active Expired - Lifetime
- 2003-07-03 EP EP03763216.3A patent/EP1525664B9/en not_active Expired - Lifetime
- 2003-07-03 ES ES10178955T patent/ES2427179T3/es not_active Expired - Lifetime
- 2003-07-03 AT AT03763217T patent/ATE360284T1/de not_active IP Right Cessation
- 2003-07-03 CN CNB038008505A patent/CN100440736C/zh not_active Expired - Fee Related
- 2003-07-03 JP JP2004562643A patent/JP2005520469A/ja active Pending
-
2005
- 2005-03-11 HK HK05102102A patent/HK1069933A1/xx not_active IP Right Cessation
- 2005-07-11 HK HK05105789.9A patent/HK1073186A1/xx not_active IP Right Cessation
-
2006
- 2006-01-13 HK HK06100579.3A patent/HK1081003A1/xx not_active IP Right Cessation
- 2006-12-08 US US11/635,998 patent/US7424662B2/en not_active Expired - Lifetime
-
2008
- 2008-08-21 US US12/195,512 patent/US7954036B2/en not_active Expired - Lifetime
-
2011
- 2011-07-11 HK HK11107172.2A patent/HK1153056A1/xx not_active IP Right Cessation
Also Published As
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP3917624B2 (ja) | 低密度パリティチェック(ldpc)デコーダにおける経路指定方法およびシステム | |
US8615699B2 (en) | Method and system for routing in low density parity check (LDPC) decoders | |
US7020829B2 (en) | Method and system for decoding low density parity check (LDPC) codes | |
JP4422436B2 (ja) | 低密度パリティチェックコードを発生する方法およびシステム | |
US8095854B2 (en) | Method and system for generating low density parity check codes | |
JP3917563B2 (ja) | 低密度のパリティチェック(ldpc)コードをデコードする方法およびシステム | |
EP2273683B9 (en) | Encoding of low density parity check (LDPC) codes |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20060620 |
|
A601 | Written request for extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A601 Effective date: 20060920 |
|
A602 | Written permission of extension of time |
Free format text: JAPANESE INTERMEDIATE CODE: A602 Effective date: 20060927 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20061122 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20070109 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20070208 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 3917624 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
S111 | Request for change of ownership or part of ownership |
Free format text: JAPANESE INTERMEDIATE CODE: R313113 |
|
S531 | Written request for registration of change of domicile |
Free format text: JAPANESE INTERMEDIATE CODE: R313531 |
|
S533 | Written request for registration of change of name |
Free format text: JAPANESE INTERMEDIATE CODE: R313533 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20100216 Year of fee payment: 3 |
|
R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20100216 Year of fee payment: 3 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20110216 Year of fee payment: 4 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20120216 Year of fee payment: 5 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20130216 Year of fee payment: 6 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20140216 Year of fee payment: 7 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
LAPS | Cancellation because of no payment of annual fees |