JP3876259B2 - セラミック基板の製造方法 - Google Patents
セラミック基板の製造方法 Download PDFInfo
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- JP3876259B2 JP3876259B2 JP2004227995A JP2004227995A JP3876259B2 JP 3876259 B2 JP3876259 B2 JP 3876259B2 JP 2004227995 A JP2004227995 A JP 2004227995A JP 2004227995 A JP2004227995 A JP 2004227995A JP 3876259 B2 JP3876259 B2 JP 3876259B2
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
- H05K3/0052—Depaneling, i.e. dividing a panel into circuit boards; Working of the edges of circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/403—Edge contacts; Windows or holes in the substrate having plural connections on the walls thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
- H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/183—Components mounted in and supported by recessed areas of the printed circuit board
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09145—Edge details
- H05K2201/0919—Exposing inner circuit layers or metal planes at the side edge of the PCB or at the walls of large holes
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10007—Types of components
- H05K2201/10068—Non-printed resonator
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10007—Types of components
- H05K2201/10106—Light emitting diode [LED]
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4626—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
- H05K3/4629—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating inorganic sheets comprising printed circuits, e.g. green ceramic sheets
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Led Device Packages (AREA)
Description
図2に集合基板の(a)表面図、(b)断面図、そして図3に斜視図を示す。これらの図に示すように、セラミック基板の基板単位を複数一体化した集合基板6を先ず形成し、分離予定線l,l’に沿って切断して、個々の基板単位を得る。基板単位は四辺形状で、キャビティ底面4を取り囲むように壁部Wが突設される。本発明の集合基板においては2個の基板単位を連結して、開放キャビティ2の開放側を分離予定線に一致させており、開放キャビティ2が壁部Wとともに一体化して連結キャビティ9を形成している。集合基板6にブレーク溝を形成するには、図2(b)に示すように、分離予定線l,l’に沿って第一主表面CP1からブレーク刃8を入れて第一ブレーク溝b1を形成するとともに、第二主表面CP2からもブレーク刃8を入れて第二ブレーク溝b2を形成する。また、連結キャビティ9の形成領域には、分離予定線l’に沿ってブレーク貫通孔7を形成しておく。このようにすると、ブレーク貫通孔7において2個の基板単位が容易に分離できるので、分割工程でバリが生じにくくなる。
2 開放キャビティ
3 開放辺部
4 キャビティ底面
6 集合基板
7 ブレーク貫通孔
8 ブレーク刃
9 連結キャビティ
10 電子部品実装用キャビティ
13 発光素子
15 フィレット部
16 光反射面
22 凹部
CP1 第一主表面
W 壁部
l 分離予定線
l’2個の基板単位の開放側が一致した分離予定線
b1 第一のブレーク溝
Claims (4)
- 四辺形板状の基板本体と、該基板本体を底部とするキャビティを形成するために、前記基板本体の第一主表面においてキャビティ底面となる領域を取り囲むように該第一主表面から突設される壁部とを有する基板単位を、当該基板単位を分離するための分離予定線により仕切られる形にて面内方向に複数一体化した集合基板を製造し、該集合基板を前記分離予定線に沿って切断することにより、個々の基板単位に分離する工程を有し、
前記基板単位は、前記基板本体の一辺部において前記壁部が非形成となることにより、前記キャビティが、当該辺部にて側方に開放した開放キャビティとされてなり、前記集合基板において、前記分離予定線を挟んで隣接する2個の基板単位の前記開放キャビティが、開放側を該分離予定線側に一致させることにより、前記壁部とともに一体化して連結キャビティを形成するとともに、その連結位置において前記連結キャビティを挟んで対向する一対の前記壁部の第一主表面に、前記分離予定線に沿って第一のブレーク溝を形成し、前記基板本体の第二主表面側においては前記第一のブレーク溝に対応する位置に第二のブレーク溝を形成し、前記基板本体の前記連結キャビティの形成領域には、前記一対の壁部にそれぞれ形成された前記第一のブレーク溝をつなぐ位置に、前記分離予定線に沿ったブレーク貫通孔を形成し、それら第一のブレーク溝、第二のブレーク溝及びブレーク貫通孔にて前記基板単位を互いに分離することを特徴とするセラミック基板の製造方法。 - 前記開放キャビティの底面に、電子部品の実装部を形成する請求項1記載のセラミック基板の製造方法。
- 前記開放キャビティとは別の電子部品実装用キャビティを、前記基板本体の前記第一主表面においてキャビティ底面をなすように形成し、前記電子部品実装用キャビティの前記キャビティ底面に電子部品の実装部を形成する請求項1または請求項2記載のセラミック基板の製造方法。
- 前記四辺形板状の基板本体の対向する2つの辺に前記開放キャビティをそれぞれ形成し、これら2つの開放キャビティとは別の発光素子実装用キャビティをさらに形成するとともに、前記発光素子実装用キャビティの前記キャビティ底面に発光素子の実装部を形成し、該発光素子を取り囲む経路に沿ってフィレット部を形成して、該フィレット部の表面において前記発光素子からの発光光束を所定の方向に反射させるようにした請求項1ないし請求項3のいずれか1項に記載のセラミック基板の製造方法。
Priority Applications (1)
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JP2004227995A JP3876259B2 (ja) | 2004-08-04 | 2004-08-04 | セラミック基板の製造方法 |
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JP2004227995A JP3876259B2 (ja) | 2004-08-04 | 2004-08-04 | セラミック基板の製造方法 |
Publications (2)
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JP2006049551A JP2006049551A (ja) | 2006-02-16 |
JP3876259B2 true JP3876259B2 (ja) | 2007-01-31 |
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JP2004227995A Expired - Fee Related JP3876259B2 (ja) | 2004-08-04 | 2004-08-04 | セラミック基板の製造方法 |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP2514576A1 (en) | 2011-04-19 | 2012-10-24 | NGK Insulators, Ltd. | A method of producing ceramic substrates |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4012936B2 (ja) | 2004-08-06 | 2007-11-28 | 株式会社アライドマテリアル | 集合基板 |
JP4936743B2 (ja) * | 2006-02-27 | 2012-05-23 | 京セラ株式会社 | 複数個取り配線基板用セラミック生成形体の製造方法、複数個取り配線基板の製造方法、電子部品収納用パッケージおよび電子装置 |
KR101469972B1 (ko) | 2007-10-17 | 2014-12-05 | 엘지이노텍 주식회사 | 반도체 발광소자 및 그 제조방법 |
KR101064049B1 (ko) | 2010-02-18 | 2011-09-08 | 엘지이노텍 주식회사 | 반도체 발광소자 및 그 제조방법, 발광소자 패키지 |
JP5511603B2 (ja) * | 2010-09-16 | 2014-06-04 | 京セラ株式会社 | 多数個取り配線基板 |
WO2012060121A1 (ja) * | 2010-11-02 | 2012-05-10 | 京セラ株式会社 | 多数個取り配線基板および配線基板ならびに電子装置 |
JP6767204B2 (ja) * | 2016-08-25 | 2020-10-14 | 京セラ株式会社 | 電子部品搭載用基板、電子装置および電子モジュール |
CN108511431A (zh) * | 2018-05-21 | 2018-09-07 | 佛山市国星光电股份有限公司 | 一种led显示单元组及显示面板 |
CN112235960B (zh) * | 2020-10-28 | 2022-05-17 | 惠州市特创电子科技股份有限公司 | 沉金线路板及其制备方法 |
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2004
- 2004-08-04 JP JP2004227995A patent/JP3876259B2/ja not_active Expired - Fee Related
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP2514576A1 (en) | 2011-04-19 | 2012-10-24 | NGK Insulators, Ltd. | A method of producing ceramic substrates |
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