JP3461829B2 - 緩衝層を有する電力半導体素子 - Google Patents
緩衝層を有する電力半導体素子Info
- Publication number
- JP3461829B2 JP3461829B2 JP52480294A JP52480294A JP3461829B2 JP 3461829 B2 JP3461829 B2 JP 3461829B2 JP 52480294 A JP52480294 A JP 52480294A JP 52480294 A JP52480294 A JP 52480294A JP 3461829 B2 JP3461829 B2 JP 3461829B2
- Authority
- JP
- Japan
- Prior art keywords
- buffer layer
- semiconductor device
- power semiconductor
- layer
- ceramic substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0058—Laminating printed circuit boards onto other substrates, e.g. metallic substrates
- H05K3/0061—Laminating printed circuit boards onto other substrates, e.g. metallic substrates onto a metallic substrate, e.g. a heat sink
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3735—Laminates or multilayers, e.g. direct bond copper ceramic substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3736—Metallic materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29298—Fillers
- H01L2224/29299—Base material
- H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29338—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/29339—Silver [Ag] as principal constituent
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/8384—Sintering
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/0102—Calcium [Ca]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01047—Silver [Ag]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/0105—Tin [Sn]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
- H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0271—Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0335—Layered conductors or foils
- H05K2201/0355—Metal foils
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Chemical & Material Sciences (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Materials Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Die Bonding (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Ceramic Products (AREA)
- Parts Printed On Printed Circuit Boards (AREA)
Description
ミック基板と結合されている電力半導体素子は、例え
ば、公開番号0242626B1を有するヨーロッパ特許出願明
細書又はドイツ特許公開(DE)第3414065A1号明細書か
ら公知である。
電力半導体素子の際に、セラミック基板を金属底板と接
合するためにも使用することができる。しかしこの場合
はまさに、導出すべき電力損失により変化する温度は、
かなり異なる熱膨張係数の故に、早期の物質疲労及び亀
裂形成をもたらす。低温度接合技術で通常使用される
層、例えば、焼結された銀粉層は、例えば、鉛−錫をベ
ースとする軟ろうを用いての接合に比べて、確かに著し
く高い熱伝導率を有するが、この得られた接合は、軟ろ
うとは異なり、塑性変形しえないからである。
から、部分層からなる、例えば、アルミニウム又は銅か
らなる接合層を備えることによる絶縁層と金属基板間の
熱膨張調節が公知であり、その際、これらの部分層に加
えて、例えば、酸化アルミニウム又はその他の酸化物が
付加されている。しかし、この場合の欠点は、高まる電
気抵抗率及び高まる技術費用である。
の高い熱伝導率という利点が保証されたままで、早期の
物質疲労及び亀裂形成という欠点が回避される電力半導
体素子を提供することである。
より解決される。
る。この際、本発明の電力半導体素子は、順に、半導体
チップ(CHIP)、接合層1、導体路LB、セラミック基板
SUB、接合層2、低い降伏点を有する材料からなる緩衝
層、もう1つの接合層3及び金属底板BPからなる。
ンからなり、かつ例えば銅からなる導体路LBは、典型的
に、例えば酸化アルミニウムからなるセラミック基板SU
B上に施与されており、その際、これはここでは、一般
的に市販されている、いわゆるDCB−基板(直接銅接続
基板)である。底板BPは、例えば銅からなる。接合層2
及び3及び通常、接合層1は、焼結された銀粉からなる
のが有利であり、かつその層厚は、約10μmである。緩
衝層は典型的に、約20N/mm2の低い降伏点を有し、典型
的に、99%を上回るAl−含分を有する充分に純粋なアル
ミニウムからなり、その際、緩衝層の層厚は、約50〜20
0μmである。
で、低い降伏点及び高い熱伝導率を有するその他の金
属、例えば銅又は銀も使用することができる。
なる接合の剪断強さは非常に高く、緩衝層DPを設置しな
いと、かなり異なる熱膨張係数の故に、殊に、セラミッ
ク基板SUBと底板BPとの間で、温度変化の際に、機械的
応力が生じる。緩衝層を伴わない場合には、熱機械的応
力により、特に、接合層2及び3中に、早期の物質疲労
減少及び亀裂形成が生ずる。
衝層)の使用により、この応力が解消し、前記の欠点は
これにより回避されるにもかかわらず、非常に良好な耐
熱性が保証される。
Claims (2)
- 【請求項1】電力半導体素子において、 セラミック基板(SUB)の一方の面上に、第1の接合層
(1)により少なくとも1個の半導体チップ(CHIP)と
機械的に接合された導体路(LB)が施与されており、 セラミック基板の他方の面上に、銅、銀又は99%を上回
るアルミニウム含分を有する純アルミニウムの群からの
金属からなる膨張緩衝層(DP)が、第2の接合層により
施与されており、かつこの緩衝層は、第3の接合層を介
して金属底板と結合されており、かつ接合層(1、2、
3)は、焼結された銀粉からなることを特徴とする、電
力半導体素子。 - 【請求項2】膨張緩衝層(DP)が、50〜200μmの厚さ
を有する、請求項1に記載の電力半導体素子。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE4315272.4 | 1993-05-07 | ||
DE4315272A DE4315272A1 (de) | 1993-05-07 | 1993-05-07 | Leistungshalbleiterbauelement mit Pufferschicht |
PCT/DE1994/000483 WO1994027319A1 (de) | 1993-05-07 | 1994-05-02 | Leistungshalbleiterbauelement mit pufferschicht |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH08509844A JPH08509844A (ja) | 1996-10-15 |
JP3461829B2 true JP3461829B2 (ja) | 2003-10-27 |
Family
ID=6487511
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP52480294A Expired - Lifetime JP3461829B2 (ja) | 1993-05-07 | 1994-05-02 | 緩衝層を有する電力半導体素子 |
Country Status (5)
Country | Link |
---|---|
US (1) | US5654586A (ja) |
EP (1) | EP0698290B1 (ja) |
JP (1) | JP3461829B2 (ja) |
DE (2) | DE4315272A1 (ja) |
WO (1) | WO1994027319A1 (ja) |
Families Citing this family (31)
Publication number | Priority date | Publication date | Assignee | Title |
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DE19647590A1 (de) * | 1996-11-18 | 1998-05-20 | Abb Research Ltd | Hochleistungs-Halbleitermodul |
US6124635A (en) * | 1997-03-21 | 2000-09-26 | Honda Giken Kogyo Kabushiki Kaisha | Functionally gradient integrated metal-ceramic member and semiconductor circuit substrate application thereof |
US6197435B1 (en) | 1997-11-07 | 2001-03-06 | Denki Kagaku Kogyo Kabushiki Kaisha | Substrate |
JP2000082774A (ja) * | 1998-06-30 | 2000-03-21 | Sumitomo Electric Ind Ltd | パワ―モジュ―ル用基板およびその基板を用いたパワ―モジュ―ル |
DE10009678C1 (de) * | 2000-02-29 | 2001-07-19 | Siemens Ag | Wärmeleitende Klebstoffverbindung und Verfahren zum Herstellen einer wärmeleitenden Klebstoffverbindung |
DE10124141B4 (de) * | 2000-09-29 | 2009-11-26 | Infineon Technologies Ag | Verbindungseinrichtung für eine elektronische Schaltungsanordnung und Schaltungsanordnung |
DE10062108B4 (de) | 2000-12-13 | 2010-04-15 | Infineon Technologies Ag | Leistungsmodul mit verbessertem transienten Wärmewiderstand |
DE10103294C1 (de) | 2001-01-25 | 2002-10-31 | Siemens Ag | Träger mit einer Metallfläche und mindestens ein darauf angeordneter Chip, insbesondere Leistungshalbleiter |
JP2003163315A (ja) * | 2001-11-29 | 2003-06-06 | Denki Kagaku Kogyo Kk | モジュール |
KR20080065988A (ko) * | 2005-09-28 | 2008-07-15 | 니뽄 가이시 가부시키가이샤 | 히트싱크 모듈 및 그 제조방법 |
DE102005051811A1 (de) * | 2005-10-27 | 2007-05-03 | Infineon Technologies Ag | Halbleiterbauteil mit Halbleiterchip in Flachleiterrahmentechnik und Verfahren zur Herstellung desselben |
JP5070014B2 (ja) * | 2007-11-21 | 2012-11-07 | 株式会社豊田自動織機 | 放熱装置 |
JP2009130060A (ja) * | 2007-11-21 | 2009-06-11 | Toyota Industries Corp | 放熱装置 |
US8253233B2 (en) | 2008-02-14 | 2012-08-28 | Infineon Technologies Ag | Module including a sintered joint bonding a semiconductor chip to a copper surface |
DE102008055134A1 (de) * | 2008-12-23 | 2010-07-01 | Robert Bosch Gmbh | Elektrisches oder elektronisches Verbundbauteil sowie Verfahren zum Herstellen eines elektrischen oder elektronischen Verbundbauteils |
DE102008055137A1 (de) * | 2008-12-23 | 2010-07-01 | Robert Bosch Gmbh | Elektrisches oder elektronisches Verbundbauteil sowie Verfahren zum Herstellen eines elektrischen oder elektronischen Verbundbauteils |
DE102009000192A1 (de) | 2009-01-14 | 2010-07-15 | Robert Bosch Gmbh | Sinterwerkstoff, Sinterverbindung sowie Verfahren zum Herstellen eines Sinterverbindung |
DE102009024371B4 (de) * | 2009-06-09 | 2013-09-19 | Semikron Elektronik Gmbh & Co. Kg | Verfahren zur Herstellung einer Stromrichteranordnung mit Kühleinrichtung und Stromrichteranordnung |
DE102010001666A1 (de) * | 2010-02-08 | 2011-08-11 | Robert Bosch GmbH, 70469 | Elektrisches oder elektronisches Verbundbauteil |
DE102010050315C5 (de) * | 2010-11-05 | 2014-12-04 | Danfoss Silicon Power Gmbh | Verfahren zur Herstellung von gesinterten, elektrischen Baugruppen und damit hergestellte Leistungshalbleitermodule |
DE102011083899A1 (de) * | 2011-09-30 | 2013-04-04 | Robert Bosch Gmbh | Schichtverbund zum Verbinden von elektronischen Bauteilen umfassend eine Ausgleichsschicht, Anbindungsschichten und Verbindungsschichten |
TWI449477B (zh) * | 2012-07-26 | 2014-08-11 | Lextar Electronics Corp | 可撓折基板與含有其之照明裝置 |
JP6262968B2 (ja) * | 2013-09-09 | 2018-01-17 | Dowaメタルテック株式会社 | 電子部品搭載基板およびその製造方法 |
WO2017037837A1 (ja) | 2015-08-31 | 2017-03-09 | 株式会社日立製作所 | 半導体装置およびパワーエレクトロニクス装置 |
US10418295B2 (en) | 2016-01-28 | 2019-09-17 | Mitsubishi Electric Corporation | Power module |
EP3208841B1 (de) * | 2016-02-19 | 2020-12-09 | Heraeus Deutschland GmbH & Co. KG | Verfahren zur herstellung einer wärmespreizplatte, wärmespreizplatte, verfahren zur herstellung eines halbleitermoduls und halbleitermodul |
JP6717245B2 (ja) * | 2017-03-17 | 2020-07-01 | 三菱マテリアル株式会社 | 接合体の製造方法、絶縁回路基板の製造方法、及び、ヒートシンク付き絶縁回路基板の製造方法 |
JP7125931B2 (ja) | 2017-03-31 | 2022-08-25 | ローム株式会社 | パワーモジュールおよびその製造方法 |
DE102017119344A1 (de) * | 2017-08-24 | 2019-02-28 | Osram Opto Semiconductors Gmbh | Träger und Bauteil mit Pufferschicht sowie Verfahren zur Herstellung eines Bauteils |
DE102017119346A1 (de) | 2017-08-24 | 2019-02-28 | Osram Opto Semiconductors Gmbh | Bauteil mit Pufferschicht und Verfahren zur Herstellung eines Bauteils |
US11342281B2 (en) * | 2017-10-30 | 2022-05-24 | Mitsubishi Electric Corporation | Power semiconductor device and manufacturing method for power semiconductor device |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3839660A (en) * | 1973-02-05 | 1974-10-01 | Gen Motors Corp | Power semiconductor device package |
JPS5646255U (ja) * | 1979-09-17 | 1981-04-24 | ||
JPS57132333A (en) * | 1981-02-09 | 1982-08-16 | Hitachi Ltd | Module device |
JPS5896757A (ja) * | 1981-12-04 | 1983-06-08 | Hitachi Ltd | 半導体装置 |
DE3335184A1 (de) * | 1983-09-28 | 1985-04-04 | Siemens AG, 1000 Berlin und 8000 München | Verfahren zum herstellen von halbleiterbausteinen |
JPH0697671B2 (ja) * | 1984-02-24 | 1994-11-30 | 株式会社東芝 | パワー半導体モジユール基板の製造方法 |
DE3414065A1 (de) * | 1984-04-13 | 1985-12-12 | Siemens AG, 1000 Berlin und 8000 München | Anordnung bestehend aus mindestens einem auf einem substrat befestigten elektronischen bauelement und verfahren zur herstellung einer derartigen anordnung |
US4929516A (en) * | 1985-03-14 | 1990-05-29 | Olin Corporation | Semiconductor die attach system |
JPH063832B2 (ja) * | 1985-10-04 | 1994-01-12 | 株式会社日立製作所 | 半導体装置 |
IN168174B (ja) * | 1986-04-22 | 1991-02-16 | Siemens Ag | |
DE3777995D1 (de) * | 1986-12-22 | 1992-05-07 | Siemens Ag | Verfahren zur befestigung von elektronischen bauelementen auf einem substrat, folie zur durchfuehrung des verfahrens und verfahren zur herstellung der folie. |
EP0330895B1 (de) * | 1988-03-03 | 1994-12-14 | Siemens Aktiengesellschaft | Verfahren zum Befestigen von elektronischen Bauelementen auf Substraten und Anordnung zur Durchführung desselben |
EP0460286A3 (en) * | 1990-06-06 | 1992-02-26 | Siemens Aktiengesellschaft | Method and arrangement for bonding a semiconductor component to a substrate or for finishing a semiconductor/substrate connection by contactless pressing |
JP2566341B2 (ja) * | 1990-11-24 | 1996-12-25 | 株式会社日立製作所 | 半導体装置 |
JP3063299B2 (ja) * | 1991-03-20 | 2000-07-12 | 三菱マテリアル株式会社 | 半導体装置実装用基板 |
-
1993
- 1993-05-07 DE DE4315272A patent/DE4315272A1/de not_active Withdrawn
-
1994
- 1994-05-02 DE DE59407885T patent/DE59407885D1/de not_active Expired - Lifetime
- 1994-05-02 JP JP52480294A patent/JP3461829B2/ja not_active Expired - Lifetime
- 1994-05-02 EP EP94913483A patent/EP0698290B1/de not_active Expired - Lifetime
- 1994-05-02 US US08/545,694 patent/US5654586A/en not_active Expired - Lifetime
- 1994-05-02 WO PCT/DE1994/000483 patent/WO1994027319A1/de active IP Right Grant
Also Published As
Publication number | Publication date |
---|---|
JPH08509844A (ja) | 1996-10-15 |
DE4315272A1 (de) | 1994-11-10 |
US5654586A (en) | 1997-08-05 |
DE59407885D1 (de) | 1999-04-08 |
EP0698290A1 (de) | 1996-02-28 |
EP0698290B1 (de) | 1999-03-03 |
WO1994027319A1 (de) | 1994-11-24 |
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