JP3252573B2 - Multilayer ceramic parts - Google Patents

Multilayer ceramic parts

Info

Publication number
JP3252573B2
JP3252573B2 JP30011993A JP30011993A JP3252573B2 JP 3252573 B2 JP3252573 B2 JP 3252573B2 JP 30011993 A JP30011993 A JP 30011993A JP 30011993 A JP30011993 A JP 30011993A JP 3252573 B2 JP3252573 B2 JP 3252573B2
Authority
JP
Japan
Prior art keywords
circuit element
ceramic
multilayer ceramic
circuit
portion sandwiched
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP30011993A
Other languages
Japanese (ja)
Other versions
JPH07154045A (en
Inventor
達也 上田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Priority to JP30011993A priority Critical patent/JP3252573B2/en
Publication of JPH07154045A publication Critical patent/JPH07154045A/en
Application granted granted Critical
Publication of JP3252573B2 publication Critical patent/JP3252573B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4626—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
    • H05K3/4629—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating inorganic sheets comprising printed circuits, e.g. green ceramic sheets

Landscapes

  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Combinations Of Printed Boards (AREA)

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【０００１】[0001]

【産業上の利用分野】本発明は、通信機やコンピュータ
等の電子機器に用いられる積層セラミック部品に関す
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer ceramic component used for electronic equipment such as a communication device and a computer.

【０００２】[0002]

【従来の技術】従来の積層セラミック部品の構成を図２
を用いて説明する。図２において、１は積層セラミック
部品であり、例えば、チタン酸バリウム等を含有する誘
電体セラミックから構成される、複数枚のセラミックシ
ート２を用い、セラミックシート２に、銅等からなる電
極３，４と、銅等からなる回路パターン５を印刷し、積
層したものを焼成してなるものである。ここで、セラミ
ックシート２の、電極３が積層された部分には、回路素
子として、コンデンサ６が形成され、電極４が積層され
た部分には、コンデンサ７が形成される。2. Description of the Related Art FIG.
This will be described with reference to FIG. In FIG. 2, reference numeral 1 denotes a multilayer ceramic component. For example, a plurality of ceramic sheets 2 made of a dielectric ceramic containing barium titanate or the like are used. 4 and a circuit pattern 5 made of copper or the like are printed, and a laminate is fired. Here, a capacitor 6 is formed as a circuit element in a portion of the ceramic sheet 2 where the electrodes 3 are stacked, and a capacitor 7 is formed in a portion where the electrodes 4 are stacked.

【０００３】[0003]

【発明が解決しようとする課題】ところが、従来の積層
セラミック部品には、次のような問題点があった。すな
わち、コンデンサ６を形成する電極３と、コンデンサ７
を形成する電極４とに挟まれた部分、および、電極４
と、回路パターン５とに挟まれた部分に、浮遊容量が発
生し、コンデンサ６，７の静電容量が、所望の静電容量
以上の値になってしまうことがあった。そこで、本発明
においては、回路素子の隣接する電極に挟まれた部分、
および、回路素子の電極と、回路素子に隣接する回路パ
ターンとに挟まれた部分に発生する、浮遊容量を低減す
る構成を備えた積層セラミック部品を提供することを目
的とする。However, conventional multilayer ceramic parts have the following problems. That is, the electrode 3 forming the capacitor 6 and the capacitor 7
And a portion sandwiched between the electrodes 4 forming the
Then, a floating capacitance is generated in a portion sandwiched between the circuit pattern 5 and the capacitance of the capacitors 6 and 7 sometimes becomes larger than a desired capacitance. Therefore, in the present invention, a portion sandwiched between adjacent electrodes of the circuit element,
It is another object of the present invention to provide a multilayer ceramic component having a structure for reducing stray capacitance generated in a portion sandwiched between an electrode of a circuit element and a circuit pattern adjacent to the circuit element.

【０００４】[0004]

【課題を解決するための手段】上記の目的を達成するた
めに、本発明においては、少なくとも電極と回路パター
ンとを印刷した複数枚のセラミックシートを積層し、少
なくともコンデンサからなる回路素子を内蔵したものを
焼成してなる、積層セラミック部品において、前記回路
素子の隣接する電極に挟まれた部分、および、前記回路
素子の電極と、該回路素子に隣接する回路パターンとに
挟まれた部分に、それぞれ前記セラミックシートを貫通
する複数の貫通孔を形成するとともに、該複数の貫通孔
に、前記セラミックシートより誘電率が低い充填物を、
充填したことを特徴とする。In order to achieve the above object, in the present invention, a plurality of ceramic sheets on which at least electrodes and a circuit pattern are printed are laminated, and at least a circuit element comprising a capacitor is incorporated. In the multilayer ceramic component, which is obtained by firing the object, in the portion sandwiched between the adjacent electrodes of the circuit element, and in the portion sandwiched between the electrode of the circuit element and the circuit pattern adjacent to the circuit element, thereby forming a plurality of through holes through the ceramic sheet, respectively, to the plurality of through-holes, the dielectric constant of ceramic sheet is low fill,
It is characterized by being filled.

【０００５】[0005]

【作用】本発明の積層セラミック部品においては、回路
素子の隣接する電極に挟まれた部分、および、回路素子
の電極と、回路素子に隣接する回路パターンとに挟まれ
た部分に、それぞれ複数の貫通孔が形成され、この複数
の貫通孔に、セラミックシートより誘電率が低い充填物
が充填される。これにより、回路素子同士、および、回
路素子と回路パターンとは、電気的に遮断され、浮遊容
量の発生が低減される。また、それぞれの貫通孔は埋め
られるので、積層セラミック部品の強度は従来と変わら
ないものである。In the multilayer ceramic component according to the present invention, a plurality of portions are provided between a portion between the electrodes adjacent to the circuit element and a portion between the electrode of the circuit element and the circuit pattern adjacent to the circuit element . Through holes are formed and this multiple
The through-hole, filling dielectric constant than ceramic sheet is low is filled. As a result, the circuit elements are electrically isolated from each other and between the circuit element and the circuit pattern, and the occurrence of stray capacitance is reduced. Further, since the respective through holes are filled, the strength of the multilayer ceramic component is not different from the conventional one.

【０００６】[0006]

【実施例】本発明の一実施例にかかる積層セラミック部
品の構成を、図１を用いて説明する。なお、従来例と同
一、もしくは同等の部分については、同一符号を付し、
その説明は省略する。本発明は、積層セラミック部品に
おいて、回路素子の隣接する電極に挟まれた部分、およ
び、回路素子の電極と、回路素子に隣接する回路パター
ンとに挟まれた部分に、貫通孔を形成し、この貫通孔
に、セラミックシートより誘電率が低い充填物を充填す
るものである。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The construction of a multilayer ceramic component according to an embodiment of the present invention will be described with reference to FIG. The same or equivalent parts as in the conventional example are denoted by the same reference numerals,
The description is omitted. The present invention, in the multilayer ceramic component, a portion sandwiched between adjacent electrodes of the circuit element, and a portion of the electrode of the circuit element and a portion sandwiched between the circuit pattern adjacent to the circuit element, to form a through hole, This through hole is filled with a filler having a lower dielectric constant than the ceramic sheet.

【０００７】図１において、積層セラミック部品１の、
コンデンサ６，７を形成する電極３，４に挟まれた部
分、および、電極４と回路パターン５とに挟まれた部分
に、それぞれ、複数の貫通孔８，９が形成される。貫通
孔８，９はそれぞれ、複数枚のセラミックシート２に、
対向するセラミックシート２，２間で開口部が重ならな
いよう、千鳥状に形成されるものである。そして、貫通
孔８，９には、それぞれ、セラミックシート２より誘電
率が低い、ガラスやシリカ等から構成される充填物１
０，１１が充填される。このように、セラミックシート
２に、貫通孔８，９が形成され、充填物１０，１１が充
填されることによって、コンデンサ６とコンデンサ７、
および、コンデンサ７と回路パターン５は、それぞれ電
気的に遮断される。したがって、コンデンサ６，７間、
および、コンデンサ７と回路パターン５との間で、浮遊
容量の発生は低減され、コンデンサ６，７の静電容量
が、所望の値より高くなることはない。また、貫通孔
８，９はそれぞれ埋められるので、積層セラミック部品
の強度は、従来と変わらない。In FIG. 1, a multilayer ceramic component 1
A plurality of through holes 8 and 9 are formed in portions sandwiched between the electrodes 3 and 4 forming the capacitors 6 and 7 and in a portion sandwiched between the electrode 4 and the circuit pattern 5, respectively. The through holes 8 and 9 are respectively formed in the plurality of ceramic sheets 2.
The openings are formed in a staggered manner so that the openings do not overlap between the facing ceramic sheets 2 and 2. Each of the through holes 8 and 9 has a filler 1 made of glass, silica, or the like having a lower dielectric constant than the ceramic sheet 2.
0 and 11 are filled. As described above, the through holes 8 and 9 are formed in the ceramic sheet 2 and the fillers 10 and 11 are filled, so that the capacitors 6 and 7 are formed.
Further, the capacitor 7 and the circuit pattern 5 are electrically disconnected from each other. Therefore, between the capacitors 6 and 7,
Further, the occurrence of stray capacitance between the capacitor 7 and the circuit pattern 5 is reduced, and the capacitance of the capacitors 6, 7 does not become higher than a desired value. Further, since the through holes 8 and 9 are filled, respectively, the strength of the multilayer ceramic component is not different from the conventional one.

【０００８】なお、本実施例においては、複数の貫通孔
が、対向するセラミックシート間で開口部が重ならない
ように、千鳥状に形成される場合について説明したが、
貫通孔の位置・形状は実施例に書かれたものに限定され
ることはない。例えば、複数枚のセラミックシートにま
たがる単一の貫通孔を形成し、貫通孔に、ガラス等から
構成される充填物を充填して形成しても、あるいは、複
数枚のセラミックシートにまたがる複数の貫通孔を形成
し、同じく充填物を充填して形成しても、同様の効果が
得られるものである。さらに、本実施例においては、回
路素子として、コンデンサのみを備える積層セラミック
部品において、コンデンサ同士に挟まれた部分、およ
び、コンデンサと回路パターンに挟まれた部分に、貫通
孔を形成して、浮遊容量の発生を低減する場合について
説明したが、次のような場合にも、本発明を適用できる
ものである。すなわち、コンデンサと、コンデンサ以外
の回路素子、例えば抵抗と、を備える積層セラミック部
品において、コンデンサと抵抗に挟まれた部分、およ
び、抵抗と回路パターンに挟まれた部分に、貫通孔を形
成しても、本実施例と同様の効果が得られるものであ
る。In this embodiment, the case where the plurality of through holes are formed in a staggered manner so that the openings do not overlap between the opposing ceramic sheets has been described.
The positions and shapes of the through holes are not limited to those described in the embodiments. For example, a single through-hole extending over a plurality of ceramic sheets may be formed, and the through-hole may be formed by filling a filler composed of glass or the like, or a plurality of ceramic sheets may extend over a plurality of ceramic sheets. The same effect can be obtained by forming a through hole and filling the same with a filler. Further, in the present embodiment, as a circuit element, in a multilayer ceramic component including only a capacitor, a through hole is formed in a portion sandwiched between capacitors and a portion sandwiched between a capacitor and a circuit pattern, and floating is performed. Although the case where the generation of the capacitance is reduced has been described, the present invention can be applied to the following cases. That is, in a multilayer ceramic component including a capacitor and a circuit element other than the capacitor, for example, a resistor, a portion sandwiched between the capacitor and the resistor, and a portion sandwiched between the resistor and the circuit pattern are formed with through holes. Also, the same effects as those of the present embodiment can be obtained.

【０００９】加えて、本実施例においては、誘電体セラ
ミックから構成されるセラミックシートを積層して、積
層セラミック部品を形成する場合について説明したが、
絶縁体セラミックから構成されるセラミックシートを用
いて形成する積層セラミック部品にも、本発明を適用す
ることができる。すなわち、アルミナシリカ酸化バリウ
ム等を含有する絶縁体セラミックから構成されるセラミ
ックシートを用い、このセラミックシートに、誘電体セ
ラミックからなるセラミック片を厚膜印刷し、さらに、
このセラミック片に電極を付して、回路素子（例えばコ
ンデンサ）を形成した積層セラミック部品において、回
路素子の隣接する電極に挟まれた部分、および、回路素
子の電極と、回路素子に隣接する回路パターンとに挟ま
れた部分に、貫通孔を形成しても、本実施例と同様の効
果が得られるものである。In addition, in this embodiment, a case has been described in which ceramic sheets made of dielectric ceramics are laminated to form a laminated ceramic component.
The present invention can be applied to a multilayer ceramic component formed using a ceramic sheet made of an insulating ceramic. That is, a ceramic sheet made of an insulating ceramic containing alumina silica barium oxide or the like is used, and a ceramic piece made of a dielectric ceramic is thickly printed on this ceramic sheet,
In a laminated ceramic component in which a circuit element (for example, a capacitor) is formed by attaching an electrode to this ceramic piece, a portion sandwiched between adjacent electrodes of the circuit element, an electrode of the circuit element, and a circuit adjacent to the circuit element Even if a through-hole is formed in a portion sandwiched between the patterns, the same effect as in the present embodiment can be obtained.

【００１０】本発明の積層セラミック部品においては、
セラミックシートの、回路素子の隣接する電極に挟まれ
た部分、および、回路素子の電極と、回路素子に隣接す
る回路パターンとに挟まれた部分に、それぞれ複数の貫
通孔が形成され、この複数の貫通孔に、積層セラミック
部品を構成するセラミックシートより誘電率が低い充填
物が充填される。これにより、回路素子同士、および、
回路素子と回路パターンとは、電気的に遮断され、浮遊
容量の発生が低減される。また、それぞれの貫通孔は埋
められるので、積層セラミック部品の強度は、従来と変
わらないものである。In the multilayer ceramic component of the present invention,
A plurality of through holes are respectively provided in a portion of the ceramic sheet sandwiched between electrodes adjacent to the circuit element, and in a portion sandwiched between the electrode of the circuit element and the circuit pattern adjacent to the circuit element. The plurality of through-holes are filled with a filler having a lower dielectric constant than the ceramic sheet constituting the multilayer ceramic component. With this, the circuit elements and,
The circuit element and the circuit pattern are electrically disconnected, and the occurrence of stray capacitance is reduced. Further, since the respective through holes are filled, the strength of the multilayer ceramic component is not different from the conventional one.

【図面の簡単な説明】[Brief description of the drawings]

【図１】本発明の実施例にかかる積層セラミック部品の
断面図。FIG. 1 is a sectional view of a multilayer ceramic component according to an embodiment of the present invention.

【図２】従来の積層セラミック部品の断面図。FIG. 2 is a cross-sectional view of a conventional multilayer ceramic component.

【符号の説明】[Explanation of symbols]

１ 積層セラミック部品 ２ セラミックシート ３，４ 電極 ５ 回路パターン ６，７ 回路素子 ８，９ 貫通孔 １０，１１ 充填物 DESCRIPTION OF SYMBOLS 1 Multilayer ceramic component 2 Ceramic sheet 3, 4 Electrode 5 Circuit pattern 6, 7 Circuit element 8, 9 Through hole 10, 11 Filler

Claims (1)

(57)【特許請求の範囲】(57) [Claims] 【請求項１】 少なくとも電極と回路パターンとを印刷
した複数枚のセラミックシートを積層し、少なくともコ
ンデンサからなる回路素子を内蔵したものを焼成してな
る、積層セラミック部品において、前記回路素子の隣接
する電極に挟まれた部分、および、前記回路素子の電極
と、該回路素子に隣接する回路パターンとに挟まれた部
分に、それぞれ前記セラミックシートを貫通する複数の
貫通孔を形成するとともに、該複数の貫通孔に、前記セ
ラミックシートより誘電率が低い充填物を、充填したこ
とを特徴とする積層セラミック部品。1. A laminated ceramic component comprising: a plurality of ceramic sheets on which at least electrodes and a circuit pattern are printed; and a laminate in which at least a circuit element including a capacitor is built is fired. portion sandwiched between the electrodes, and an electrode of the circuit element, the portion sandwiched between the circuit patterns which are adjacent to the circuit element, to form a plurality of <br/> through hole passing through the ceramic sheet together, to the plurality of through holes, multilayer ceramic part, characterized in that the dielectric constant of ceramic sheet is low packing and filling.
JP30011993A 1993-11-30 1993-11-30 Multilayer ceramic parts Expired - Fee Related JP3252573B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP30011993A JP3252573B2 (en) 1993-11-30 1993-11-30 Multilayer ceramic parts

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP30011993A JP3252573B2 (en) 1993-11-30 1993-11-30 Multilayer ceramic parts

Publications (2)

Publication Number Publication Date
JPH07154045A JPH07154045A (en) 1995-06-16
JP3252573B2 true JP3252573B2 (en) 2002-02-04

Family

ID=17880957

Family Applications (1)

Application Number Title Priority Date Filing Date
JP30011993A Expired - Fee Related JP3252573B2 (en) 1993-11-30 1993-11-30 Multilayer ceramic parts

Country Status (1)

Country Link
JP (1) JP3252573B2 (en)

Also Published As

Publication number Publication date
JPH07154045A (en) 1995-06-16

Similar Documents

Publication Publication Date Title
JP3088021B2 (en) Voltage controlled oscillator
JP2000058376A (en) Ceramic capacitor
JP2982539B2 (en) Chip feedthrough capacitor
JP3252573B2 (en) Multilayer ceramic parts
US6004657A (en) Laminated electronic part
JP2712295B2 (en) Hybrid integrated circuit
JPH06232005A (en) Lc composite component
JP3368664B2 (en) Multilayer ceramic parts
JP2656585B2 (en) Integrated circuit components and their mounting structures
JPH04267317A (en) Layered ceramic capacitor
JP2008205135A (en) Multilayer ceramic capacitor and capacitor mounting circuit board
JP3175433B2 (en) Multilayer ceramic parts
JPH06163321A (en) Composite part of high-frequency lc
JPS63278399A (en) Composing method for mixed thick film circuit
JPH05175071A (en) Laminated ceramic capacitor
JP3348523B2 (en) Multilayer ceramic parts
JP3368650B2 (en) Multilayer ceramic parts
JPH0766077A (en) Laminated electronic component
JP2627625B2 (en) Multilayer integrated circuit
JPH1065342A (en) Multilayer circuit board and manufacture thereof
JP2604203Y2 (en) Ceramic capacitors
KR20050055264A (en) Chip components having various pattern and the manufacturing process
JPH07130574A (en) Laminated ceramic component
JPH022318B2 (en)
JPH0425098A (en) Ceramic multilayer substrate

Legal Events

Date Code Title Description
FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20071122

Year of fee payment: 6

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20081122

Year of fee payment: 7

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20091122

Year of fee payment: 8

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20101122

Year of fee payment: 9

LAPS Cancellation because of no payment of annual fees