JP2022057189A - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP2022057189A JP2022057189A JP2020165305A JP2020165305A JP2022057189A JP 2022057189 A JP2022057189 A JP 2022057189A JP 2020165305 A JP2020165305 A JP 2020165305A JP 2020165305 A JP2020165305 A JP 2020165305A JP 2022057189 A JP2022057189 A JP 2022057189A
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- wire
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- semiconductor
- semiconductor element
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 171
- 239000000758 substrate Substances 0.000 claims abstract description 22
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 16
- 229910052802 copper Inorganic materials 0.000 claims description 16
- 239000010949 copper Substances 0.000 claims description 16
- 238000010586 diagram Methods 0.000 description 11
- 229910000679 solder Inorganic materials 0.000 description 6
- 238000000034 method Methods 0.000 description 4
- 239000002184 metal Substances 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 238000009413 insulation Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910003460 diamond Inorganic materials 0.000 description 1
- 239000010432 diamond Substances 0.000 description 1
- 239000008393 encapsulating agent Substances 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 230000020169 heat generation Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 239000003566 sealing material Substances 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
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Abstract
Description
以下では、本実施の形態1に係る半導体装置は半導体モジュールであるものとして説明する。図1は、本実施の形態1に係る半導体装置の概略構成を示す断面図である。なお、この図1は、半導体装置の概略構成を示す図であるため、図2以降の図と多少異なっている。
以上のような本実施の形態1に係る半導体装置によれば、第2エミッタワイヤ35bは、平面視で第1エミッタワイヤ35aと第1半導体素子33aとの接続点に対して第1エミッタワイヤ35aと逆側に位置している。このような構成によれば、概ね一直線上に並んだエミッタパターン32b、第1半導体素子33a、及び、エミッタパターン32bに、この順でワイヤをボンディングすることができる。このため、通常であれば第1半導体素子33aに十分な本数のワイヤをボンディングできない場合であっても、ワイヤをボンディングすることができる。したがって、半導体装置を大型化することなく、ワイヤの本数、及び、ワイヤの発熱を維持することができるので、ワイヤ配線の信頼性を向上させることができる。
図5は、本実施の形態2に係る半導体装置の構成を示す平面図であり、図2に対応する図である。
図6及び図7は、本実施の形態3に係る半導体装置の構成を示す平面図であり、図2に対応する図である。
図8は、本実施の形態4に係る半導体装置の構成を示す平面図であり、図2に対応する図である。図9は、本実施の形態4に係る半導体装置の構成を示す側面図であり、図3に対応する図である。
図10は、本実施の形態5に係る半導体装置の構成を示す平面図であり、図2に対応する図である。
図11は、本実施の形態6に係る半導体装置の構成を示す平面図であり、図2に対応する図である。図12は、本実施の形態6に係る半導体装置の構成を示す側面図であり、図3に対応する図である。
図14は、本実施の形態7に係る半導体装置の構成を示す平面図であり、図2に対応する図である。
本実施の形態8では、第1半導体素子33a及び第2半導体素子33bの少なくともいずれか1つが、ワイドバンドギャップ半導体を含む。ワイドバンドギャップ半導体は、例えば、炭化珪素(SiC)、窒化ガリウム(GaN)、ダイヤモンドを含む。このような本実施の形態8によれば、半導体装置の小型化及び並列化が期待できる。
Claims (9)
- 絶縁基板と、
前記絶縁基板に接続された第1半導体素子と、
前記絶縁基板上に配設され、平面視で前記第1半導体素子に対して互いに逆側に位置し、互いに電気的に接続された第1対向部分及び第2対向部分を含む導電部材と、
前記第1半導体素子上及び前記第1対向部分上に接続された第1ワイヤと、
前記第1半導体素子上及び前記第2対向部分上に接続され、平面視で前記第1ワイヤと前記第1半導体素子との接続点に対して前記第1ワイヤと逆側に位置する第2ワイヤと
を備える、半導体装置。 - 請求項1に記載の半導体装置であって、
複数の前記第1半導体素子が互いに、複数の前記第1ワイヤ、複数の前記第2ワイヤ、及び、前記導電部材によって並列接続されている、半導体装置。 - 請求項1または請求項2に記載の半導体装置であって、
前記半導体装置の外部と接続される外部制御端子と、
前記絶縁基板上に配設され、前記外部制御端子と前記第1半導体素子との間の制御用ワイヤのみと接続された制御用パターンと
をさらに備える、半導体装置。 - 請求項2に記載の半導体装置であって、
前記複数の第1半導体素子の制御電極の間の制御用ワイヤが、前記制御電極とステッチボンディングされている、半導体装置。 - 請求項2に記載の半導体装置であって、
前記第1半導体素子と接続された制御用ワイヤが、前記第1ワイヤのうち前記第2ワイヤから遠い一端から、前記第2ワイヤのうち前記第1ワイヤから遠い一端までの間の上方を通る、半導体装置。 - 請求項1または請求項2に記載の半導体装置であって、
前記絶縁基板上に配設され、前記第1半導体素子と前記第1対向部分との間の前記第1ワイヤ、または、前記第1半導体素子と前記第2対向部分との間の前記第2ワイヤに接続された第2半導体素子をさらに備える、半導体装置。 - 請求項1または請求項2に記載の半導体装置であって、
前記導電部材は、
前記絶縁基板上に配設されたエミッタパターンと、
前記エミッタパターン上に配設され、前記第1対向部分及び前記第2対向部分にそれぞれ対応する第1銅ブロック及び第2銅ブロックと
を含む、半導体装置。 - 請求項1から請求項7のうちのいずれか1項に記載の半導体装置であって、
平面視において、前記第1ワイヤの延在方向と前記第2ワイヤの延在方向とが鈍角を形成する、半導体装置。 - 請求項1から請求項8のうちのいずれか1項に記載の半導体装置であって、
前記第1半導体素子はワイドバンドギャップ半導体を含む、半導体装置。
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US17/373,259 US11784156B2 (en) | 2020-09-30 | 2021-07-12 | Semiconductor device |
DE102021123205.8A DE102021123205A1 (de) | 2020-09-30 | 2021-09-08 | Halbleitervorrichtung |
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Citations (9)
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JPH0494141A (ja) * | 1990-08-09 | 1992-03-26 | Fuji Electric Co Ltd | 半導体装置 |
JPH0758272A (ja) * | 1993-08-20 | 1995-03-03 | Origin Electric Co Ltd | 電力用半導体装置 |
JPH0878619A (ja) * | 1994-09-07 | 1996-03-22 | Hitachi Ltd | 電力用半導体装置 |
JP2002203941A (ja) * | 2001-01-04 | 2002-07-19 | Nissan Motor Co Ltd | 半導体実装構造 |
JP2006156479A (ja) * | 2004-11-25 | 2006-06-15 | Toyota Motor Corp | パワー半導体装置 |
JP2009206140A (ja) * | 2008-02-26 | 2009-09-10 | Sumitomo Electric Ind Ltd | パワーモジュール |
JP2015076511A (ja) * | 2013-10-09 | 2015-04-20 | 株式会社日立製作所 | 半導体装置およびその製造方法 |
JP2017107937A (ja) * | 2015-12-08 | 2017-06-15 | 三菱電機株式会社 | 電力用半導体装置 |
JP2018186302A (ja) * | 2018-08-20 | 2018-11-22 | 三菱電機株式会社 | 半導体装置およびそれを備える半導体モジュール |
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KR102041645B1 (ko) * | 2014-01-28 | 2019-11-07 | 삼성전기주식회사 | 전력반도체 모듈 |
US10756207B2 (en) * | 2018-10-12 | 2020-08-25 | Transphorm Technology, Inc. | Lateral III-nitride devices including a vertical gate module |
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2020
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- 2021-07-12 US US17/373,259 patent/US11784156B2/en active Active
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Publication number | Priority date | Publication date | Assignee | Title |
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JPH0494141A (ja) * | 1990-08-09 | 1992-03-26 | Fuji Electric Co Ltd | 半導体装置 |
JPH0758272A (ja) * | 1993-08-20 | 1995-03-03 | Origin Electric Co Ltd | 電力用半導体装置 |
JPH0878619A (ja) * | 1994-09-07 | 1996-03-22 | Hitachi Ltd | 電力用半導体装置 |
JP2002203941A (ja) * | 2001-01-04 | 2002-07-19 | Nissan Motor Co Ltd | 半導体実装構造 |
JP2006156479A (ja) * | 2004-11-25 | 2006-06-15 | Toyota Motor Corp | パワー半導体装置 |
JP2009206140A (ja) * | 2008-02-26 | 2009-09-10 | Sumitomo Electric Ind Ltd | パワーモジュール |
JP2015076511A (ja) * | 2013-10-09 | 2015-04-20 | 株式会社日立製作所 | 半導体装置およびその製造方法 |
JP2017107937A (ja) * | 2015-12-08 | 2017-06-15 | 三菱電機株式会社 | 電力用半導体装置 |
JP2018186302A (ja) * | 2018-08-20 | 2018-11-22 | 三菱電機株式会社 | 半導体装置およびそれを備える半導体モジュール |
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