JP2021110933A - 電界発光表示装置 - Google Patents
電界発光表示装置 Download PDFInfo
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
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- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Control Of El Displays (AREA)
- Electroluminescent Light Sources (AREA)
Abstract
Description
11 タイミングコントローラー
12 データ駆動回路
13 ゲート駆動回路
14 データライン
15 ゲートライン
16 電源回路
Claims (20)
- 複数のピクセルを有する電界発光表示装置であって、
前記ピクセルのそれぞれは、
第1ノードに連結されたゲート電極と第3ノードに連結されたソース電極と第4ノードに連結されたドレイン電極とを有し、前記第3ノードに高電位ピクセル電圧が印加されるとき、データ電圧に相応するピクセル電流を生成する駆動トランジスタと、
前記第1ノードと第2ノードとの間に連結された第1キャパシターと、前記第2ノードと前記高電位ピクセル電圧の入力端子との間に連結された第2キャパシターを有し、第1スキャン信号、前記第1スキャン信号と位相が反対の第2スキャン信号、前記第1スキャン信号より位相が遅い第3スキャン信号、前記第1スキャン信号より位相が先立つ第4スキャン信号、及びエミッション信号を基準に前記駆動トランジスタのゲートソース間の電圧を制御する内部補償部と、
前記第4ノードに連結される第5ノードと低電位ピクセル電圧の入力端子との間に連結された発光素子とを含む、電界発光表示装置。 - 前記内部補償部は、
前記第1〜第4スキャン信号と前記エミッション信号を基準に決定されたエージング期間とプログラミング期間に複数のスイッチングトランジスタの動作によって前記第1〜第5ノードの電圧を制御し、前記プログラミング期間に引き続く発光期間に前記駆動トランジスタの閾値電圧が前記駆動トランジスタのゲートソース間に反映されるように制御する、請求項1に記載の電界発光表示装置。 - 前記内部補償部は、
前記プログラミング期間内に第1初期化電圧とデータ電圧に基づいて前記駆動トランジスタのゲートソース間の電圧を前記閾値電圧を含む第1レベルに制御し、
前記プログラミング期間に先立つ前記エージング期間内に前記第1初期化電圧より高い第2初期化電圧に基づいて前記駆動トランジスタのゲートソース間の電圧を前記第1レベルより高い第2レベルに制御する、請求項2に記載の電界発光表示装置。 - 前記第1レベル及び前記第2レベルのゲートソース間の電圧によって前記駆動トランジスタはオン状態になり、
前記駆動トランジスタのゲートソース間の電圧は前記プログラミング期間に比べて前記エージング期間においてより高い、請求項3に記載の電界発光表示装置。 - 前記プログラミング期間は、初期化期間と、前記初期化期間に引き続くデータ書込期間とを含み、
前記内部補償部は、
前記初期化期間の間に前記第1初期化電圧が前記第1、第4及び第5ノードに印加されるように前記スイッチングトランジスタの動作を制御し、
前記データ書込期間の間に前記データ電圧が前記第2ノードに印加されるように前記スイッチングトランジスタの動作を制御する、請求項3に記載の電界発光表示装置。 - 前記内部補償部は、
前記エージング期間にオンレベルの前記第4スキャン信号によって前記第2初期化電圧を前記第4ノードに印加する第1スイッチングトランジスタと、
前記初期化期間にオンレベルの前記第1スキャン信号によって前記第2ノードと前記第3ノードを連結し、前記第1初期化電圧から前記駆動トランジスタの閾値電圧を差し引いた第1電圧が前記第2ノードと前記第3ノードに印加されるようにする第2スイッチングトランジスタと、
前記初期化期間にオンレベルの前記第1スキャン信号によって前記第1初期化電圧を前記第1ノードに印加する第4スイッチングトランジスタと、
前記初期化期間にオンレベルの前記第2スキャン信号によって前記第1初期化電圧を前記第5ノードに印加する第7スイッチングトランジスタと、
前記データ書込期間にオンレベルの前記第3スキャン信号によって前記データ電圧を前記第2ノードに印加する第3スイッチングトランジスタと、
前記発光期間にオンレベルの前記エミッション信号によって前記高電位ピクセル電圧の入力端子と前記第3ノードを電気的に連結する第4スイッチングトランジスタT5と、
前記発光期間にオンレベルの前記エミッション信号によって前記第4ノードと前記第5ノードを連結する第6スイッチングトランジスタとをさらに含む、請求項5に記載の電界発光表示装置。 - 前記内部補償部は、
前記エージング期間に先立つプリ初期化期間内に、前記第1初期化電圧が前記第1ノードに予め印加されるように前記スイッチングトランジスタの動作をさらに制御する、請求項5に記載の電界発光表示装置。 - 前記プリ初期化期間内に、前記第1、第2、及び第4スキャン信号は第1次オンレベルで入力される、請求項7に記載の電界発光表示装置。
- 前記プログラミング期間内に、前記第1、第2、及び第4スキャン信号は第2次オンレベルで入力される、請求項8に記載の電界発光表示装置。
- 前記第1スイッチングトランジスタと前記第4スイッチングトランジスタは酸化物半導体層を含むNチャネル酸化物トランジスタから具現される、請求項6に記載の電界発光表示装置。
- 前記第2スイッチングトランジスタと前記第3スイッチングトランジスタは酸化物半導体層を含むNチャネル酸化物トランジスタから具現される、請求項6に記載の電界発光表示装置。
- 前記駆動トランジスタと前記第5スイッチングトランジスタと前記第6スイッチングトランジスタと前記第7スイッチングトランジスタは低温ポリシリコン半導体層を含むPチャネルLTPS(Low Temperature Poli Silicon)トランジスタから具現される、請求項6に記載の電界発光表示装置。
- 前記第1キャパシターは前記初期化期間に前記駆動トランジスタの閾値電圧を保存し、
前記第2キャパシターは前記データ書込期間に前記データ電圧を保存する、請求項5に記載の電界発光表示装置。 - 前記ピクセルに前記データ電圧が書き込まれる第1映像フレームと第2映像フレームが存在するとき、前記第1映像フレームで書き込まれたデータ電圧を維持する複数の第3映像フレームが前記第1映像フレームと前記第2映像フレームとの間に位置する、請求項1に記載の電界発光表示装置。
- 複数のピクセルを有する電界発光表示装置であって、
前記ピクセルのそれぞれは、
第1ノードに連結されたゲート電極と第3ノードに連結されたソース電極と第4ノードに連結されたドレイン電極とを有し、前記第3ノードに高電位ピクセル電圧が印加されるとき、データ電圧に相応するピクセル電流を生成する駆動トランジスタと、
第5ノードと低電位ピクセル電圧の入力端子との間に連結される発光素子と、
前記第1ノードにカップリングされた第2ノードを有し、第1スキャン信号、前記第1スキャン信号と位相が反対の第2スキャン信号、前記第1スキャン信号より位相が遅い第3スキャン信号、前記第1スキャン信号より位相が先立つ第4スキャン信号、及びエミッション信号を基準に前記駆動トランジスタのゲートソース間の電圧を制御し、前記第1〜第4スキャン信号と前記エミッション信号を基準に決定されたエージング期間とプログラミング期間に複数のスイッチングトランジスタの動作によって前記第1〜第5ノードの電圧を制御し、前記プログラミング期間に引き続く発光期間に前記駆動トランジスタの閾値電圧が前記駆動トランジスタのゲートソース間の電圧に反映されるように制御する内部補償部とを含む、電界発光表示装置。 - 前記内部補償部は、
前記プログラミング期間内に第1初期化電圧とデータ電圧に基づいて前記駆動トランジスタのゲートソース間の電圧を前記閾値電圧を含む第1レベルに制御し、
前記プログラミング期間に先立つ前記エージング期間内に前記第1初期化電圧より高い第2初期化電圧に基づいて前記駆動トランジスタのゲートソース間の電圧を前記第1レベルより高い第2レベルに制御する、請求項15に記載の電界発光表示装置。 - 前記第1レベル及び前記第2レベルのゲートソース間の電圧によって前記駆動トランジスタはオン状態になり、
前記駆動トランジスタのゲートソース間の電圧は前記プログラミング期間に比べて前記エージング期間においてより高い、請求項16に記載の電界発光表示装置。 - 前記プログラミング期間は、初期化期間と、前記初期化期間に引き続くデータ書込期間とを含み、
前記内部補償部は、
前記初期化期間の間に前記第1初期化電圧が前記第1、第4及び第5ノードに印加されるように前記スイッチングトランジスタの動作を制御し、
前記データ書込期間の間に前記データ電圧が前記第2ノードに印加されるように前記スイッチングトランジスタの動作を制御する、請求項16に記載の電界発光表示装置。 - 前記内部補償部は、
前記エージング期間にオンレベルの前記第4スキャン信号によって前記第2初期化電圧を前記第4ノードに印加する第1スイッチングトランジスタT1と、
前記初期化期間にオンレベルの前記第1スキャン信号によって前記第2ノードと前記第3ノードを連結し、前記第1初期化電圧から前記駆動トランジスタの閾値電圧を差し引いた第1電圧が前記第2ノードと前記第3ノードに印加されるようにする第2スイッチングトランジスタT2と、
前記初期化期間にオンレベルの前記第1スキャン信号によって前記第1初期化電圧を前記第1ノードに印加する第4スイッチングトランジスタT4と、
前記初期化期間にオンレベルの前記第2スキャン信号によって前記第1初期化電圧を前記第5ノードに印加する第7スイッチングトランジスタT7と、
前記データ書込期間にオンレベルの前記第3スキャン信号によって前記データ電圧を前記第2ノードに印加する第3スイッチングトランジスタT3と、
前記発光期間にオンレベルの前記エミッション信号によって前記高電位ピクセル電圧の入力端子と前記第3ノードを電気的に連結する第4スイッチングトランジスタT5と、
前記発光期間にオンレベルの前記エミッション信号によって前記第4ノードと前記第5ノードを連結する第6スイッチングトランジスタT6とをさらに含む、請求項18に記載の電界発光表示装置。 - 前記内部補償部は、
前記エージング期間に先立つプリ初期化期間内に、前記第1初期化電圧が前記第1ノードに予め印加されるように前記スイッチングトランジスタの動作をさらに制御する、請求項18に記載の電界発光表示装置。
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