JP2021048231A - 半導体装置およびその製造方法 - Google Patents
半導体装置およびその製造方法 Download PDFInfo
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 117
- 238000004519 manufacturing process Methods 0.000 title claims description 23
- 239000000758 substrate Substances 0.000 claims abstract description 51
- 229910052799 carbon Inorganic materials 0.000 claims abstract description 12
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 11
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims abstract description 10
- 239000010703 silicon Substances 0.000 claims abstract description 8
- 239000012535 impurity Substances 0.000 claims description 74
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims description 54
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 52
- 238000000034 method Methods 0.000 claims description 38
- 238000010438 heat treatment Methods 0.000 claims description 32
- 229910021332 silicide Inorganic materials 0.000 claims description 15
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims description 15
- 230000003746 surface roughness Effects 0.000 claims description 8
- 229910052715 tantalum Inorganic materials 0.000 claims 1
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 claims 1
- 210000000746 body region Anatomy 0.000 abstract description 30
- 238000009792 diffusion process Methods 0.000 abstract description 27
- 239000010410 layer Substances 0.000 description 94
- 230000005684 electric field Effects 0.000 description 24
- 230000008569 process Effects 0.000 description 23
- 229910052751 metal Inorganic materials 0.000 description 17
- 239000002184 metal Substances 0.000 description 17
- 239000011229 interlayer Substances 0.000 description 15
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 11
- 239000000463 material Substances 0.000 description 11
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 10
- 238000001312 dry etching Methods 0.000 description 9
- 230000015556 catabolic process Effects 0.000 description 8
- 230000006378 damage Effects 0.000 description 8
- 230000007423 decrease Effects 0.000 description 7
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 6
- 239000013078 crystal Substances 0.000 description 6
- 230000001681 protective effect Effects 0.000 description 6
- 229910052814 silicon oxide Inorganic materials 0.000 description 6
- 239000010936 titanium Substances 0.000 description 6
- 229910052782 aluminium Inorganic materials 0.000 description 5
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 5
- 230000004888 barrier function Effects 0.000 description 5
- 230000007547 defect Effects 0.000 description 5
- 238000005530 etching Methods 0.000 description 5
- 229910052757 nitrogen Inorganic materials 0.000 description 5
- 230000007480 spreading Effects 0.000 description 5
- 238000003892 spreading Methods 0.000 description 5
- 238000004544 sputter deposition Methods 0.000 description 5
- 239000002344 surface layer Substances 0.000 description 5
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 4
- 239000011261 inert gas Substances 0.000 description 4
- 229910052759 nickel Inorganic materials 0.000 description 4
- PEUPIGGLJVUNEU-UHFFFAOYSA-N nickel silicon Chemical compound [Si].[Ni] PEUPIGGLJVUNEU-UHFFFAOYSA-N 0.000 description 4
- 229910052719 titanium Inorganic materials 0.000 description 4
- 238000005229 chemical vapour deposition Methods 0.000 description 3
- 150000001875 compounds Chemical class 0.000 description 3
- 239000010931 gold Substances 0.000 description 3
- 230000003647 oxidation Effects 0.000 description 3
- 238000007254 oxidation reaction Methods 0.000 description 3
- 229920001721 polyimide Polymers 0.000 description 3
- 238000001039 wet etching Methods 0.000 description 3
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- QAOWNCQODCNURD-UHFFFAOYSA-N Sulfuric acid Chemical compound OS(O)(=O)=O QAOWNCQODCNURD-UHFFFAOYSA-N 0.000 description 2
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 2
- 230000000903 blocking effect Effects 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 230000012447 hatching Effects 0.000 description 2
- 238000005468 ion implantation Methods 0.000 description 2
- 230000003071 parasitic effect Effects 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- 230000002040 relaxant effect Effects 0.000 description 2
- 239000002356 single layer Substances 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000001747 exhibiting effect Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 229910021389 graphene Inorganic materials 0.000 description 1
- 229910010272 inorganic material Inorganic materials 0.000 description 1
- 239000011147 inorganic material Substances 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 239000011368 organic material Substances 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 238000005192 partition Methods 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 235000012431 wafers Nutrition 0.000 description 1
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Abstract
Description
<半導体装置の構造>
図1は、実施の形態1の半導体装置である半導体チップ1の平面図である。また、図1には、半導体チップ1の主要な半導体素子が形成されるアクティブ領域6の一部を拡大した平面図も示されている。
以下に図5〜図8を用いて、実施の形態1における半導体装置の構造の主な特徴を説明する。なお、ここで説明する構造は、後述する熱処理後の構造である。この熱処理については、図9の大工程P4および図16〜図19において後で詳細に説明する。
以下に図9〜図25を用いて、実施の形態1における半導体装置の製造方法を説明する。図9は、半導体装置の製造方法の概略を説明する大工程図である。以下では、主に図2に示されるA−A線に沿った断面図を用いて説明するが、必要に応じてB−B線に沿った断面図を用いることもある。
図9の大工程P1について説明する。大工程P1は、主に、n−型のエピタキシャル層12の形成工程である。
図9の大工程P2について説明する。大工程P2は、主に、イオン注入による各不純物領域の形成工程である。
図9の大工程P3について説明する。大工程P3は、主に、トレンチTRの形成工程である。
図9の大工程P4について説明する。大工程P4は、容器CSを用いた熱処理工程である。
式2: 2SiC(s) → Si(v)II+SiC2(v)
式3: TaXSiY(s) → TaXSiY−1(s)+Si(v)III
式4: SiC(s)+Si(v)I+Si(v)II+Si(v)III → Si2C(v)
式5: C(s)I+Si(v)I+Si(v)II+Si(v)III → Si2C(v)
このように、容器CSを用いた熱処理によって、n−型のエピタキシャル層12の表層は、上述の図5に示されるようにSiリッチとなり、平坦化される。また、トレンチTRのコーナー部がラウンディングされる。また、n型の半導体基板11またはn−型のエピタキシャル層12に注入されている各イオンが、活性化される。トレンチTRの形成時におけるドライエッチング処理によって、n−型のエピタキシャル層12の表層にはダメージが加えられ、そのようなダメージは結晶欠陥の原因となる。しかし、熱処理によって、そのような結晶欠陥も回復される。実施の形態1では、これらの効果を、一度の熱処理で得ることができる。
図9の大工程P5について説明する。大工程P5は、主に、ゲート絶縁膜22およびゲート電極23の形成工程である。
図9の大工程P6について説明する。大工程P5は、主に、ソース配線用電極2などの各配線用電極の形成工程である。
2 ソース配線用電極
2a ソースパッド
3 ゲート配線用電極
3a ゲートパッド
4 n++型のガードリング
5 p−型のフローティング・フィールド・リミッティング・リング(FLR)
6 アクティブ領域
11 n型の半導体基板
12 n−型のエピタキシャル層
13 n+型のドレイン領域
14 p+型のボディ領域
15 n型のJFET領域
16 n+型の電流拡散領域
17 n+型の電流拡散領域
18 p+型の電界緩和領域
19 p+型の電界緩和領域
20 n++型のソース領域
21 p++型のボディ電位固定領域
22 ゲート絶縁膜
23 ゲート電極
23a 導電性膜
24 層間絶縁膜
25 シリサイド層
26 シリサイド層
27 ドレイン配線用電極
B1、B2 底面
BZ ベゼル
CS 容器
CSa、CSb 収容部
DL ダメージ層
IS 内部空間
MP1〜MP7 マスクパターン
OP 開口部
P1〜P6 大工程
S1〜S4 側面
SS 基板支持部
T1、T2 上面
TR トレンチ
Claims (11)
- 炭化珪素からなる第1導電型の半導体基板と、
前記半導体基板上に形成され、且つ、炭化珪素からなる前記第1導電型の第1半導体層と、
前記第1半導体層内に形成され、且つ、前記第1導電型と反対の第2導電型の第1不純物領域と、
前記第1不純物領域内に形成され、且つ、前記第1半導体層よりも高い不純物濃度を有する前記第1導電型の第2不純物領域および前記第1導電型の第3不純物領域と、
前記第2不純物領域および前記第3不純物領域を貫通するように形成されたトレンチと、
前記トレンチ内に、ゲート絶縁膜を介して形成されたゲート電極と、
を有し、
前記トレンチは、前記第1不純物領域内に位置する底面、前記第2不純物領域に接する第1側面、および、前記第3不純物領域に接し、且つ、前記第1側面と対向する第2側面を含み、
前記トレンチの外部における前記第1半導体層の上面、前記トレンチの底面、前記第1側面および前記第2側面において、シリコンの比率は炭素の比率よりも高く、
前記第1側面側の前記第1半導体層の上面が前記第1側面に対して傾いている角度θ1は、前記第2側面側の前記第1半導体層の上面が前記第2側面に対して傾いている角度θ2よりも小さい、半導体装置。 - 請求項1に記載の半導体装置において、
前記角度θ1および前記角度θ2は、80度以上、100度以下の範囲内である、半導体装置。 - 請求項1に記載の半導体装置において、
前記第1半導体層の上面または前記トレンチの底面の表面粗さは、1nm以下である、半導体装置。 - 請求項3に記載の半導体装置において、
前記第1側面または前記第2側面の表面粗さは、1.5nm以下である、半導体装置。 - 請求項1に記載の半導体装置において、
前記トレンチの平面形状は、四角形よりも多くの角を有する多角形である、半導体装置。 - 請求項1に記載の半導体装置において、
前記第1半導体層の上面または前記トレンチの底面と、前記第1半導体層の<0001>方向と成す角度θ3は、88〜92度である、半導体装置。 - 請求項1に記載の半導体装置において、
前記トレンチの底面と前記第1側面とから構成される第1コーナー部の曲率半径φ1は、100〜500nmである、半導体装置。 - 請求項7に記載の半導体装置において、
前記第1半導体層の上面と前記第1側面とから構成される第2コーナー部の曲率半径φ2は、100〜500nmである、半導体装置。 - 請求項1に記載の半導体装置において、
前記第1不純物領域は、MISFETのチャネル領域を構成し、
前記第2不純物領域は、前記MISFETのソース領域の一部を構成し、
前記第3不純物領域は、前記MISFETのドレイン領域の一部を構成している、半導体装置。 - 請求項8に記載の半導体装置において、
前記第2不純物領域の上部には、前記第1不純物領域よりも高い不純物濃度を有する前記第2導電型の第4不純物領域が形成され、
前記第3不純物領域の上部には、前記第1不純物領域よりも高い不純物濃度を有する前記第2導電型の第5不純物領域が形成されている、半導体装置。 - (a)第1導電型のエピタキシャル層が形成された前記第1導電型の半導体基板を用意する工程、
(b)前記エピタキシャル層内に、前記第1導電型と反対の第2導電型の第1不純物領域を形成する工程、
(c)前記第1不純物領域内に、それぞれ前記エピタキシャル層よりも高い不純物濃度を有する前記第1導電型の第2不純物領域および前記第1導電型の第3不純物領域を形成する工程、
(d)前記第2不純物領域および前記第3不純物領域を貫通するように、前記第1不純物領域内に位置する底面、前記第2不純物領域に接する第1側面、および、前記第1側面と対向し、且つ、前記第3不純物領域に接する第2側面を有するトレンチを形成する工程、
(e)前記(d)工程後、前記エピタキシャル層に対して熱処理を施す工程、
(f)前記(e)工程後、トレンチ内に、ゲート絶縁膜を形成する工程、
(g)前記トレンチ内を埋め込むように、前記ゲート絶縁膜上に、ゲート電極を形成する工程、
を有し、
前記(e)工程における前記熱処理は、タンタルシリサイド層を含む容器に前記半導体基板を収容した状態で行われ、1500℃以上、2200℃以下の条件で行われる、半導体装置の製造方法。
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