JP2021034506A - 半導体装置及びインバータ - Google Patents
半導体装置及びインバータ Download PDFInfo
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- JP2021034506A JP2021034506A JP2019151898A JP2019151898A JP2021034506A JP 2021034506 A JP2021034506 A JP 2021034506A JP 2019151898 A JP2019151898 A JP 2019151898A JP 2019151898 A JP2019151898 A JP 2019151898A JP 2021034506 A JP2021034506 A JP 2021034506A
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Abstract
Description
図1は、実施の形態1に係る半導体装置のエミッタ側主面の平面図である。半導体基体1は、半導体基板の上に半導体層をエピタキシャル成長したものであり、互いに反対側のエミッタ側主面とコレクタ側主面を有する。半導体基体1のエミッタ側主面には、エミッタ電極2とゲート電極パッド3を有するエミッタ側IGBT領域と、エミッタ側IGBT領域を取り囲む外周領域が形成されている。エミッタ電極2はゲート電極パッド3の三辺を取り囲むように配置されている。外周領域には外周耐電圧保持構造4が形成されている。
図6は、実施の形態2に係る半導体装置のエミッタ主面側の平面図である。図7は、実施の形態2に係る半導体装置のコレクタ側主面の平面図である。実施の形態1とはコントロールゲート電極パッド6のサイズと配置が異なる。コントロールゲート電極パッド6のサイズは1.2mm×1.5mmの長方形であり、長方形の一辺がチップ外周端に位置している。
図8は、実施の形態3に係るインバータを示す図である。AC−DCコンバータ100が電源101の交流電力を直流電力に変換する。AC−DCコンバータ100はダイオードD1,D2,D3,D4と電源平滑コンデンサC1を有する。DC−ACインバータ102がAC−DCコンバータ100から出力された直流電力を交流電力に変換してモータ103のコイルに供給する。DC−ACインバータ102は、IGBTなどのスイッチング素子Q1〜Q6と、それらに逆並列に接続されたフリーホイールダイオードD5〜D10とを有する。駆動回路104がスイッチング素子Q1〜Q6を駆動する。駆動回路104は信号処理部105と出力部106を有する。信号処理部105は、マイコン107と、マイコン107からの信号を処理する信号処理回路105a〜105fとを有する。出力部106は、信号処理回路105a〜105fからの制御信号をそれぞれスイッチング素子Q1〜Q6に出力する出力回路106a〜106fを有する。スイッチング素子Q1〜Q6として実施の形態1または2の半導体装置を用いることで熱破壊の発生リスクを軽減することができるため、信頼性の高いインバータを得ることができる。
Claims (11)
- 互いに反対側の第1の主面と第2の主面を有する半導体基体と、
前記第1の主面に形成され、前記半導体基体に電気的に接続された第1の主電極と、
前記第1の主面に形成され、前記半導体基体との間に第1の絶縁膜が介在している第1の制御電極パッドと、
前記第1の主面において前記第1の主電極と前記第1の制御電極パッドを取り囲む外周領域に形成された外周耐電圧保持構造と、
前記第2の主面に形成され、前記半導体基体に電気的に接続された第2の主電極と、
前記第2の主面に形成され、前記半導体基体との間に第2の絶縁膜が介在している第2の制御電極パッドとを備え、
前記第2の制御電極パッドは前記第2の主電極に取り囲まれていることを特徴とする半導体装置。 - 前記第2の制御電極パッドに対向する前記第1の主面の領域は前記外周領域ではないことを特徴とする請求項1に記載の半導体装置。
- 前記第2の制御電極パッドに対向する前記第1の主面の領域は前記第1の主電極の形成領域であることを特徴とする請求項2に記載の半導体装置。
- 前記第2の制御電極パッドの一辺以外が前記第2の主電極に取り囲まれていることを特徴とする請求項1に記載の半導体装置。
- 前記外周耐電圧保持構造に対向する前記第2の主面の領域に前記第2の主電極が配置されていることを特徴とする請求項1〜4の何れか1項に記載の半導体装置。
- 前記第2の制御電極パッドにボンディングワイヤが接合されていることを特徴とする請求項1〜5の何れか1項に記載の半導体装置。
- 前記第1の制御電極パッドと前記第2の制御電極パッドは互いに対向する領域に配置されていないことを特徴とする請求項1〜6の何れか1項に記載の半導体装置。
- 前記半導体基体に形成されたトランジスタを更に備えることを特徴とする請求項1〜7の何れか1項に記載の半導体装置。
- 前記トランジスタは、
前記第2の主電極に電気的に接続された第1導電型のコレクタ層と、
前記コレクタ層の上に形成された第2導電型のドリフト層と、
前記ドリフト層の上に形成された第1導電型のベース層と、
前記ベース層を貫通する第1のトレンチと、
前記第1のトレンチ内に前記第1の絶縁膜を介して形成され、前記第1の制御電極パッドに電気的に接続されたゲート電極と、
前記ベース層において前記第1のトレンチの側面に形成され、前記第1の主電極に電気的に接続された第2導電型のエミッタ領域と、
前記コレクタ層に形成された第2のトレンチと、
前記第2のトレンチ内に前記第2の絶縁膜を介して形成され、前記第2の制御電極パッドに電気的に接続されたコントロールゲート電極とを有することを特徴とする請求項8に記載の半導体装置。 - 前記半導体基体はワイドバンドギャップ半導体によって形成されていることを特徴とする請求項1〜9の何れか1項に記載の半導体装置。
- 請求項1〜10の何れか1項に記載の半導体装置をスイッチング素子として用いたことを特徴とするインバータ。
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