JP2016143786A - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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Abstract
Description
図1(a)は、第1実施形態に係る半導体装置の要部を表す模式的断面図であり、図1(c)のA−A’線に沿った位置での模式的断面図である。図1(b)は、第1実施形態に係る半導体装置の要部を表す模式的断面図であり、図1(c)のB−B’線に沿った位置での模式的断面図である。図1(c)は、第1実施形態に係る半導体装置を表す模式的平面図である。図1(b)は、図1(a)の破線B''の線に沿った位置での模式的断面図にも対応している。図1(a)には、第1実施形態に係る半導体装置1AのY−Z平面における断面が表され、図1(b)には、半導体装置1AのX−Z平面における断面が表されている。
従って、絶縁膜53の角部53cに集中する電界は、絶縁膜51の角部51cに集中する電界に比べて緩和される。これにより、アバランシェ降伏は、絶縁膜53の角部53c近傍よりも、ゲート電極50に接した絶縁膜51の角部51c近傍で起き易くなる。
図7は、第1実施形態の変形例に係る半導体装置の要部を表す模式的断面図である。
図8(a)は、第2実施形態に係る半導体装置の要部を表す模式的断面図であり、図8(b)は、第2実施形態に係る半導体装置の要部を表す模式的断面図である。図8(b)は、図8(a)の破線B''の線に沿った位置での模式的断面図に対応している。
半導体装置2Aにおいても、終端領域91近傍の素子領域90bと終端領域91との間でホットスポットの移動の繰り返しが起こり得る。
図9は、第2実施形態の変形例に係る半導体装置の要部を表す模式的断面図である。
図10(a)は、第3実施形態の第1例に係る半導体装置の要部を表す模式的断面図であり、図10(b)は、第3実施形態の第2例に係る半導体装置の要部を表す模式的断面図である。
図11(a)は、第4実施形態に係る半導体装置の要部を表す模式的断面図である。図11(b)は、図11(a)のC−C’線に沿った位置での模式的平面図である。
また、半導体装置4は、半導体領域20とドレイン電極10との間にp+形のコレクタ領域23を設け、IGBTとしてもよい。
図12(a)は、第5実施形態に係る半導体装置の要部を表す模式的断面図である。図12(b)は、図12(a)のC−C’線に沿った位置での模式的平面図である。
Claims (6)
- 素子領域と、前記素子領域を囲む終端領域と、を備え、
第1導電形の第1半導体領域と、
前記第1半導体領域の上に設けられた第2導電形の第2半導体領域と、
前記第2半導体領域の上に設けられた第1導電形の第3半導体領域と、
前記第1半導体領域に電気的に接続された第1電極と、
前記第3半導体領域に電気的に接続された第2電極と、
前記素子領域に設けられ、前記第1半導体領域、前記第2半導体領域、および前記第3半導体領域に第1絶縁膜を介して向かい合う第3電極と、
前記素子領域に設けられ、前記第3電極よりも前記終端領域の側に設けられ、前記第1半導体領域、前記第2半導体領域、および前記第3半導体領域に第2絶縁膜を介して向かい合い、下端と前記第1電極との間の第1距離が前記第3電極の下端と前記第1電極との間の第2距離よりも長い第4電極と、
を有する半導体装置。 - 前記第3電極は、複数設けられ、
前記第4電極は、複数設けられ、
前記第1距離は、前記素子領域から前記終端領域に向かうにつれて長くなっている請求項1に記載の半導体装置。 - 前記第3電極において、前記第3電極の端部と前記第1半導体領域の下面との間の距離が選択的に長くなっている請求項1または2に記載の半導体装置。
- 素子領域と、前記素子領域を囲む終端領域と、を備え、
第1導電形の第1半導体領域と、
前記第1半導体領域の上に設けられた第2導電形の第2半導体領域と、
前記第2半導体領域の上に設けられた第1導電形の第3半導体領域と、
前記第1半導体領域に電気的に接続された第1電極と、
前記第3半導体領域に電気的に接続された第2電極と、
前記素子領域に設けられ、前記第1半導体領域、前記第2半導体領域、および前記第3半導体領域に第1絶縁膜を介して向かい合う第3電極と、
前記素子領域に設けられ、前記第3電極よりも前記終端領域の側に設けられ、前記第1半導体領域、前記第2半導体領域、および前記第3半導体領域に第2絶縁膜を介して向かい合う第4電極と、
前記第1半導体領域および前記第3電極に、前記第1絶縁膜を介して向かい合う第5電極と、
前記第1半導体領域および前記第4電極に、前記第2絶縁膜を介して向かい合い、下端と前記第1電極との間の第3距離が前記第5電極の下端と前記第1電極との間の第4距離よりも短い第6電極と、
を有する半導体装置。 - 前記第5電極は、複数設けられ、
前記第6電極は、複数設けられ、
前記第3距離は、前記素子領域から前記終端領域に向かうにつれて短くなっている請求項4に記載の半導体装置。 - 前記第5電極において、前記第5電極の端部と前記第1半導体領域の下面との間の距離が選択的に短くなっている請求項4または5に記載の半導体装置。
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JP2021082839A (ja) * | 2021-02-25 | 2021-05-27 | 三菱電機株式会社 | 半導体スイッチング素子及びその製造方法 |
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