JP2016122802A - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP2016122802A JP2016122802A JP2014263487A JP2014263487A JP2016122802A JP 2016122802 A JP2016122802 A JP 2016122802A JP 2014263487 A JP2014263487 A JP 2014263487A JP 2014263487 A JP2014263487 A JP 2014263487A JP 2016122802 A JP2016122802 A JP 2016122802A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- wiring
- deletion
- core layer
- ball
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 93
- 238000012217 deletion Methods 0.000 claims abstract description 78
- 230000037430 deletion Effects 0.000 claims abstract description 78
- 229910000679 solder Inorganic materials 0.000 claims abstract description 43
- 239000012792 core layer Substances 0.000 claims abstract description 33
- 239000004020 conductor Substances 0.000 claims abstract description 25
- 239000010410 layer Substances 0.000 claims abstract description 23
- 230000000149 penetrating effect Effects 0.000 claims abstract description 4
- 239000000758 substrate Substances 0.000 claims description 21
- 238000007789 sealing Methods 0.000 claims description 7
- 238000007747 plating Methods 0.000 description 30
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 7
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 238000009713 electroplating Methods 0.000 description 4
- 239000010931 gold Substances 0.000 description 4
- 229910052737 gold Inorganic materials 0.000 description 4
- 229910052759 nickel Inorganic materials 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- 239000010949 copper Substances 0.000 description 3
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 2
- 239000012790 adhesive layer Substances 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
- 239000003822 epoxy resin Substances 0.000 description 2
- 230000012447 hatching Effects 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 229920000647 polyepoxide Polymers 0.000 description 2
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 1
- 239000000654 additive Substances 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000012141 concentrate Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 238000005336 cracking Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 150000002815 nickel Chemical class 0.000 description 1
- 239000004033 plastic Substances 0.000 description 1
- 230000002265 prevention Effects 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 238000009751 slip forming Methods 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 239000011800 void material Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49838—Geometry or layout
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
- H01L23/3128—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49805—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers the leads being also applied on the sidewalls or the bottom of the substrate, e.g. leadless packages for surface mounting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
- H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45147—Copper (Cu) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48095—Kinked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48105—Connecting bonding areas at different heights
- H01L2224/48106—Connecting bonding areas at different heights the connector being orthogonal to a side surface of the semiconductor or solid-state body, e.g. parallel layout
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/85399—Material
- H01L2224/854—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/85438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/85444—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/85399—Material
- H01L2224/854—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/85438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/85455—Nickel (Ni) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01028—Nickel [Ni]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/06—Polymers
- H01L2924/0665—Epoxy resin
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/1015—Shape
- H01L2924/1016—Shape being a cuboid
- H01L2924/10161—Shape being a cuboid with a rectangular active surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/10251—Elemental semiconductors, i.e. Group IV
- H01L2924/10253—Silicon [Si]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1517—Multilayer substrate
- H01L2924/15182—Fan-in arrangement of the internal vias
- H01L2924/15183—Fan-in arrangement of the internal vias in a single layer of the multilayer substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/157—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2924/15738—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950 C and less than 1550 C
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/1579—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
- H01L2924/186—Material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
- H01L2924/3512—Cracking
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Geometry (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Wire Bonding (AREA)
Abstract
Description
本願において、実施の態様の記載は、必要に応じて、便宜上複数のセクション等に分けて記載するが、特にそうでない旨明示した場合を除き、これらは相互に独立別個のものではなく、記載の前後を問わず、単一の例の各部分、一方が他方の一部詳細または一部または全部の変形例等である。また、原則として、同様の部分は繰り返しの説明を省略する。また、実施の態様における各構成要素は、特にそうでない旨明示した場合、理論的にその数に限定される場合および文脈から明らかにそうでない場合を除き、必須のものではない。
本実施の形態は、BGA型の半導体装置(半導体集積回路装置)に適用したものであり、図1は、本実施の形態の半導体装置の要部断面図、図2は、本実施の形態の半導体装置の要部平面図、図3および図4は、図2のA部の要部拡大平面図である。図5は、図3の上面配線の要部拡大図であり、図6は、本実施の形態の半導体装置の要部平面図であって、半導体チップと削除部の配置を示す平面図である。
2 ボンディングパッド
10 配線基板
11 コア層
12 上面配線
12A ボンディングランド
12B めっき引出線
12E めっき給電線
12F 細線部
12G 太線部
13 下面配線
13A、13B ボールランド
13C 引き出し線
13D 繋ぎ線
14 ビア
14A ビア導体層
15 ソルダーレジスト膜
16、16a、16b、16c、16d 削除部
17 ワイヤ
18 封止体
19 接着層
20、20A、20B、20C 半田ボール
Claims (11)
- 上面と下面を有するコア層と、前記コア層の前記下面に形成された複数のボールランドと、前記コア層の前記下面を覆うソルダーレジスト膜と、前記コア層を貫通し、前記ボールランドに接続されたビア導体層と、前記コア層の前記上面に形成され、一端にボンディングランドを有し、他端が前記ビア導体層に接続された上面配線と、を有する配線基板と、
前記配線基板の上に配置され、ボンディングパッドを有する半導体チップと、
前記ボンディングパッドと前記ボンディングランドとを接続するワイヤと、
前記半導体チップと前記ワイヤを封止する封止体と、
前記ボールランドに接続された半田ボールと、
を有し、
前記ソルダーレジスト膜は、前記コア層の前記下面を露出する削除部を有し、
前記上面配線は、第1の配線幅を有する細線部と、前記第1の配線幅よりも大きい第2の配線幅を有する太線部と、を有し、平面視において、前記太線部が前記削除部と重なる、半導体装置。 - 請求項1に記載の半導体装置において、
前記削除部は、角部が円弧状となった略四角形である、半導体装置。 - 請求項1に記載の半導体装置において、
前記削除部は、円形である、半導体装置。 - 請求項1に記載の半導体装置において、
前記上面配線の延在方向において、前記上面配線の前記太線部が、前記削除部を横断する、半導体装置。 - 請求項1に記載の半導体装置において、
前記削除部は、平面視において、前記半導体チップと重なっている、半導体装置。 - 上面と下面を有するコア層と、前記コア層の前記下面に形成された複数のボールランドと、前記コア層の前記下面を覆うソルダーレジスト膜と、前記コア層を貫通し、前記ボールランドに接続されたビア導体層と、前記コア層の前記上面に形成され、一端にボンディングランドを有し、他端が前記ビア導体層に接続された第1および第2の上面配線と、を有する配線基板と、
前記配線基板の上に配置され、第1辺、第2辺、第3辺、および、第4辺を有する四角形の主面に形成されたボンディングパッドを有する半導体チップと、
前記ボンディングパッドと前記ボンディングランドとを接続するワイヤと、
前記半導体チップと前記ワイヤを封止する封止体と、
前記ボールランドに接続された半田ボールと、
を有し、
前記ソルダーレジスト膜は、前記コア層の前記下面を露出する第1および第2の削除部を有し、
前記第1の上面配線は、前記第1の削除部を横断して延在し、前記第2の上面配線は前記第2の削除部を横断して延在し、
前記第1の削除部と前記第2の削除部とは、前記半導体チップの前記第1辺に沿って、前記第1辺の延在方向に並んで配置されている、半導体装置。 - 請求項6に記載の半導体装置において、
前記第1辺の延在方向において、前記第1の削除部の幅は、前記第1の削除部と前記第2の削除部の間隔より小である、半導体装置。 - 請求項6に記載の半導体装置において、
前記第1辺から前記第1の削除部までの距離は、前記第1辺から前記第2の削除部までの距離より小である、半導体装置。 - 請求項6に記載の半導体装置において、
前記第1の削除部と前記第2の削除部は、平面視において、前記半導体チップと重なっている、半導体装置。 - 請求項6に記載の半導体装置において、
前記第1の削除部および前記第2の削除部は、角部が円弧状となった略四角形である、半導体装置。 - 請求項6に記載の半導体装置において、
前記第1の上面配線は、第1の配線幅を有する細線部と、前記第1の配線幅よりも大きい第2の配線幅を有する太線部と、を有し、平面視において、前記太線部が前記第1の削除部を横断する、半導体装置。
Priority Applications (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2014263487A JP2016122802A (ja) | 2014-12-25 | 2014-12-25 | 半導体装置 |
CN201520997866.4U CN205488117U (zh) | 2014-12-25 | 2015-12-04 | 半导体装置 |
CN201510883645.9A CN105742267A (zh) | 2014-12-25 | 2015-12-04 | 半导体装置 |
US14/972,185 US9589882B2 (en) | 2014-12-25 | 2015-12-17 | Semiconductor device |
HK16111897.3A HK1223732A1 (zh) | 2014-12-25 | 2016-10-14 | 半導體裝置 |
US15/411,582 US9991195B2 (en) | 2014-12-25 | 2017-01-20 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2014263487A JP2016122802A (ja) | 2014-12-25 | 2014-12-25 | 半導体装置 |
Publications (1)
Publication Number | Publication Date |
---|---|
JP2016122802A true JP2016122802A (ja) | 2016-07-07 |
Family
ID=56165084
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2014263487A Pending JP2016122802A (ja) | 2014-12-25 | 2014-12-25 | 半導体装置 |
Country Status (4)
Country | Link |
---|---|
US (2) | US9589882B2 (ja) |
JP (1) | JP2016122802A (ja) |
CN (2) | CN205488117U (ja) |
HK (1) | HK1223732A1 (ja) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2016122802A (ja) * | 2014-12-25 | 2016-07-07 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
KR102009905B1 (ko) | 2017-02-21 | 2019-08-12 | 삼성전자주식회사 | 팬-아웃 반도체 패키지 |
JP2018186197A (ja) * | 2017-04-26 | 2018-11-22 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
FR3069128B1 (fr) * | 2017-07-13 | 2020-06-26 | Safran Electronics & Defense | Fixation d'un cms sur une couche isolante avec un joint de brasure dans une cavite realisee dans une couche isolante |
KR101883108B1 (ko) | 2017-07-14 | 2018-07-27 | 삼성전기주식회사 | 팬-아웃 반도체 패키지 |
JP2023036447A (ja) * | 2021-09-02 | 2023-03-14 | 新電元工業株式会社 | リードフレーム一体型基板、半導体装置、リードフレーム一体型基板の製造方法、及び半導体装置の製造方法 |
Citations (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11163201A (ja) * | 1997-11-28 | 1999-06-18 | Hitachi Ltd | 半導体装置 |
JP2002164385A (ja) * | 2000-11-24 | 2002-06-07 | Oki Electric Ind Co Ltd | 半導体装置を実装する実装基板および実装構造 |
JP2005050831A (ja) * | 2003-07-28 | 2005-02-24 | Kyocera Corp | 電子部品搭載用基板 |
JP2005079129A (ja) * | 2003-08-28 | 2005-03-24 | Sumitomo Metal Electronics Devices Inc | プラスチックパッケージ及びその製造方法 |
JP2006140512A (ja) * | 2005-12-14 | 2006-06-01 | Oki Electric Ind Co Ltd | 半導体装置 |
US20070292993A1 (en) * | 2006-06-14 | 2007-12-20 | Tetsuhara Tanoue | Manufacturing Method of Semiconductor Device |
JP2009147270A (ja) * | 2007-12-18 | 2009-07-02 | Nec Electronics Corp | 配線基板の製造方法、配線基板、および半導体装置 |
WO2013057867A1 (ja) * | 2011-10-21 | 2013-04-25 | パナソニック株式会社 | 半導体装置 |
JP2013183002A (ja) * | 2012-03-01 | 2013-09-12 | Ibiden Co Ltd | 電子部品 |
JP2014082299A (ja) * | 2012-10-16 | 2014-05-08 | Renesas Electronics Corp | 半導体集積回路装置 |
JP2014130953A (ja) * | 2012-12-28 | 2014-07-10 | Kyocer Slc Technologies Corp | 配線基板 |
Family Cites Families (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4437141A (en) * | 1981-09-14 | 1984-03-13 | Texas Instruments Incorporated | High terminal count integrated circuit device package |
JP2891665B2 (ja) * | 1996-03-22 | 1999-05-17 | 株式会社日立製作所 | 半導体集積回路装置およびその製造方法 |
US6064113A (en) * | 1998-01-13 | 2000-05-16 | Lsi Logic Corporation | Semiconductor device package including a substrate having bonding fingers within an electrically conductive ring surrounding a die area and a combined power and ground plane to stabilize signal path impedances |
JP3651413B2 (ja) * | 2001-05-21 | 2005-05-25 | 日立電線株式会社 | 半導体装置用テープキャリア及びそれを用いた半導体装置、半導体装置用テープキャリアの製造方法及び半導体装置の製造方法 |
JP2004071838A (ja) * | 2002-08-06 | 2004-03-04 | Renesas Technology Corp | 半導体装置 |
US6897555B1 (en) * | 2003-07-23 | 2005-05-24 | Lsi Logic Corporation | Integrated circuit package and method for a PBGA package having a multiplicity of staggered power ring segments for power connection to integrated circuit die |
JP4308608B2 (ja) * | 2003-08-28 | 2009-08-05 | 株式会社ルネサステクノロジ | 半導体装置 |
JP2006202991A (ja) * | 2005-01-20 | 2006-08-03 | Sony Corp | 回路基板及びその製造方法、並びに半導体パッケージ及びその製造方法 |
JP2006344824A (ja) * | 2005-06-09 | 2006-12-21 | Nec Electronics Corp | 半導体装置および半導体装置の製造方法 |
US7884481B2 (en) * | 2007-08-02 | 2011-02-08 | Mediatek Inc. | Semiconductor chip package and method for designing the same |
JP5378707B2 (ja) * | 2008-05-29 | 2013-12-25 | ルネサスエレクトロニクス株式会社 | 半導体装置及びその製造方法 |
JP2010093109A (ja) * | 2008-10-09 | 2010-04-22 | Renesas Technology Corp | 半導体装置、半導体装置の製造方法および半導体モジュールの製造方法 |
KR101767108B1 (ko) * | 2010-12-15 | 2017-08-11 | 삼성전자주식회사 | 하이브리드 기판을 구비하는 반도체 패키지 및 그 제조방법 |
JP5503567B2 (ja) * | 2011-01-26 | 2014-05-28 | 株式会社日立製作所 | 半導体装置および半導体装置実装体 |
JP6029873B2 (ja) * | 2012-06-29 | 2016-11-24 | 新光電気工業株式会社 | 配線基板、配線基板の製造方法及び半導体装置の製造方法 |
JP2016122802A (ja) * | 2014-12-25 | 2016-07-07 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
-
2014
- 2014-12-25 JP JP2014263487A patent/JP2016122802A/ja active Pending
-
2015
- 2015-12-04 CN CN201520997866.4U patent/CN205488117U/zh not_active Expired - Fee Related
- 2015-12-04 CN CN201510883645.9A patent/CN105742267A/zh not_active Withdrawn
- 2015-12-17 US US14/972,185 patent/US9589882B2/en active Active
-
2016
- 2016-10-14 HK HK16111897.3A patent/HK1223732A1/zh unknown
-
2017
- 2017-01-20 US US15/411,582 patent/US9991195B2/en active Active
Patent Citations (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11163201A (ja) * | 1997-11-28 | 1999-06-18 | Hitachi Ltd | 半導体装置 |
JP2002164385A (ja) * | 2000-11-24 | 2002-06-07 | Oki Electric Ind Co Ltd | 半導体装置を実装する実装基板および実装構造 |
JP2005050831A (ja) * | 2003-07-28 | 2005-02-24 | Kyocera Corp | 電子部品搭載用基板 |
JP2005079129A (ja) * | 2003-08-28 | 2005-03-24 | Sumitomo Metal Electronics Devices Inc | プラスチックパッケージ及びその製造方法 |
JP2006140512A (ja) * | 2005-12-14 | 2006-06-01 | Oki Electric Ind Co Ltd | 半導体装置 |
US20070292993A1 (en) * | 2006-06-14 | 2007-12-20 | Tetsuhara Tanoue | Manufacturing Method of Semiconductor Device |
JP2007335581A (ja) * | 2006-06-14 | 2007-12-27 | Renesas Technology Corp | 半導体装置の製造方法 |
JP2009147270A (ja) * | 2007-12-18 | 2009-07-02 | Nec Electronics Corp | 配線基板の製造方法、配線基板、および半導体装置 |
WO2013057867A1 (ja) * | 2011-10-21 | 2013-04-25 | パナソニック株式会社 | 半導体装置 |
JP2013183002A (ja) * | 2012-03-01 | 2013-09-12 | Ibiden Co Ltd | 電子部品 |
JP2014082299A (ja) * | 2012-10-16 | 2014-05-08 | Renesas Electronics Corp | 半導体集積回路装置 |
JP2014130953A (ja) * | 2012-12-28 | 2014-07-10 | Kyocer Slc Technologies Corp | 配線基板 |
Also Published As
Publication number | Publication date |
---|---|
US9589882B2 (en) | 2017-03-07 |
US20160190058A1 (en) | 2016-06-30 |
HK1223732A1 (zh) | 2017-08-04 |
US20170133312A1 (en) | 2017-05-11 |
CN205488117U (zh) | 2016-08-17 |
CN105742267A (zh) | 2016-07-06 |
US9991195B2 (en) | 2018-06-05 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP2016122802A (ja) | 半導体装置 | |
US9196577B2 (en) | Semiconductor packaging arrangement | |
JP4774248B2 (ja) | 半導体装置 | |
JP2015088576A (ja) | 半導体装置および半導体装置の製造方法 | |
JP2011129875A (ja) | 半導体装置及びそのリードフレーム | |
KR20150130660A (ko) | 반도체 패키지 및 그의 제조 방법 | |
JP2016213308A (ja) | プリント回路板及びプリント配線板 | |
US20180308833A1 (en) | Semiconductor device | |
JP2013149797A (ja) | 半導体パッケージ | |
US20140239493A1 (en) | Semiconductor chip and semiconductor device | |
JP2017034187A (ja) | 半導体装置 | |
TW201448140A (zh) | 具金屬柱組之基板及具金屬柱組之封裝結構 | |
JP5885545B2 (ja) | 樹脂封止型パワーモジュール | |
JP2005026679A (ja) | 半導体装置 | |
JP2009071253A (ja) | アイソレータ | |
JP2011100987A (ja) | 配線基板 | |
KR20070014015A (ko) | 반도체 장치 | |
US9418960B2 (en) | Semiconductor chip and semiconductor package | |
JP2011222901A (ja) | 半導体装置 | |
JP2008177424A (ja) | 半導体装置 | |
JP2007149809A (ja) | 半導体装置およびその製造方法 | |
TW201601604A (zh) | 線路結構及其製法 | |
JP2013187266A (ja) | リードフレーム及び半導体モジュール | |
JP2022165445A (ja) | 半導体装置 | |
JP6254807B2 (ja) | 半導体装置および電子機器 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20170512 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20180116 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20180123 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20180319 |
|
A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20180731 |