JP2014236153A - 半導体装置及びその製造方法 - Google Patents
半導体装置及びその製造方法 Download PDFInfo
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Abstract
【解決手段】半導体基板1の上面の上に電界効果トランジスタ9が形成されている。電界効果トランジスタ9は、GaNバッファー層2と、アンドープGaNチャネル層3と、AlGaN電子供給層4と、ゲート電極5と、ドレイン電極7と、ソース電極6とを有する。P型拡散層12とN+型拡散層13が半導体基板1の上面に形成され、横型ダイオードを構成する。接続電極16がP型拡散層12を接地点に接続する。接続電極18がN+型拡散層13をゲート電極5に接続する。
【選択図】図4
Description
図1は、本発明の実施の形態1に係る半導体装置を示す上面図である。図2は、図1のI−IIに沿った断面図である。半導体基板1はシリコンカーバイド(SiC)又はシリコン(Si)からなり、窒化ガリウム(GaN)エピ層の支持基板となる。この半導体基板1の上面の上にGaNバッファー層2、アンドープGaNチャネル層3、及びAlGaN電子供給層4が順に形成されている。
図9は、本発明の実施の形態2に係るサージ保護素子を示す上面図である。図10は、本発明の実施の形態2に係るサージ保護素子を示す断面図である。半導体基板1の上面にP型拡散層20が形成されている。P型拡散層20の中央部にN+型拡散層21が形成され、P型拡散層20の外周部にP+型拡散層22が形成されている。P型拡散層20の不純物濃度はN+型拡散層21よりも低い。シリコン酸化膜(SiO2)からなる絶縁膜15がP型拡散層20とN+型拡散層21とP+型拡散層22上に形成されている。
図12は、本発明の実施の形態3に係るサージ保護素子を示す上面図である。図13は、本発明の実施の形態3に係るサージ保護素子を示す断面図である。N+型ガードリング拡散層27がP型拡散層20内においてN+型拡散層21とP+型拡散層22との間に形成されている。その他の構成は実施の形態2と同様である。
図14は、本発明の実施の形態4に係るサージ保護素子を示す上面図である。図15は、本発明の実施の形態4に係るサージ保護素子を示す断面図である。接続電極16は、サージ保護素子26を覆う絶縁膜15だけでなく、半導体基板1も貫通している。そして、接続電極16は半導体基板1を通って裏面電極10に接続されて接地されている。これにより、接地パッド24が不要となるため、チップ面積を低減することができる。サージ保護素子26の動作及びその他の効果は実施の形態2等と同様である。
図16は、本発明の実施の形態5に係るサージ保護素子を示す上面図である。図17は、本発明の実施の形態5に係るサージ保護素子を示す断面図である。接続電極16は、サージ保護素子26を覆う絶縁膜15を貫通しておらず、半導体基板1の下面からP+型拡散層22の底部までエッチングしたバイアホールを金属材料等で充填することで形成されている。そして、接続電極16は半導体基板1を通って裏面電極10に接続されて接地されている。これにより、接地パッド24だけでなく絶縁膜15上でのGND配線も不要となるため、実施の形態4よりもチップ面積を低減することができる。サージ保護素子26の動作及びその他の効果は実施の形態2等と同様である。
図18は、本発明の実施の形態6に係る半導体装置を示す上面図である。図19は、本発明の実施の形態6に係るサージ保護素子を示す断面図である。ゲート用のサージ保護素子19が絶縁膜28を介してゲートパッド5aの直下に配置され、ドレイン用のサージ保護素子26が絶縁膜28を介してドレインパッド7aの直下に配置されている。サージ保護素子19の接続電極18はゲートパッド5aに接続され、サージ保護素子26の接続電極18はドレインパッド7aに接続されている。
図20から図24は、本発明の実施の形態7に係る半導体装置の製造工程を示す断面図である。まず、図20に示すように実施の形態1と同様に半導体基板1の上面に横型ダイオードを構成するP型拡散層12、N+型拡散層13、及びN+型拡散層14を形成する。
Claims (8)
- 上面と下面を有する半導体基板と、
前記半導体基板の前記上面の上に形成された半導体層と、ゲート電極と、ドレイン電極と、ソース電極とを有する電界効果トランジスタと、
前記半導体基板の前記上面に形成されたP型拡散層と、
前記半導体基板の前記上面に形成され、前記P型拡散層と共に横型ダイオードを構成する第1のN型拡散層と、
前記P型拡散層を接地点に接続する第1の接続電極と、
前記N型拡散層を前記ゲート電極又は前記ドレイン電極に接続する第2の接続電極とを備えることを特徴とする半導体装置。 - 前記第1のN型拡散層は前記P型拡散層内に形成されていることを特徴とする請求項1に記載の半導体装置。
- 前記P型拡散層内に形成された第2のN型拡散層を更に備え、
前記第1の接続電極は前記第2のN型拡散層を介して前記P型拡散層に接続されていることを特徴とする請求項2に記載の半導体装置。 - 前記第1のN型拡散層は前記P型拡散層の中央部に形成され、
前記第1の接続電極は前記P型拡散層の外周部に接続され、
前記P型拡散層内において前記外周部と前記第1のN型拡散層との間に形成された第2のN型拡散層を更に備えることを特徴とする請求項2に記載の半導体装置。 - 前記半導体基板の前記下面に形成された接地電極を更に備え、
前記第1の接続電極は前記半導体基板を通って前記接地電極に接続されていることを特徴とする請求項1に記載の半導体装置。 - 前記ゲート電極又は前記ソース電極に接続されたワイヤボンディングパッドを更に備え、
前記P型拡散層と前記第1のN型拡散層は絶縁膜を介して前記ワイヤボンディングパッドの直下に配置されていることを特徴とする請求項1〜5の何れか1項に記載の半導体装置。 - 半導体基板の上面に横型ダイオードを構成するP型拡散層とN型拡散層を形成する工程と、
前記P型拡散層と前記N型拡散層を覆う絶縁膜を前記半導体基板上の一部に形成する工程と、
前記絶縁膜を形成した後に、前記絶縁膜で覆われてない前記半導体基板上に半導体層と、ゲート電極と、ドレイン電極と、ソース電極とを有する電界効果トランジスタを形成する工程と、
前記P型拡散層を接地点に接続する第1の接続電極を形成する工程と、
前記N型拡散層を前記ゲート電極又は前記ソース電極に接続する第2の接続電極を形成する工程とを備えることを特徴とする半導体装置の製造方法。 - 前記半導体層を形成する際に前記絶縁膜上に非晶質半導体層が形成され、
前記非晶質半導体層の内部に前記半導体層の金属元素又は結晶欠陥を捕獲することを特徴とする請求項7に記載の半導体装置の製造方法。
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Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2015026836A (ja) * | 2013-07-25 | 2015-02-05 | ゼネラル・エレクトリック・カンパニイ | 半導体アセンブリおよび製造方法 |
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Publication number | Priority date | Publication date | Assignee | Title |
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JP6107435B2 (ja) * | 2013-06-04 | 2017-04-05 | 三菱電機株式会社 | 半導体装置及びその製造方法 |
US9111750B2 (en) * | 2013-06-28 | 2015-08-18 | General Electric Company | Over-voltage protection of gallium nitride semiconductor devices |
JP2015073073A (ja) * | 2013-09-06 | 2015-04-16 | 三菱電機株式会社 | 半導体装置およびその製造方法 |
US10153276B2 (en) * | 2014-12-17 | 2018-12-11 | Infineon Technologies Austria Ag | Group III heterojunction semiconductor device having silicon carbide-containing lateral diode |
US9773898B2 (en) * | 2015-09-08 | 2017-09-26 | Macom Technology Solutions Holdings, Inc. | III-nitride semiconductor structures comprising spatially patterned implanted species |
EP3525232A1 (en) | 2018-02-09 | 2019-08-14 | Nexperia B.V. | Semiconductor device and method of manufacturing the same |
JP7131155B2 (ja) * | 2018-07-18 | 2022-09-06 | サンケン電気株式会社 | 半導体装置 |
JP7364997B2 (ja) * | 2019-03-13 | 2023-10-19 | テキサス インスツルメンツ インコーポレイテッド | 窒化物半導体基板 |
CN111902937A (zh) * | 2020-06-04 | 2020-11-06 | 英诺赛科(珠海)科技有限公司 | 半导体装置及其制造方法 |
CN112038336B (zh) * | 2020-06-15 | 2023-03-24 | 湖南三安半导体有限责任公司 | 氮化物器件及其esd防护结构和制作方法 |
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Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002170963A (ja) * | 2000-12-01 | 2002-06-14 | Sanken Electric Co Ltd | 半導体素子、半導体装置、及び半導体素子の製造方法 |
JP2003068759A (ja) * | 2001-08-29 | 2003-03-07 | Denso Corp | 半導体装置およびその製造方法 |
JP2003523083A (ja) * | 2000-02-10 | 2003-07-29 | モトローラ・インコーポレイテッド | 半導体デバイス |
JP2006216671A (ja) * | 2005-02-02 | 2006-08-17 | Toshiba Corp | 窒素化合物半導体素子 |
JP2006351691A (ja) * | 2005-06-14 | 2006-12-28 | Fuji Electric Device Technology Co Ltd | 半導体装置 |
JP2008235612A (ja) * | 2007-03-21 | 2008-10-02 | Denso Corp | 保護素子 |
JP2009004398A (ja) * | 2007-06-19 | 2009-01-08 | Renesas Technology Corp | 半導体装置およびこれを用いた電力変換装置 |
JP2010010262A (ja) * | 2008-06-25 | 2010-01-14 | Panasonic Electric Works Co Ltd | 半導体装置 |
WO2012082840A1 (en) * | 2010-12-15 | 2012-06-21 | Efficient Power Conversion Corporation | Semiconductor devices with back surface isolation |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5524462B2 (ja) | 2008-08-06 | 2014-06-18 | シャープ株式会社 | 半導体装置 |
US7915645B2 (en) | 2009-05-28 | 2011-03-29 | International Rectifier Corporation | Monolithic vertically integrated composite group III-V and group IV semiconductor device and method for fabricating same |
JP5678866B2 (ja) | 2011-10-31 | 2015-03-04 | 株式会社デンソー | 半導体装置およびその製造方法 |
JP2013118017A (ja) | 2013-03-21 | 2013-06-13 | Occs Planning Corp | 電子広告配信システム及び方法 |
JP6107435B2 (ja) * | 2013-06-04 | 2017-04-05 | 三菱電機株式会社 | 半導体装置及びその製造方法 |
-
2013
- 2013-06-04 JP JP2013118017A patent/JP6107435B2/ja not_active Expired - Fee Related
-
2014
- 2014-03-06 US US14/198,763 patent/US9012959B2/en not_active Expired - Fee Related
- 2014-05-23 DE DE102014209931.5A patent/DE102014209931B4/de not_active Expired - Fee Related
Patent Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2003523083A (ja) * | 2000-02-10 | 2003-07-29 | モトローラ・インコーポレイテッド | 半導体デバイス |
JP2002170963A (ja) * | 2000-12-01 | 2002-06-14 | Sanken Electric Co Ltd | 半導体素子、半導体装置、及び半導体素子の製造方法 |
JP2003068759A (ja) * | 2001-08-29 | 2003-03-07 | Denso Corp | 半導体装置およびその製造方法 |
JP2006216671A (ja) * | 2005-02-02 | 2006-08-17 | Toshiba Corp | 窒素化合物半導体素子 |
JP2006351691A (ja) * | 2005-06-14 | 2006-12-28 | Fuji Electric Device Technology Co Ltd | 半導体装置 |
JP2008235612A (ja) * | 2007-03-21 | 2008-10-02 | Denso Corp | 保護素子 |
JP2009004398A (ja) * | 2007-06-19 | 2009-01-08 | Renesas Technology Corp | 半導体装置およびこれを用いた電力変換装置 |
JP2010010262A (ja) * | 2008-06-25 | 2010-01-14 | Panasonic Electric Works Co Ltd | 半導体装置 |
WO2012082840A1 (en) * | 2010-12-15 | 2012-06-21 | Efficient Power Conversion Corporation | Semiconductor devices with back surface isolation |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2015026836A (ja) * | 2013-07-25 | 2015-02-05 | ゼネラル・エレクトリック・カンパニイ | 半導体アセンブリおよび製造方法 |
US9997507B2 (en) | 2013-07-25 | 2018-06-12 | General Electric Company | Semiconductor assembly and method of manufacture |
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