JP2014167966A - 半導体装置の製造方法及び製造装置 - Google Patents
半導体装置の製造方法及び製造装置 Download PDFInfo
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Abstract
【解決手段】実施形態にかかる半導体装置の製造方法は、第1のウェハと第2のウェハとを貼り合わせて積層体を形成し、第1のウェハのベベルと第2のウェハのベベルとの間に位置する間隙に、フィル材を薄膜状に付着させたフィルムを積層体の外周に沿って擦り付けることにより、間隙にフィル材を埋め込み、第1のウェハを薄層化する。
【選択図】図7
Description
図2から図4を用いて、本実施形態にかかるウェハ積層体23の製造方法を説明する。図2から図4は、本実施形態の製造方法の各工程での、ウェハ積層体23の外周部及びその近傍におけるウェハ積層体23の断面図である。
(1)各ウェハの最表面に位置する膜(例えば酸化シリコン膜)との密着性が高い。
(2)研削・研磨に対する機械的耐性がある。
(3)ウェハ用の研磨液、洗浄液に対する耐薬品性がある。
(4)ウェハの貼り合わせ後に行われる熱プロセスで印加される高温に対して耐熱性がある。(例えば200℃程度の熱に対して耐熱性があることが好ましい。)
(5)硬化収縮が小さいこと。
(6)半導体装置製造で用いられるクリーンルーム内での使用実績がある。
(7)熱膨張係数がウェハの材料(例えばシリコン)のものに近い。
(8)脆くないこと(できれば弾性があって、応力を分散・緩和できること)。
本実施形態は、フィル材3を間隙に移送又は滴下することによりフィル材3の埋込みを行う点で、第1の実施形態と異なる。ここでは、第1の実施形態と同じ構成及び機能を有する部分は、第1の実施形態と同じ符号を付し、その説明は省略するものとする。
1a、100b、300a 裏面
1b、2a 13b、100a、300b 表面
3 フィル材
4、104 ベベル
6 角
7、105 端面
8 壁面
22 フィルム
23 ウェハ積層体
24 フィル材付着テープ
31 ディスペンスノズル
32 光照射装置
101、301 外周部
102 ノッチ
103 中心部
200、400 半導体製造装置
210、410 保持部
211、411 保持テーブル
212、412 支持軸
213 モータ
220 擦り付けヘッド
221 支持部
221a、221b 突出部
222 弾性部材
223 エアシリンダ
231 巻き取りリール
232 送り出しリール
311 支持基板
Claims (9)
- 第1のウェハと第2のウェハとを貼り合わせて積層体を形成し、
前記第1のウェハのベベルと前記第2のウェハのベベルとの間に位置する間隙に、フィル材を薄膜状に付着させたフィルムを前記積層体の外周に沿って擦り付けることにより、前記間隙に前記フィル材を埋込み、
前記第1のウェハを薄層化する、
ことを備えることを特徴とする半導体装置の製造方法。 - 第1のウェハと第2のウェハとを貼り合わせて積層体を形成し、
前記第1のウェハのベベルと前記第2のウェハのベベルとの間に位置する間隙に、フィル材を移送又は滴下することにより、前記間隙に前記フィル材を埋込み、
光を照射して、前記フィル材を硬化させ、
前記第1のウェハを薄層化する、
ことを備えることを特徴とする半導体装置の製造方法。 - 前記積層体を形成する前に、前記第1のウェハ及び前記第2のウェハのうちの少なくとも1つに貫通電極を形成することをさらに備える、ことを特徴とする請求項1又は2に記載の半導体装置の製造方法。
- 前記フィル材の埋込み後に、前記間隙からはみ出した余剰の前記フィル材を、研磨フィルムを用いて研磨除去することをさらに備える、ことを特徴とする請求項1から3のいずれか1つに記載の半導体装置の製造方法。
- 前記フィル材として、ガラス材料、無機ポリマー、又は、有機ポリマーを含む材料を用いる、ことを特徴とする請求項1から4のいずれか1つに記載の半導体装置の製造方法。
- 2つの突出部を有した支持部と、前記2つの突出部の間に張設された弾性部材とを有する擦り付けヘッドであって、薄膜状のフィル材を付着させたフィルムが前記弾性部材により支持されている状態において、複数のウェハのベベルの間に位置する間隙に前記フィルムを擦り付け可能な擦り付けヘッドを備えることを特徴とする半導体製造装置。
- 前記擦り付けヘッドは、前記擦り付けヘッドを移動させるためのエアシリンダを有し、
前記フィルムが前記弾性部材により支持されている状態において、前記エアシリンダにより、前記複数のウェハを含む積層体の外周が前記フィルムを介して前記弾性部材に接するように前記擦り付けヘッドを移動させることにより、前記弾性部材を引き伸ばして前記弾性部材に張力を発生させ、前記張力により前記フィルムを前記間隙に押し当てることを特徴とする請求項6に記載の半導体製造装置。 - 複数のウェハのベベルの間に位置する間隙にフィル材を移送又は滴下するフィル材供給装置と、
光を照射して、前記フィル材を硬化させる光照射装置と、
を備えることを特徴とする半導体製造装置。 - 前記複数のウェハを含む積層体を回転させる回転装置をさらに備えることを特徴とする請求項6から8のいずれか1つに記載の半導体製造装置。
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Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2019176589A1 (ja) * | 2018-03-14 | 2019-09-19 | 東京エレクトロン株式会社 | 基板処理システム、基板処理方法及びコンピュータ記憶媒体 |
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WO2022044522A1 (ja) * | 2020-08-27 | 2022-03-03 | 株式会社荏原製作所 | 基板処理方法、および基板処理装置 |
US11450523B2 (en) | 2018-04-27 | 2022-09-20 | Tokyo Electron Limited | Substrate processing system with eccentricity detection device and substrate processing method |
US11450578B2 (en) | 2018-04-27 | 2022-09-20 | Tokyo Electron Limited | Substrate processing system and substrate processing method |
WO2023026806A1 (ja) * | 2021-08-26 | 2023-03-02 | 株式会社荏原製作所 | 基板処理方法および基板処理装置 |
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US12020936B2 (en) | 2018-12-21 | 2024-06-25 | Tokyo Electron Limited | Substrate processing apparatus and substrate processing method |
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Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2004241434A (ja) * | 2003-02-03 | 2004-08-26 | Ebara Corp | 基板処理装置 |
JP2004349649A (ja) * | 2003-05-26 | 2004-12-09 | Shinko Electric Ind Co Ltd | ウエハーの薄加工方法 |
US20080268614A1 (en) * | 2007-04-25 | 2008-10-30 | Ku-Feng Yang | Wafer Bonding |
US20110091685A1 (en) * | 2009-10-21 | 2011-04-21 | International Business Machines Corporation | Polymeric edge seal for bonded substrates |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3216583B2 (ja) | 1997-08-22 | 2001-10-09 | 住友金属工業株式会社 | 貼り合わせsoi基板の製造方法 |
US20020164876A1 (en) * | 2000-04-25 | 2002-11-07 | Walitzki Hans S. | Method for finishing polysilicon or amorphous substrate structures |
JP3580227B2 (ja) | 2000-06-21 | 2004-10-20 | 三菱住友シリコン株式会社 | 複合基板の分離方法及び分離装置 |
JP2003007652A (ja) * | 2001-06-26 | 2003-01-10 | Mitsubishi Electric Corp | 半導体チップの製造方法 |
KR100609334B1 (ko) * | 2005-06-13 | 2006-08-08 | 삼성전자주식회사 | 감광성 폴리머가 갭필된 적층 회로부재 및 그의 제조 방법 |
KR100621438B1 (ko) * | 2005-08-31 | 2006-09-08 | 삼성전자주식회사 | 감광성 폴리머를 이용한 적층 칩 패키지 및 그의 제조 방법 |
KR101210090B1 (ko) * | 2006-03-03 | 2012-12-07 | 엘지이노텍 주식회사 | 금속 코어 인쇄회로기판 및 이를 이용한 발광 다이오드패키징 방법 |
JP4468435B2 (ja) | 2007-12-25 | 2010-05-26 | 株式会社荏原製作所 | 基板処理装置 |
WO2012166263A1 (en) * | 2011-06-03 | 2012-12-06 | Cytec Technology Corp. | Resin coated radius fillers and system and method of making the same |
-
2013
- 2013-02-28 JP JP2013039025A patent/JP5784658B2/ja active Active
- 2013-07-30 US US13/954,833 patent/US9123717B2/en active Active
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2004241434A (ja) * | 2003-02-03 | 2004-08-26 | Ebara Corp | 基板処理装置 |
JP2004349649A (ja) * | 2003-05-26 | 2004-12-09 | Shinko Electric Ind Co Ltd | ウエハーの薄加工方法 |
US20080268614A1 (en) * | 2007-04-25 | 2008-10-30 | Ku-Feng Yang | Wafer Bonding |
US20110091685A1 (en) * | 2009-10-21 | 2011-04-21 | International Business Machines Corporation | Polymeric edge seal for bonded substrates |
Cited By (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2019176589A1 (ja) * | 2018-03-14 | 2019-09-19 | 東京エレクトロン株式会社 | 基板処理システム、基板処理方法及びコンピュータ記憶媒体 |
JPWO2019176589A1 (ja) * | 2018-03-14 | 2021-02-12 | 東京エレクトロン株式会社 | 基板処理システム、基板処理方法及びコンピュータ記憶媒体 |
JP7058320B2 (ja) | 2018-03-14 | 2022-04-21 | 東京エレクトロン株式会社 | 基板処理システム、基板処理方法及びコンピュータ記憶媒体 |
US11752576B2 (en) | 2018-03-14 | 2023-09-12 | Tokyo Electron Limited | Substrate processing system for removing peripheral portion of substrate, substrate processing method and computer readable recording medium thereof |
US11450523B2 (en) | 2018-04-27 | 2022-09-20 | Tokyo Electron Limited | Substrate processing system with eccentricity detection device and substrate processing method |
US11450578B2 (en) | 2018-04-27 | 2022-09-20 | Tokyo Electron Limited | Substrate processing system and substrate processing method |
JP2020013911A (ja) * | 2018-07-19 | 2020-01-23 | 東京エレクトロン株式会社 | 基板処理システム及び基板処理方法 |
US12020936B2 (en) | 2018-12-21 | 2024-06-25 | Tokyo Electron Limited | Substrate processing apparatus and substrate processing method |
WO2022044522A1 (ja) * | 2020-08-27 | 2022-03-03 | 株式会社荏原製作所 | 基板処理方法、および基板処理装置 |
WO2023026806A1 (ja) * | 2021-08-26 | 2023-03-02 | 株式会社荏原製作所 | 基板処理方法および基板処理装置 |
WO2023032552A1 (ja) * | 2021-09-01 | 2023-03-09 | 株式会社荏原製作所 | 基板処理方法 |
WO2023042547A1 (ja) * | 2021-09-14 | 2023-03-23 | 株式会社荏原製作所 | 基板処理装置、および基板処理方法 |
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