JP2012065515A - Switching method of electric power conversion system - Google Patents

Switching method of electric power conversion system Download PDF

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JP2012065515A
JP2012065515A JP2010209967A JP2010209967A JP2012065515A JP 2012065515 A JP2012065515 A JP 2012065515A JP 2010209967 A JP2010209967 A JP 2010209967A JP 2010209967 A JP2010209967 A JP 2010209967A JP 2012065515 A JP2012065515 A JP 2012065515A
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switching
phase
potential
filter circuit
leakage current
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JP5676990B2 (en
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Junichi Tsuda
純一 津田
Hiroshi Mochikawa
宏 餅川
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Toshiba Corp
Toshiba Elevator and Building Systems Corp
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Toshiba Elevator Co Ltd
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Abstract

PROBLEM TO BE SOLVED: To provide a switching method of an electric power conversion system which suppresses enlargement of a filter circuit without increasing a leakage current and a common mode current in the filter circuit in a switchover or the like of a polarity of a phase where switching is stopped in a two phase modulation.SOLUTION: In the switching method of an electric power conversion system where a filter circuit reducing a leakage current is mounted, the switching method of an embodiment makes an average of an output command of all the phases change gently in the case of switching a state including and not including a phase where switching is stopped, and in the case of switching an electric potential of a phase where switching is stopped. By making the inclination gradual to the extent that a vibration in accordance with a resonance frequency in the filter circuit is suppressed enough, it becomes possible to suppress increase of a common mode current and a leakage current in the filter circuit even in the case where a three phase modulation and a two phase modulation are used together.

Description

本発明は、漏れ電流低減回路を適用した電力変換装置におけるスイッチング素子のスイッチング方法に関する。   The present invention relates to a switching method of a switching element in a power conversion device to which a leakage current reduction circuit is applied.

インバータに代表される電力変換装置は、半導体スイッチング素子のスイッチング動作により電力変換を行っている。モータを駆動する三相ＰＷＭインバータを例にとると、出力しようとする電圧の指令値と三角波などのキャリアとを比較し、比較結果に基づき各相の半導体素子をスイッチングさせる。このとき、その原理上、三相のＵＶＷ相出力電圧の平均値を示すコモンモード電圧はゼロにはならず、キャリアに同期して大きな電圧が発生する。このコモンモード電圧は、モータの浮遊容量などを介してアースへと流れる漏れ電流（高周波ノイズ）の原因となる。漏れ電流は他の機器に障害をもたらすなどの問題となるため、漏れ電流対策は必須となっている。その有効な対策としてコイルやコンデンサなどの受動素子で構成されるフィルタ回路がある。   A power converter represented by an inverter performs power conversion by a switching operation of a semiconductor switching element. Taking a three-phase PWM inverter for driving a motor as an example, a command value of a voltage to be output is compared with a carrier such as a triangular wave, and semiconductor elements of each phase are switched based on the comparison result. At this time, on the principle, the common mode voltage indicating the average value of the three-phase UVW phase output voltages is not zero, and a large voltage is generated in synchronization with the carrier. This common mode voltage causes a leakage current (high-frequency noise) that flows to the ground via the stray capacitance of the motor. Since leakage current causes problems such as causing trouble to other devices, countermeasures against leakage current are indispensable. As an effective countermeasure, there is a filter circuit composed of passive elements such as coils and capacitors.

図１１は、漏れ電流対策を施した電力変換装置の主回路構成を示す。   FIG. 11 shows a main circuit configuration of a power conversion device that takes measures against leakage current.

三相交流電源２５からコンバータ２１までの入力ライン上に、コモンモードチョークコイル２６など高周波の漏れ電流に対して高インピーダンスとなるインダクタンス素子を挿入する。コンバータ２１は三相電力を直流電力に変換し、この直流電圧は平滑コンデンサ２３にて平滑される。インバータ２２はこの直流電圧を、所望の大きさ及び周波数の三相交流電圧に変換しモータ２４に供給する。   On the input line from the three-phase AC power supply 25 to the converter 21, an inductance element such as a common mode choke coil 26 that has a high impedance against high-frequency leakage current is inserted. The converter 21 converts the three-phase power into DC power, and this DC voltage is smoothed by the smoothing capacitor 23. The inverter 22 converts this DC voltage into a three-phase AC voltage having a desired magnitude and frequency and supplies it to the motor 24.

更にインダクタンス素子２６とコモンモード電圧の発生源であるインバータ２２のスイッチング素子とを含めたループ内に、コンデンサ２７ａ〜２７ｃ及びコモンモード電流抽出回路２８などの低インピーダンス素子で構成される漏れ電流のバイパス回路が設けられる。コモンモード電流抽出回路２８は、コンデンサ９と単相リアクトル１０の３つの対を含む。   Further, in a loop including the inductance element 26 and the switching element of the inverter 22 that is a generation source of the common mode voltage, a leakage current bypass configured by low impedance elements such as capacitors 27a to 27c and a common mode current extraction circuit 28 is provided. A circuit is provided. Common mode current extraction circuit 28 includes three pairs of capacitor 9 and single-phase reactor 10.

図１１のようなタイプのフィルタ回路は、コモンモードチョークコイル２６が高インピーダンス特性となって漏れ電流となるコモンモード電流の流れを抑えると共に、それでも抑え切れない漏れ電流は、コンデンサ２７ａ〜２７ｃ、コモンモード電流抽出回路２８で形成されたバイパス回路を流れる。そのため、インバータのスイッチングが一般的な「三相変調」である場合には、このような回路構成は漏れ電流の抑制には非常に有効である。   In the type of filter circuit as shown in FIG. 11, the common mode choke coil 26 has a high impedance characteristic and suppresses the flow of the common mode current that becomes a leakage current. It flows through the bypass circuit formed by the mode current extraction circuit 28. For this reason, when the switching of the inverter is a general “three-phase modulation”, such a circuit configuration is very effective in suppressing the leakage current.

図１２は、電力変換装置の漏れ電流を低減する他のフィルタ回路構成を示す。   FIG. 12 shows another filter circuit configuration for reducing the leakage current of the power converter.

電力変換装置３とモータ２４の間にコモンモードリアクトルＬ１が接続され、コモンモードリアクトルＬ１とインバータ２２の入力側中性点ｎ１の間に、漏れ電流をバイパスする三相リアクトルＬ２及びコンデンサＣ１が接続されている。このフィルタ回路構成では、漏れ電流はインバータ２２を循環するので、筐体に流れ出る漏れ電流１４を抑えることができる。   A common mode reactor L1 is connected between the power converter 3 and the motor 24, and a three-phase reactor L2 and a capacitor C1 that bypass the leakage current are connected between the common mode reactor L1 and the input-side neutral point n1 of the inverter 22. Has been. In this filter circuit configuration, since the leakage current circulates through the inverter 22, the leakage current 14 flowing out to the housing can be suppressed.

特開２００５−２０４４３８号公報JP 2005-204438 A 特許第３５９６６９４号公報Japanese Patent No. 3596694 特許第３４６６１１８号公報Japanese Patent No. 3466118

しかし、例えば三相ＰＷＭインバータでは、素子のスイッチング損失を減らす方法として、一つの相のスイッチングを停止するいわゆる「二相変調」が広く採用されている。図１３（ａ）はインバータの変調方式を三相変調方式から二相変調方式に切り替えた場合のインバータ出力電圧指令値を示す。１１ａはインバータＵ相出力指令、１１ｂはインバータＶ相出力指令、１１ｃはインバータＷ相出力指令、１２は三相の出力指令の平均値である。二相変調では、スイッチングを停止する相の電位が、インバータ回路の上側スイッチング素子（以下、上素子という）を導通させて、インバータ入力直流電圧の上側電位（以下、上電位という）に固定した状態と、下側スイッチング素子（以下、下素子という）を導通させてインバータ入力直流電圧の下側電位（以下、下電位という）に固定した状態とに切り換る。二相変調では、例えばＵ相を下電位に固定した場合、Ｕ相電圧を三相変調時に比べて下げた分だけ、他のＶ、Ｗ相の出力指令も低下される。この結果、二相変調時においても、ＵＶＷの相間電圧は三相変調時と同一である。   However, for example, in a three-phase PWM inverter, so-called “two-phase modulation” in which switching of one phase is stopped is widely adopted as a method for reducing the switching loss of an element. FIG. 13A shows the inverter output voltage command value when the inverter modulation method is switched from the three-phase modulation method to the two-phase modulation method. 11a is an inverter U-phase output command, 11b is an inverter V-phase output command, 11c is an inverter W-phase output command, and 12 is an average value of three-phase output commands. In two-phase modulation, the potential of the phase to stop switching is fixed to the upper potential of the inverter input DC voltage (hereinafter referred to as the upper potential) by turning on the upper switching element (hereinafter referred to as the upper element) of the inverter circuit. Then, the lower switching element (hereinafter referred to as the lower element) is turned on and switched to a state where the inverter input DC voltage is fixed to the lower potential (hereinafter referred to as the lower potential). In the two-phase modulation, for example, when the U phase is fixed at a lower potential, the other V and W phase output commands are also reduced by the amount that the U phase voltage is lowered compared to the three phase modulation. As a result, even during two-phase modulation, the UVW interphase voltage is the same as during three-phase modulation.

二相変調の際、あるいは三相変調と二相変調が切り換る際などに、フィルタ回路の効果は十分に得られず、漏れ電流が大きくなる可能性がある。また、フィルタ回路内を流れるコモンモード電流も大きくなり、コモンモードチョークコイル６などのインダクタンス素子が磁気飽和する可能性も高まることから、その防止のためにフィルタの大型化も避けられない。図１３（ｂ）はフィルタ回路内を流れるコモンモード電流１３の一例を示し、図１３（ｃ）はモータ４のアースラインを流れる漏れ電流１４の一例を示す。   When the two-phase modulation is performed or when the three-phase modulation and the two-phase modulation are switched, the effect of the filter circuit cannot be sufficiently obtained, and the leakage current may increase. In addition, since the common mode current flowing in the filter circuit also increases and the possibility that the inductance elements such as the common mode choke coil 6 are magnetically saturated increases, it is inevitable to increase the size of the filter to prevent this. FIG. 13B shows an example of the common mode current 13 flowing in the filter circuit, and FIG. 13C shows an example of the leakage current 14 flowing in the ground line of the motor 4.

こうした漏れ電流１４やフィルタ回路内のコモンモード電流１３の増大は、全ての相の平均電圧で表されるコモンモード電圧の変化に起因する。例えば二相変調の場合、キャリアに同期して通常発生する短期のコモンモード電圧の変化とは別に、スイッチングを停止する相の極性が切り換る際に、より長期の視点で見た場合にコモンモード電圧のステップ的な変化が生じる。このステップ的な変化は、図１３(a)ではコモンモード電圧に相当する三相電圧指令の平均値１２のステップ的な変化に相当する。このステップ的に変化する電圧には、フィルタ回路に含まれるコモンモードチョークコイルとバイパス回路のコンデンサとの共振周波数成分が含まれている。このため、図１３（ｂ）及び１３（ｃ）のように共振周波数に応じた振動が発生して、フィルタ回路内のコモンモード電流や漏れ電流の増大につながる。   The increase in the leakage current 14 and the common mode current 13 in the filter circuit is caused by a change in the common mode voltage expressed by the average voltage of all phases. For example, in the case of two-phase modulation, in addition to the short-term common mode voltage change that normally occurs in synchronization with the carrier, when switching the polarity of the phase that stops switching, it is common when viewed from a longer-term viewpoint. A step change of the mode voltage occurs. This step change corresponds to a step change of the average value 12 of the three-phase voltage command corresponding to the common mode voltage in FIG. The voltage changing stepwise includes resonance frequency components of the common mode choke coil included in the filter circuit and the capacitor of the bypass circuit. For this reason, as shown in FIGS. 13B and 13C, vibration corresponding to the resonance frequency is generated, leading to an increase in common mode current and leakage current in the filter circuit.

そこで本発明は、二相変調でのスイッチングを停止する相の極性の切り換り又は二相変調と三相変調の切り換りにおいても、漏れ電流やフィルタ回路内のコモンモード電流を増やさず、フィルタ回路の大型化を抑えることを目的とするものである。   Therefore, the present invention does not increase the leakage current or the common mode current in the filter circuit even when switching the polarity of the phase that stops switching in two-phase modulation or switching between two-phase modulation and three-phase modulation. The object is to suppress the enlargement of the filter circuit.

本発明の一実施形態に係るスイッチング方法は、漏れ電流を低減するフィルタ回路を取り付けた電力変換装置のスイッチング方法において、スイッチングを停止する相を含む状態と含まない状態とを切り換える際やスイッチングを停止する相の電位を切り換える際に、全相の出力指令の平均を緩やかに変化させる。   A switching method according to an embodiment of the present invention is a switching method of a power conversion device equipped with a filter circuit for reducing leakage current. When switching between a state including a phase for stopping switching and a state not including the phase, switching is stopped. When the potential of the phase to be switched is switched, the average of the output commands for all phases is gradually changed.

電力変換装置の二相変調動作におけるスイッチングを停止する相の極性の切り換り又は二相変調と三相変調の切り換りにおいても、漏れ電流やフィルタ回路内のコモンモード電流を増やさず、フィルタ回路の大型化を抑えることが可能となる。   Even when switching the polarity of the phase that stops switching in the two-phase modulation operation of the power converter or switching between two-phase modulation and three-phase modulation, the leakage current and common mode current in the filter circuit are not increased. It becomes possible to suppress the enlargement of the circuit.

本発明の第１実施例を適用する電力変換装置とフィルタ回路の構成例を示した単線結線図。The single wire connection diagram which showed the structural example of the power converter device and filter circuit to which 1st Example of this invention is applied. 本発明の第１実施例を示すインバータの出力電圧指令と、フィルタ回路内のコモンモード電流・漏れ電流のシミュレーション波形。The output voltage command of the inverter which shows 1st Example of this invention, and the simulation waveform of the common mode electric current and leakage current in a filter circuit. 本発明の第２実施例を示すインバータの出力電圧指令と、フィルタ回路内のコモンモード電流・漏れ電流のシミュレーション波形。The output voltage command of the inverter which shows 2nd Example of this invention, and the simulation waveform of the common mode electric current and leakage current in a filter circuit. 本発明の第３実施例を示すインバータの出力電圧指令と、フィルタ回路内のコモンモード電流・漏れ電流のシミュレーション波形。The output voltage command of the inverter which shows 3rd Example of this invention, and the simulation waveform of the common mode electric current and leakage current in a filter circuit. 本発明の第４実施例を示すインバータの出力電圧指令と、フィルタ回路内のコモンモード電流・漏れ電流のシミュレーション波形。The output voltage command of the inverter which shows 4th Example of this invention, and the simulation waveform of the common mode electric current and leakage current in a filter circuit. 本発明の第５実施例を示すインバータの出力電圧指令と、フィルタ回路内のコモンモード電流・漏れ電流のシミュレーション波形。The output voltage command of the inverter which shows 5th Example of this invention, and the simulation waveform of the common mode electric current and leakage current in a filter circuit. 本発明の第６実施例との対比を示す従来のインバータとコンバータそれぞれの出力電圧指令とキャリア、及びコンバータとインバータとの間のコモンモード電圧の電位差を表す概略図。The schematic showing the potential difference of the common mode voltage between the output voltage instruction | command and carrier of each conventional inverter and converter which show contrast with 6th Example of this invention, and a converter and an inverter. 本発明の第６実施例を示すインバータとコンバータそれぞれの出力電圧指令とキャリア、及びコンバータとインバータとの間のコモンモード電圧の電位差を表す概略図。Schematic showing the potential difference of the common mode voltage between the output voltage instruction | command and carrier of each inverter and converter which show 6th Example of this invention, and a converter and an inverter. 本発明の第７実施例を示すインバータとコンバータそれぞれの出力電圧指令。The output voltage command of each of the inverter and converter which shows the 7th example of the present invention. 本発明の第８実施例を示すインバータとコンバータそれぞれの出力電圧指令。The output voltage command of each of the inverter and converter which shows the 8th example of the present invention. 本発明のスイッチング方法が適用されるフィルタ回路の一例。An example of the filter circuit to which the switching method of the present invention is applied. 本発明のスイッチング方法が適用される他のフィルタ回路の一例。An example of the other filter circuit to which the switching method of this invention is applied. 従来のスイッチング方法で三相変調から二相変調に移行した場合の、インバータの出力電圧指令と、フィルタ回路内のコモンモード電流・漏れ電流のシミュレーション波形。Simulation waveforms of inverter output voltage command and common mode current / leakage current in the filter circuit when transitioning from three-phase modulation to two-phase modulation using the conventional switching method.

以下、本発明に係る電力変換装置のスイッチング方法について、図面を参照して説明する。   Hereinafter, the switching method of the power converter device which concerns on this invention is demonstrated with reference to drawings.

図１（ａ）、１（ｂ）は、本発明が適用される電力変換装置に接続されるフィルタ回路の概略を示す単線結線図である。電源１は直流電源あるいは交流電源である。電源１が交流電源の場合、電力変換装置３はコンバータ及びインバータを含む。また電源１が直流電源場合、電力変換装置３はインバータとして構成される。電力変換装置３は、制御部３ａの制御の下に、三相変調方式又は二相変調方式にて動作し、モータ等の負荷５を駆動する。   1 (a) and 1 (b) are single-line diagrams showing an outline of a filter circuit connected to a power converter to which the present invention is applied. The power source 1 is a DC power source or an AC power source. When the power source 1 is an AC power source, the power conversion device 3 includes a converter and an inverter. When the power source 1 is a DC power source, the power conversion device 3 is configured as an inverter. The power conversion device 3 operates in a three-phase modulation method or a two-phase modulation method under the control of the control unit 3a, and drives a load 5 such as a motor.

フィルタの主な構成要素は、コモンモードチョークコイルやノーマルモードリアクトルなど、高周波に対して高インピーダンスとなるインダクタンス素子２と、コンデンサを含む高周波に対して低インピーダンスとなる漏れ電流のバイパス回路４である。回路構成の要旨は、漏れ電流の流れる電力変換装置３の入出力ラインのいずれかにインダクタンス素子２が直列に接続され、且つ、漏れ電流の発生源となる電力変換装置のスイッチング素子とインダクタンス素子２を含むように、低インピーダンス回路４を有するバイパス回路が電力変換装置３に接続されていることである。図１１の回路構成は図１（ａ）の構成に含まれ、図１２の回路構成は図１（ｂ）の構成に含まれる。   The main components of the filter are an inductance element 2 having a high impedance with respect to a high frequency, such as a common mode choke coil or a normal mode reactor, and a leakage current bypass circuit 4 having a low impedance with respect to the high frequency including a capacitor. . The gist of the circuit configuration is that the inductance element 2 is connected in series to either of the input / output lines of the power converter 3 through which a leakage current flows, and the switching element and the inductance element 2 of the power converter serving as a source of leakage current are provided. The bypass circuit having the low impedance circuit 4 is connected to the power converter 3 so as to include The circuit configuration of FIG. 11 is included in the configuration of FIG. 1A, and the circuit configuration of FIG. 12 is included in the configuration of FIG.

図１に示す二つの例のようにインダクタンス素子２は、電力変換装置３の入力側、出力側いずれに接続されていても実施例としての回路は成立する。またこれ以外で、インダクタンス素子が電力変換装置の内部に配置されるような場合でもフィルタの効果が得られる。尚、電力変換装置３としては、出力が単相又は三相の場合、入力が同じく単相又は三相の場合、あるいは直流又は交流の場合など、様々な場合で本フィルタ構成は可能となるが、以降は三相ＰＷＭインバータを適用した場合を一例として、そのスイッチング方法について説明する。   As in the two examples shown in FIG. 1, the inductance element 2 is formed as a circuit as an embodiment regardless of whether the inductance element 2 is connected to the input side or the output side of the power conversion device 3. In addition, the filter effect can be obtained even when the inductance element is disposed inside the power conversion device. The power converter 3 can be configured in various cases such as when the output is single-phase or three-phase, when the input is also single-phase or three-phase, or when it is DC or AC. Hereinafter, the switching method will be described as an example in which a three-phase PWM inverter is applied.

三相ＰＷＭインバータは周知のように、Ｕ相、Ｖ相、Ｗ相のスイッチング回路からなり、各相のスイッチング回路は入力直流電圧の上側電位に接続され負荷に対する電流のＯＮ／ＯＦＦを行う上素子と、入力直流電圧の下側電位に接続され負荷から流れ込む電流のＯＮ／ＯＦＦを行う下素子とを含む。   As is well known, the three-phase PWM inverter is composed of U-phase, V-phase, and W-phase switching circuits, and each phase switching circuit is connected to the upper potential of the input DC voltage and is an upper element that turns on / off the current to the load. And a lower element that is connected to the lower potential of the input DC voltage and performs ON / OFF of the current flowing from the load.

三角波などのキャリアと比較される三相ＰＷＭインバータの出力指令は、通常の二相変調の場合、前述した図１３（ａ）のように、スイッチングを停止する相の電位を、上素子を導通させて上電位に固定する状態と、下素子を導通させて下電位に固定する状態を交互に、且つ三相において順番に切り換える。インバータ出力のコモンモード電圧に相当する三相の出力指令平均値１２は、このスイッチングを停止する相の電位の切り換りにおいてステップ的に大きく変化する。   In the case of normal two-phase modulation, the output command of the three-phase PWM inverter to be compared with a carrier such as a triangular wave is such that, as shown in FIG. Then, the state of fixing to the upper potential and the state of making the lower element conductive and fixing to the lower potential are alternately switched in order in three phases. The three-phase output command average value 12 corresponding to the common mode voltage of the inverter output changes greatly in a stepwise manner when the potential of the phase where the switching is stopped is switched.

図２は、本発明の第１実施例に係るスイッチング方法を示す。   FIG. 2 shows a switching method according to the first embodiment of the present invention.

図２（ａ）において、１１ａはインバータＵ相出力指令、１１ｂはインバータＶ相出力指令、１１ｃはインバータＷ相出力指令、１２は三相の出力指令の平均値である。これらインバータの出力指令は、制御部３ａが演算して求めた値である。本実施例では、停止する相の電位をインバータの入力直流電圧の下電位あるいは上電位に固定する。図２は停止する相の電位を、下素子を導通させて下電位だけに限った場合を表している。   In FIG. 2A, 11a is an inverter U-phase output command, 11b is an inverter V-phase output command, 11c is an inverter W-phase output command, and 12 is an average value of three-phase output commands. The output commands of these inverters are values calculated by the control unit 3a. In this embodiment, the potential of the phase to be stopped is fixed at the lower potential or the upper potential of the input DC voltage of the inverter. FIG. 2 shows a case where the potential of the phase to be stopped is limited to only the lower potential by turning on the lower element.

本実施例の場合、図２（ａ）のようにスイッチングを停止する相が切り換っても、ステップ的な電圧変化は生じない。このため、図２（ｂ）、２（ｃ）のようにフィルタ回路内のコモンモード電流１３や漏れ電流１４の増大をまねかず、フィルタ回路も大型化せずに、二相変調による素子のスイッチング損失低減を実現できる。   In the case of this embodiment, even if the phase for stopping switching is switched as shown in FIG. For this reason, as shown in FIGS. 2B and 2C, the common mode current 13 and the leakage current 14 in the filter circuit are not increased, and the element is switched by two-phase modulation without increasing the size of the filter circuit. Loss reduction can be realized.

本発明の第２実施例を、図３を用いて説明する。   A second embodiment of the present invention will be described with reference to FIG.

図３（ａ）は、三相変調から二相変調に切り替わる時の出力指令１１ａ〜１１ｃとそれらの平均値１２を表している。本実施例では、この切り換りにおいて特性Ａのように、出力指令の平均が緩やかに変化するように、制御部３ａは各出力指令を設定する。この指令値と三角波キャリアとを比較してスイッチングした場合、インバータ出力のコモンモード電圧もまた、二相変調に切り替わる時に緩やかな傾きをもつ。フィルタ回路内の共振周波数に応じた振動を十分抑えられる程度にこの傾きを緩やかにすることで、三相変調と二相変調を併用する場合にも、図３（ｂ）、３（ｃ）のようにフィルタ回路内のコモンモード電流１３及び漏れ電流１４の増大を抑えることが可能となる。   FIG. 3A shows output commands 11a to 11c and their average value 12 when switching from three-phase modulation to two-phase modulation. In the present embodiment, the control unit 3a sets each output command so that the average of the output commands changes gently as in the characteristic A in this switching. When switching is performed by comparing this command value with the triangular wave carrier, the common mode voltage of the inverter output also has a gentle slope when switching to two-phase modulation. 3 (b) and 3 (c) also in the case of using three-phase modulation and two-phase modulation together by making the inclination gentle enough to suppress vibration according to the resonance frequency in the filter circuit. Thus, it becomes possible to suppress the increase of the common mode current 13 and the leakage current 14 in the filter circuit.

本発明の第３実施例を、図４を用いて説明する。   A third embodiment of the present invention will be described with reference to FIG.

本実施例では、インバータの出力周期に合わせてスイッチングを停止する相の電位が上電位と下電位とで交互に切り換る一般的な二相変調において、第２実施例の三相変調と二相変調の切り換り時と同様、制御部３ａは図４（ａ）特性Ｂのように、コモンモード電圧１２のステップ変化が、図１３（ａ）のような従来例に比べ緩やかになるように各出力指令を決定する。これにより、一般的な二相変調でも図４（ｂ）、４（ｃ）のように、フィルタ回路内のコモンモード電流１３及び漏れ電流１４の増大が抑えられる。   In this embodiment, in the general two-phase modulation in which the potential of the phase where switching is stopped according to the output cycle of the inverter is alternately switched between the upper potential and the lower potential, the three-phase modulation and the two-phase modulation of the second embodiment are performed. As in the case of switching of the phase modulation, the control unit 3a makes the step change of the common mode voltage 12 more gradual than the conventional example as shown in FIG. Determine each output command. Thereby, even in general two-phase modulation, as shown in FIGS. 4B and 4C, an increase in the common mode current 13 and the leakage current 14 in the filter circuit can be suppressed.

第１実施例のようにスイッチングを停止する相を上電位または下電位のどちらか一方に限定した場合、インバータの上素子と下素子とで通電の割合が異なって導通損失による温度上昇が偏ってしまい、温度の高い素子の信頼性が低下するなどの問題が生じうる。しかし、本実施例のスイッチング方法を用いて通常の二相変調を行うことで、素子の損失を均一に保ち、ヒートシンクの大型化や素子の劣化を防ぐことができる。   When the phase for stopping switching is limited to either the upper potential or the lower potential as in the first embodiment, the ratio of energization is different between the upper element and the lower element of the inverter, and the temperature rise due to conduction loss is biased. As a result, problems such as a decrease in the reliability of elements having a high temperature may occur. However, by performing normal two-phase modulation using the switching method of this embodiment, it is possible to keep the element loss uniform and prevent the heat sink from becoming larger and the element from deteriorating.

本発明の第４実施例を、図５を用いて説明する。   A fourth embodiment of the present invention will be described with reference to FIG.

本実施例では、インバータの出力周期に合わせてスイッチングを停止する相の電位を上電位と下電位に交互に切り換える第３実施例に対して、制御部３ａは上電位あるいは下電位となる期間を交互に連続させることで、全体に占める切り換え期間の割合を減らしている。   In the present embodiment, in contrast to the third embodiment in which the phase potential for stopping switching is alternately switched between the upper potential and the lower potential in accordance with the output cycle of the inverter, the control unit 3a has a period during which the upper potential or the lower potential is set. By alternately continuing, the ratio of the switching period to the whole is reduced.

前述の第３実施例（図４）の場合、スイッチングを停止する相の電位が上電位と下電位とで切り換る際に、コモンモード電圧１２が緩やかに変化する移行期間Ｂにおいては、全ての相がスイッチングする。このため、スイッチングを停止する相が含まれる期間（二相変調駆動期間）に比べて移行期間Ｂではスイッチング損失が増えてしまう。一方、第１実施例のようにスイッチングを停止する相の電位を、上電位あるいは下電位のどちらか一方に偏らせた場合には、素子の導通損失も偏るという問題がある。本第４実施例では図５（ａ）のように、スイッチングを停止する相の電位が上電位または下電位となる期間を、切り換りの期間Ｄに比べて十分長くすることで、スイッチング損失の増大を抑えると同時に、導通損失の偏りによる温度上昇の偏りも防ぐことができる。   In the case of the third embodiment described above (FIG. 4), all the transition periods B in which the common mode voltage 12 changes gradually when the potential of the phase where switching is stopped are switched between the upper potential and the lower potential. The phases of are switched. For this reason, the switching loss increases in the transition period B compared to the period (two-phase modulation driving period) in which the phase in which switching is stopped is included. On the other hand, when the potential of the phase where switching is stopped is biased to either the upper potential or the lower potential as in the first embodiment, there is a problem that the conduction loss of the element is also biased. In the fourth embodiment, as shown in FIG. 5A, the switching loss is achieved by making the period in which the phase of the phase in which switching is stopped become the upper potential or the lower potential sufficiently longer than the switching period D. In addition, the temperature increase due to the conduction loss can be prevented.

本発明の第５実施例を、図６を用いて説明する。   A fifth embodiment of the present invention will be described with reference to FIG.

スイッチングを停止する相の電位が上電位となる期間と下電位となる期間を、それぞれある程度連続させながら交互に切り換える点は図５と同様である。しかし、本実施例で制御部３ａは、スイッチングを停止する相の電位の切り換えを、特性Ｅのように三相の出力電圧の平均値１２がより０（図では中間点０．００）に近いタイミングで行うことにより、その変化量も図５の第４実施例に比べて小さくなっている。切り換えの際の傾きは、漏れ電流やフィルタ回路内のコモンモード電流の低減レベルによって決まる。傾きが決まれば、変化量が小さいほど切換の期間が短いことになる。この期間は三相全てがスイッチングしている状態であるため、切換期間が短くなることでスイッチング損失は一層低減される。   Similar to FIG. 5, the period in which the potential of the phase in which switching is stopped becomes the upper potential and the period in which the potential becomes the lower potential are alternately switched while continuing to some extent. However, in the present embodiment, the control unit 3a switches the potential of the phase for which switching is stopped, and the average value 12 of the three-phase output voltages is closer to 0 (midpoint 0.00 in the figure) as in the characteristic E. By performing at the timing, the amount of change is also smaller than in the fourth embodiment of FIG. The slope at the time of switching is determined by the leakage current and the reduction level of the common mode current in the filter circuit. If the inclination is determined, the switching period is shorter as the change amount is smaller. Since all three phases are switched during this period, the switching loss is further reduced by shortening the switching period.

本発明の第６実施例を、図７、図８を用いて説明する。   A sixth embodiment of the present invention will be described with reference to FIGS.

いずれの図も電力変換装置としてコンバータとインバータを使用し、三相変調方式で動作させた場合を示している。図７（ａ）の１１ａはインバータＵ相出力指令、１１ｂはインバータＶ相出力指令、１１ｃはインバータＷ相出力指令、１５はインバータのキャリアである。図７（ｂ）の１６ａはコンバータＲ相の出力指令、１６ｂはコンバータＳ相の出力指令、１６ｃはコンバータＴ相の出力指令、１７はコンバータのキャリア、図７（ｃ）の１８はコンバータとインバータそれぞれのコモンモード電圧の電位差を示す。   Both figures show a case where a converter and an inverter are used as a power conversion device and operated by a three-phase modulation method. In FIG. 7A, 11a is an inverter U-phase output command, 11b is an inverter V-phase output command, 11c is an inverter W-phase output command, and 15 is an inverter carrier. In FIG. 7B, 16a is an output command of the converter R phase, 16b is an output command of the converter S phase, 16c is an output command of the converter T phase, 17 is a carrier of the converter, 18 of FIG. 7C is a converter and an inverter. The potential difference of each common mode voltage is shown.

図７はコンバータのキャリアとインバータのキャリアの周波数が同一で位相が１８０°ずれている場合、図８はキャリアの周波数が同一で、位相も同一の場合を表している。コンバータとインバータはそれぞれの電圧指令とキャリアを比較して上下のスイッチング素子を交互にスイッチングするため、コンバータとインバータのそれぞれからキャリアに同期したコモンモード電圧が発生する。この二つの電位差が、漏れ電流やフィルタ回路内のコモンモード電流の原因となるが、図７に比べて図８のように二つのキャリアを同期させた場合、その電位差は小さくなり、漏れ電流やフィルタ回路内のコモンモード電流が最も小さくなることから、フィルタも小型化できる。   FIG. 7 shows the case where the frequency of the carrier of the converter and the carrier of the inverter are the same and the phase is shifted by 180 °, and FIG. 8 shows the case where the frequency of the carrier is the same and the phase is the same. Since the converter and the inverter compare the voltage command and the carrier and switch the upper and lower switching elements alternately, a common mode voltage synchronized with the carrier is generated from each of the converter and the inverter. These two potential differences cause a leakage current and a common mode current in the filter circuit. However, when two carriers are synchronized as shown in FIG. 8 compared to FIG. 7, the potential difference becomes smaller, and the leakage current and Since the common mode current in the filter circuit is minimized, the filter can also be reduced in size.

本発明の第７実施例を、図９を用いて説明する。   A seventh embodiment of the present invention will be described with reference to FIG.

ここでは、インバータに加えてコンバータも二相変調の場合で、それぞれのスイッチングを停止する相の電位の切り換り期間Ｅ，Ｆにおいて、コモンモード電圧の変化に傾きをつけた状態を表している。これにより、インバータだけでなくコンバータでも二相変調することで、漏れ電流やフィルタ回路内のコモンモード電流を増大させることなく、素子のスイッチング損失の低減を実現できる。   Here, in addition to the inverter, the converter is also in the case of two-phase modulation, and represents a state in which the change of the common mode voltage is inclined in the potential switching periods E and F of the phases in which the switching is stopped. . Thus, by performing two-phase modulation not only with the inverter but also with the converter, it is possible to reduce the switching loss of the element without increasing the leakage current and the common mode current in the filter circuit.

本発明の第８実施例を、図１０を用いて説明する。   An eighth embodiment of the present invention will be described with reference to FIG.

図１０は、図６の第５実施例で示したスイッチング方法をインバータに加えてコンバータにも適用している状態を表している。更に本実施例では、コンバータとインバータとで、スイッチングを停止する相の電位切替を同時に行うと共に、スイッチングを停止する相の電位を一致させる。このように、コンバータとインバータとの間に発生する電位差を極力小さくすることで、漏れ電流やフィルタ回路内のコモンモード電流を最小限に抑えることができる。   FIG. 10 shows a state where the switching method shown in the fifth embodiment of FIG. 6 is applied to the converter in addition to the inverter. Further, in this embodiment, the converter and the inverter simultaneously switch the potential of the phase for which switching is stopped, and match the potential of the phase for which switching is stopped. Thus, by reducing the potential difference generated between the converter and the inverter as much as possible, the leakage current and the common mode current in the filter circuit can be minimized.

以上の説明はこの発明の実施の形態であって、この発明の装置及び方法を限定するものではなく、様々な変形例を容易に実施することができるものである。例えば、上記実施形態に開示されている複数の構成要素の適宜な組み合せにより種々の発明を構成できる。   The above description is an embodiment of the present invention, and does not limit the apparatus and method of the present invention, and various modifications can be easily implemented. For example, various inventions can be configured by appropriately combining a plurality of constituent elements disclosed in the embodiment.

１…電源、２…インダクタンス素子、３…電力変換装置、４…低インピーダンス回路、５…負荷、２１…コンバータ、２２…インバータ、２５…三相交流電源、２６インダクタンス素子、２７…コンデンサ、２８…コモンモード電流抽出回路。   DESCRIPTION OF SYMBOLS 1 ... Power supply, 2 ... Inductance element, 3 ... Power converter, 4 ... Low impedance circuit, 5 ... Load, 21 ... Converter, 22 ... Inverter, 25 ... Three-phase alternating current power supply, 26 Inductance element, 27 ... Capacitor, 28 ... Common mode current extraction circuit.

Claims (9)

漏れ電流を低減するフィルタ回路を取り付けた電力変換装置のスイッチング方法において、
スイッチングを停止する相の電位を、前記電力変換装置の上スイッチング素子を導通させて上電位に固定するか、あるいは下スイッチング素子を導通させて下電位に固定するか、どちらか一方に限定したことを特徴とするスイッチング方法。 In the switching method of the power conversion device attached with the filter circuit for reducing the leakage current,
The phase potential to stop switching is limited to either the upper switching element of the power conversion device and fixed at the upper potential, or the lower switching element is fixed and fixed to the lower potential. A switching method characterized by the above. 漏れ電流を低減するフィルタ回路を取り付けた前記電力変換装置のスイッチング方法において、
スイッチングを停止する相を含む状態と含まない状態とを切り換える際に、全相の出力指令の平均を緩やかに変化させることを特徴とするスイッチング方法。 In the switching method of the power conversion device to which a filter circuit for reducing leakage current is attached,
A switching method characterized in that, when switching between a state including a phase for which switching is stopped and a state not including a phase, an average of output commands for all phases is gradually changed. スイッチングを停止する相の電位を、上素子を導通させて上電位に固定する状態と、下素子を導通させて下電位に固定する状態とを前記電力変換装置の出力の周期に合わせて交互に切り換え、その切り換りにおいて全相の出力指令の平均を緩やかに変化させることを特徴とするスイッチング方法。   The state in which the switching is stopped is alternately switched between the state in which the upper element is made conductive and fixed at the upper potential and the state in which the lower element is made conductive and fixed at the lower potential in accordance with the output cycle of the power converter. A switching method characterized in that the average of the output commands of all phases is gradually changed at the time of switching. 前記スイッチングを停止する相の電位を、上素子を導通させて上電位に固定する状態と、下素子を導通させて下電位に固定する状態とを、前記電力変換装置の周期より長い周期で交互に切り換えることを特徴とする請求項３に記載のスイッチング方法。   The state in which the switching is stopped is alternately switched between the state in which the upper element is made conductive and fixed at the upper potential and the state in which the lower element is made conductive and fixed at the lower potential in a cycle longer than the cycle of the power converter. The switching method according to claim 3, wherein switching is performed. 前記スイッチングを停止する相の電位を上電位と下電位とで切り換る際に、全相の出力指令の平均値の変化が小さな量になるように、切り換りのタイミングを選択することを特徴とする請求項４に記載のスイッチング方法。   When switching the phase potential for stopping the switching between the upper potential and the lower potential, the switching timing should be selected so that the change in the average value of the output command for all phases becomes a small amount. The switching method according to claim 4, wherein: 漏れ電流を低減するフィルタ回路を取り付けた電力変換装置のスイッチング方法において、
前記電力変換装置がＰＷＭコンバータとＰＷＭインバータとで構成され、それぞれのキャリアの位相を合わせてスイッチングを同期させたことを特徴とするスイッチング方法。 In the switching method of the power conversion device attached with the filter circuit for reducing the leakage current,
A switching method characterized in that the power conversion device is composed of a PWM converter and a PWM inverter, and the phases of the carriers are matched to synchronize the switching. 前記ＰＷＭコンバータと前記ＰＷＭインバータのいずれか一方または両方において、スイッチングを停止する相の電位の切り換り、あるいはスイッチングを停止する相を含む状態と含まない状態との切り換りで、全相の出力指令の平均を緩やかに変化させることを特徴とする請求項６に記載のスイッチング方法。   In either one or both of the PWM converter and the PWM inverter, switching of the phase potential for stopping switching, or switching between a state including and not including a phase for stopping switching, The switching method according to claim 6, wherein an average of the output commands is gradually changed. 前記ＰＷＭコンバータと前記ＰＷＭインバータとの間で、スイッチングを停止する相の電位の切り換り、あるいはスイッチングを停止する相を含む状態と含まない状態との切り換りのタイミングを合わせ、更に両者のスイッチングを停止する相の電位を一致させることを特徴とする請求項６に記載のスイッチング方法。   Between the PWM converter and the PWM inverter, the timing of switching of the phase potential for stopping the switching, or the timing of switching between the state including the phase for stopping the switching and the state not including the phase is adjusted. The switching method according to claim 6, wherein the potentials of the phases in which switching is stopped are matched. 前記フィルタ回路は、
電源と電力変換装置の間又は前記電力変換装置と負荷の間又は前記電力変換装置の内部のいずれかに設けられ、漏れ電流に対して高いインピーダンスを示すインダクタンス素子と、
前記電力変換装置の出力端と入力端、又は前記電力変換装置の出力端と入力側中性点とを結ぶ前記インダクタンス素子を含む経路内に設けられ、漏れ電流をバイパスする低インピーダンス回路とで構成されることを特徴とする請求項１乃至８のいずれか１項に記載のスイッチング方法。 The filter circuit is
An inductance element that is provided either between a power source and a power conversion device or between the power conversion device and a load or inside the power conversion device, and exhibits high impedance with respect to a leakage current;
A low impedance circuit that is provided in a path including the inductance element that connects the output terminal and the input terminal of the power converter, or the output terminal of the power converter and the neutral point on the input side, and bypasses a leakage current. The switching method according to claim 1, wherein the switching method is performed.
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