JP2012008817A - 半導体メモリカード - Google Patents
半導体メモリカード Download PDFInfo
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- JP2012008817A JP2012008817A JP2010144375A JP2010144375A JP2012008817A JP 2012008817 A JP2012008817 A JP 2012008817A JP 2010144375 A JP2010144375 A JP 2010144375A JP 2010144375 A JP2010144375 A JP 2010144375A JP 2012008817 A JP2012008817 A JP 2012008817A
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- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
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Abstract
【解決手段】本発明の一つの実施形態によれば、半導体メモリカードは、半導体メモリ1及び半導体メモリ1に対するデータの読み書きを制御するコントローラ2が一方の面に実装され、半導体メモリ1に対するデータの入出力のための電極端子3が他方の面に設けられたプリント基板10を備え、プリント基板10の一方の面が樹脂20で封止されてカード状に成型される。プリント基板10の電極端子3が設けられた側の面の予め定められた領域内のソルダレジスト13の上にインク層50を有し、インク層50にはレーザで施された刻印51によって情報が表示されている。刻印51はインク層50の下のソルダレジスト13によって隠蔽されたCu配線12に到達していない。
【選択図】図2
Description
図1は、第1の実施の形態に係る半導体メモリカードとしてのmicroSDメモリカードの平面図である。図2は、第1の実施の形態に係るmicroSDメモリカードの断面図である。なお、図2は、図1におけるII−II断面を示している。プリント基板10の一方の面には、半導体メモリ1と、半導体メモリ1に対するデータの書き込み及び読み出しを行うコントローラ2とが実装されている。プリント基板10の他方の面には、データの読み書きのための外部端子としての電極端子3や半導体メモリ1を単体でテストするためのテスト用端子4が設けられている。プリント基板10の半導体メモリ1やコントローラ2などの電子部品が実装された側の面は、樹脂モールド20によって基板全面が封止されている。プリント基板10に実装する半導体メモリ1の数は任意であるが、半導体メモリ1及びコントローラ2をそれぞれ一つとすることで、microSDメモリカードの構造や組立作業が簡素化され、製造コストを低減できる。
図9は、第2の実施の形態に係る半導体メモリカードとしてのmicroSDメモリカードの断面図である。microSDメモリカードの構成は第1の実施の形態とほぼ同様であるが、本実施の形態においてはインク層50が実施の形態1よりも薄く形成されている。
図10は、第3の実施の形態に係る半導体メモリカードとしてのmicroSDメモリカードの平面図である。図11は、第3の実施の形態に係るmicroSDメモリカードの断面図である。なお、図11は、図10におけるXI−XI断面を示している。microSDメモリカードの構造は、第1、第2の実施の形態とほぼ同様であるが、本実施の形態ではインク層は設けられていない。また、第1の実施の形態に係るmicroSDメモリカードと比較すると、テスト用端子4が電極端子3に近い位置に集められており、電極端子3と反対側の端部近傍には、端子面側にCu配線12が存在しない領域(印字領域70)が設けられている。印字領域70内のソルダレジスト13には、刻印13aが形成されている。
Claims (5)
- 半導体メモリを含む電子部品が一方の面に実装され、前記半導体メモリに対するデータの入出力のための外部端子が他方の面に設けられたプリント基板を備え、該プリント基板の前記一方の面が樹脂で封止されてカード状に成型された半導体メモリカードであって、
前記プリント基板は、基材としてのコア材の両面に、前記電子部品及び前記外部端子を接続する金属配線と、前記コア材の表面及び前記金属配線を覆うソルダレジストとを順に積層した積層体であり、
前記プリント基板の前記外部端子が設けられた側の面の予め定められた領域内の前記ソルダレジストの上にインク層を有し、
前記インク層にはレーザで施された刻印によって情報が表示されており、
前記刻印は、前記インク層の下の前記ソルダレジストによって隠蔽された前記金属配線に到達していないことを特徴とする半導体メモリカード。 - 前記刻印が、前記インク層の下の前記ソルダレジストに到達していないことを特徴とする請求項1記載の半導体メモリカード。
- 半導体メモリを含む電子部品が一方の面に実装され、前記半導体メモリに対するデータの入出力のための外部端子が他方の面に設けられたプリント基板を備え、該プリント基板の前記一方の面が樹脂で封止されてカード状に成型された半導体メモリカードであって、
前記プリント基板は、基材としてのコア材の両面に、前記電子部品及び前記外部端子を接続する金属配線と、前記コア材の表面及び前記金属配線を覆うソルダレジストとを順に積層した積層体であり、
前記外部端子が設けられた面の予め定められた領域には前記金属配線が配置されていない印字領域が形成されており、
前記印字領域内の前記ソルダレジストにはレーザで施された刻印によって情報が表示されていることを特徴とする半導体メモリカード。 - 前記印字領域内の前記コア材のいずれか片側の表面に、電気的に孤立したフローティング配線を備えることを特徴とする請求項3記載の半導体メモリカード。
- 前記樹脂で封止された面の上に、前記半導体メモリに予め記録されたデータと関連付けられた情報が表示されたことを特徴とする請求項1から4のいずれか1項記載の半導体メモリカード。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2010144375A JP2012008817A (ja) | 2010-06-25 | 2010-06-25 | 半導体メモリカード |
US13/052,164 US20110315984A1 (en) | 2010-06-25 | 2011-03-21 | Semiconductor memory card and method of manufacturing the same |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2010144375A JP2012008817A (ja) | 2010-06-25 | 2010-06-25 | 半導体メモリカード |
Publications (1)
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JP2012008817A true JP2012008817A (ja) | 2012-01-12 |
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2010144375A Pending JP2012008817A (ja) | 2010-06-25 | 2010-06-25 | 半導体メモリカード |
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US (1) | US20110315984A1 (ja) |
JP (1) | JP2012008817A (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2015005141A (ja) * | 2013-06-20 | 2015-01-08 | 株式会社東芝 | 半導体記憶装置及び製造方法 |
Families Citing this family (23)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR102014088B1 (ko) * | 2012-03-20 | 2019-08-26 | 엘지이노텍 주식회사 | 메모리카드, 메모리 카드용 인쇄회로기판 및 이의 제조 방법 |
USD730908S1 (en) * | 2014-05-02 | 2015-06-02 | Samsung Electronics Co., Ltd. | Memory card |
USD730907S1 (en) * | 2014-05-02 | 2015-06-02 | Samsung Electronics Co., Ltd. | Memory card |
USD730910S1 (en) * | 2014-05-02 | 2015-06-02 | Samsung Electronics Co., Ltd. | Memory card |
USD727911S1 (en) * | 2014-06-27 | 2015-04-28 | Samsung Electronics Co., Ltd. | Memory card |
USD729251S1 (en) * | 2014-06-27 | 2015-05-12 | Samsung Electronics Co., Ltd. | Memory card |
USD727913S1 (en) * | 2014-06-27 | 2015-04-28 | Samsung Electronics Co., Ltd. | Memory card |
USD727912S1 (en) * | 2014-06-27 | 2015-04-28 | Samsung Electronics Co., Ltd. | Memory card |
USD730909S1 (en) * | 2014-06-27 | 2015-06-02 | Samsung Electronics Co., Ltd. | Memory card |
USD736213S1 (en) * | 2014-07-01 | 2015-08-11 | Samsung Electronics Co., Ltd. | Memory card |
USD736215S1 (en) * | 2014-07-01 | 2015-08-11 | Samsung Electronics Co., Ltd. | Memory card |
USD736212S1 (en) * | 2014-07-01 | 2015-08-11 | Samsung Electronics Co., Ltd. | Memory card |
USD736214S1 (en) * | 2014-07-01 | 2015-08-11 | Samsung Electronics Co., Ltd. | Memory card |
USD727910S1 (en) * | 2014-07-02 | 2015-04-28 | Samsung Electronics Co., Ltd. | Memory card |
USD739856S1 (en) * | 2014-07-30 | 2015-09-29 | Samsung Electronics Co., Ltd. | Memory card |
USD736216S1 (en) * | 2014-07-30 | 2015-08-11 | Samsung Electronics Co., Ltd. | Memory card |
JP6383252B2 (ja) * | 2014-10-30 | 2018-08-29 | ルネサスエレクトロニクス株式会社 | 電子装置およびその製造方法 |
USD773466S1 (en) * | 2015-08-20 | 2016-12-06 | Isaac S. Daniel | Combined secure digital memory and subscriber identity module |
USD798868S1 (en) * | 2015-08-20 | 2017-10-03 | Isaac S. Daniel | Combined subscriber identification module and storage card |
USD783621S1 (en) * | 2015-08-25 | 2017-04-11 | Samsung Electronics Co., Ltd. | Memory card |
USD783622S1 (en) * | 2015-08-25 | 2017-04-11 | Samsung Electronics Co., Ltd. | Memory card |
CN107871717B (zh) * | 2016-09-23 | 2020-09-25 | 东芝存储器株式会社 | 半导体装置及其制造方法 |
USD934868S1 (en) * | 2018-02-28 | 2021-11-02 | Sony Corporation | Memory card |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06139381A (ja) * | 1992-10-29 | 1994-05-20 | Aisin Seiki Co Ltd | バーコードの成形方法 |
JP2002279386A (ja) * | 2001-03-19 | 2002-09-27 | Toshiba Corp | 携帯可能電子媒体 |
JP2006128459A (ja) * | 2004-10-29 | 2006-05-18 | Renesas Technology Corp | 半導体装置およびその製造方法 |
JP2009070866A (ja) * | 2007-09-11 | 2009-04-02 | Rohm Co Ltd | 半導体装置 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100255108B1 (en) * | 1997-06-18 | 2000-05-01 | Samsung Electronics Co Ltd | Chip card |
US6040622A (en) * | 1998-06-11 | 2000-03-21 | Sandisk Corporation | Semiconductor package using terminals formed on a conductive layer of a circuit board |
US7174628B1 (en) * | 2005-03-03 | 2007-02-13 | Super Talent Electronics, Inc. | Memory card production using prefabricated cover and molded casing portion |
US8240034B1 (en) * | 2000-01-06 | 2012-08-14 | Super Talent Electronics, Inc. | High throughput manufacturing method for micro flash memory cards |
US6444501B1 (en) * | 2001-06-12 | 2002-09-03 | Micron Technology, Inc. | Two stage transfer molding method to encapsulate MMC module |
JPWO2005081181A1 (ja) * | 2004-02-20 | 2008-01-17 | 株式会社ルネサステクノロジ | Icカードの製造方法およびicカード |
JP2005352790A (ja) * | 2004-06-10 | 2005-12-22 | Sony Corp | 個体メモリカード及びその印字方法 |
US7601563B2 (en) * | 2005-06-10 | 2009-10-13 | Kingston Technology Corporation | Small form factor molded memory card and a method thereof |
JP2007241727A (ja) * | 2006-03-09 | 2007-09-20 | Toshiba Corp | 半導体メモリカード |
-
2010
- 2010-06-25 JP JP2010144375A patent/JP2012008817A/ja active Pending
-
2011
- 2011-03-21 US US13/052,164 patent/US20110315984A1/en not_active Abandoned
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06139381A (ja) * | 1992-10-29 | 1994-05-20 | Aisin Seiki Co Ltd | バーコードの成形方法 |
JP2002279386A (ja) * | 2001-03-19 | 2002-09-27 | Toshiba Corp | 携帯可能電子媒体 |
JP2006128459A (ja) * | 2004-10-29 | 2006-05-18 | Renesas Technology Corp | 半導体装置およびその製造方法 |
JP2009070866A (ja) * | 2007-09-11 | 2009-04-02 | Rohm Co Ltd | 半導体装置 |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2015005141A (ja) * | 2013-06-20 | 2015-01-08 | 株式会社東芝 | 半導体記憶装置及び製造方法 |
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