JP2009070866A - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP2009070866A JP2009070866A JP2007234920A JP2007234920A JP2009070866A JP 2009070866 A JP2009070866 A JP 2009070866A JP 2007234920 A JP2007234920 A JP 2007234920A JP 2007234920 A JP2007234920 A JP 2007234920A JP 2009070866 A JP2009070866 A JP 2009070866A
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- Japan
- Prior art keywords
- metal layer
- semiconductor device
- film substrate
- layer
- marking
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
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- Wire Bonding (AREA)
Abstract
【解決手段】この半導体装置は、主面上に複数の配線リード2が形成されたフィルム基板10と、フィルム基板10の主面上に搭載され、配線リード2と電気的に接続された半導体チップ20と、フィルム基板10の外周部の領域上に形成された金属層7と、フィルム基板10の主面上に、金属層7を覆うように形成されたソルダレジスト層9とを備えている。そして、金属層7が形成されている領域(標印領域6)には、レーザ照射による刻印によって、製品情報が標印されている。
【選択図】図1
Description
2 配線リード(配線層)
3 実装領域
4 接続端子部
5 接続端子部
6 標印領域
7 金属層
8 錫メッキ層
9 ソルダレジスト層(絶縁樹脂層)
10 フィルム基板
20 半導体チップ
21 バンプ
22 アンダーフィル
Claims (6)
- 主面上に配線層が形成されたフィルム基板と、
前記フィルム基板の前記主面上に搭載され、前記配線層と電気的に接続された半導体チップと、
前記フィルム基板の所定領域上に形成された金属層と、
前記フィルム基板の前記主面上に、少なくとも前記金属層を覆うように形成された絶縁樹脂層とを備え、
前記金属層が形成されている領域の少なくとも一部には、レーザ照射による刻印によって、製品情報が標印されていることを特徴とする、半導体装置。 - 前記金属層は、前記配線層と同一材料から構成されていることを特徴とする、請求項1に記載の半導体装置。
- 前記配線層および前記金属層は、それぞれ、銅層から構成されていることを特徴とする、請求項1または2に記載の半導体装置。
- 前記金属層と前記絶縁樹脂層との間には、錫メッキ層がさらに形成されていることを特徴とする、請求項1〜3のいずれか1項に記載の半導体装置。
- 前記金属層は、前記フィルム基板の外周部の領域上に形成されていることを特徴とする、請求項1〜4のいずれか1項に記載の半導体装置。
- 前記フィルム基板は、ポリイミドフィルムを含むことを特徴とする、請求項1〜5のいずれか1項に記載の半導体装置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007234920A JP4969377B2 (ja) | 2007-09-11 | 2007-09-11 | 半導体装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007234920A JP4969377B2 (ja) | 2007-09-11 | 2007-09-11 | 半導体装置 |
Publications (3)
Publication Number | Publication Date |
---|---|
JP2009070866A true JP2009070866A (ja) | 2009-04-02 |
JP2009070866A5 JP2009070866A5 (ja) | 2010-10-14 |
JP4969377B2 JP4969377B2 (ja) | 2012-07-04 |
Family
ID=40606845
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2007234920A Active JP4969377B2 (ja) | 2007-09-11 | 2007-09-11 | 半導体装置 |
Country Status (1)
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JP (1) | JP4969377B2 (ja) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2012008817A (ja) * | 2010-06-25 | 2012-01-12 | Toshiba Corp | 半導体メモリカード |
CN117425948A (zh) * | 2022-01-19 | 2024-01-19 | 新唐科技日本株式会社 | 半导体装置及激光打标方法 |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63263748A (ja) * | 1987-04-22 | 1988-10-31 | Hitachi Ltd | 半導体装置及びその製造方法 |
JPH0334439A (ja) * | 1989-06-30 | 1991-02-14 | Hitachi Ltd | 半導体装置の製造方法 |
JPH0516581A (ja) * | 1991-06-04 | 1993-01-26 | Kyodo Printing Co Ltd | カードの刻印方法 |
JPH0817951A (ja) * | 1994-06-27 | 1996-01-19 | Nec Corp | 半導体装置 |
JP2000332376A (ja) * | 1999-05-25 | 2000-11-30 | Mitsubishi Electric Corp | 半導体装置のマーキング方法 |
JP2003168082A (ja) * | 2001-11-30 | 2003-06-13 | Toppan Forms Co Ltd | Rf−idの検査方法および検査システムおよび検査対象のrf−idフォーム |
-
2007
- 2007-09-11 JP JP2007234920A patent/JP4969377B2/ja active Active
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS63263748A (ja) * | 1987-04-22 | 1988-10-31 | Hitachi Ltd | 半導体装置及びその製造方法 |
JPH0334439A (ja) * | 1989-06-30 | 1991-02-14 | Hitachi Ltd | 半導体装置の製造方法 |
JPH0516581A (ja) * | 1991-06-04 | 1993-01-26 | Kyodo Printing Co Ltd | カードの刻印方法 |
JPH0817951A (ja) * | 1994-06-27 | 1996-01-19 | Nec Corp | 半導体装置 |
JP2000332376A (ja) * | 1999-05-25 | 2000-11-30 | Mitsubishi Electric Corp | 半導体装置のマーキング方法 |
JP2003168082A (ja) * | 2001-11-30 | 2003-06-13 | Toppan Forms Co Ltd | Rf−idの検査方法および検査システムおよび検査対象のrf−idフォーム |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2012008817A (ja) * | 2010-06-25 | 2012-01-12 | Toshiba Corp | 半導体メモリカード |
CN117425948A (zh) * | 2022-01-19 | 2024-01-19 | 新唐科技日本株式会社 | 半导体装置及激光打标方法 |
CN117425948B (zh) * | 2022-01-19 | 2024-05-28 | 新唐科技日本株式会社 | 半导体装置及激光打标方法 |
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JP4969377B2 (ja) | 2012-07-04 |
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