JP2010515275A5 - - Google Patents
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- Publication number
- JP2010515275A5 JP2010515275A5 JP2009544291A JP2009544291A JP2010515275A5 JP 2010515275 A5 JP2010515275 A5 JP 2010515275A5 JP 2009544291 A JP2009544291 A JP 2009544291A JP 2009544291 A JP2009544291 A JP 2009544291A JP 2010515275 A5 JP2010515275 A5 JP 2010515275A5
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor wafer
- vias
- forming
- conductive
- making
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims 10
- 238000000034 method Methods 0.000 claims 7
- 238000007747 plating Methods 0.000 claims 5
- 229920002120 photoresistant polymer Polymers 0.000 claims 4
- 239000007787 solid Substances 0.000 claims 4
- 238000001465 metallisation Methods 0.000 claims 3
- 239000000463 material Substances 0.000 claims 2
- 238000000059 patterning Methods 0.000 claims 2
- 230000015572 biosynthetic process Effects 0.000 claims 1
- 239000004020 conductor Substances 0.000 claims 1
- 238000005755 formation reaction Methods 0.000 claims 1
- 238000007689 inspection Methods 0.000 claims 1
- 239000012212 insulator Substances 0.000 claims 1
- 239000002184 metal Substances 0.000 claims 1
- 229910001092 metal group alloy Inorganic materials 0.000 claims 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims 1
- 229920005591 polysilicon Polymers 0.000 claims 1
- 238000003672 processing method Methods 0.000 claims 1
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US88267106P | 2006-12-29 | 2006-12-29 | |
| PCT/US2007/089061 WO2008083284A2 (en) | 2006-12-29 | 2007-12-28 | Front-end processed wafer having through-chip connections |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2013115456A Division JP5686851B2 (ja) | 2006-12-29 | 2013-05-31 | スルーチップ接続を有するフロントエンドプロセス済ウェハ |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2010515275A JP2010515275A (ja) | 2010-05-06 |
| JP2010515275A5 true JP2010515275A5 (zh) | 2010-10-28 |
Family
ID=39589215
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2009544291A Pending JP2010515275A (ja) | 2006-12-29 | 2007-12-28 | スルーチップ接続を有するフロントエンドプロセス済ウェハ |
| JP2013115456A Active JP5686851B2 (ja) | 2006-12-29 | 2013-05-31 | スルーチップ接続を有するフロントエンドプロセス済ウェハ |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2013115456A Active JP5686851B2 (ja) | 2006-12-29 | 2013-05-31 | スルーチップ接続を有するフロントエンドプロセス済ウェハ |
Country Status (5)
| Country | Link |
|---|---|
| EP (1) | EP2097924A4 (zh) |
| JP (2) | JP2010515275A (zh) |
| KR (1) | KR101088926B1 (zh) |
| CN (1) | CN101663742B (zh) |
| WO (1) | WO2008083284A2 (zh) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102007044685B3 (de) * | 2007-09-19 | 2009-04-02 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | Elektronisches System und Verfahren zur Herstellung eines dreidimensionalen elektronischen Systems |
| FR2987937B1 (fr) * | 2012-03-12 | 2014-03-28 | Altatech Semiconductor | Procede de realisation de plaquettes semi-conductrices |
| JP5925006B2 (ja) * | 2012-03-26 | 2016-05-25 | ルネサスエレクトロニクス株式会社 | 半導体集積回路装置の製造方法 |
Family Cites Families (23)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03218653A (ja) * | 1989-11-13 | 1991-09-26 | Mitsubishi Electric Corp | エアーブリッジ金属配線を具えた半導体装置およびその製造方法 |
| JP3979791B2 (ja) | 2000-03-08 | 2007-09-19 | 株式会社ルネサステクノロジ | 半導体装置およびその製造方法 |
| EP1351288B1 (en) * | 2002-04-05 | 2015-10-28 | STMicroelectronics Srl | Process for manufacturing an insulated interconnection through a body of semiconductor material and corresponding semiconductor device |
| JP4285629B2 (ja) * | 2002-04-25 | 2009-06-24 | 富士通株式会社 | 集積回路を搭載するインターポーザ基板の作製方法 |
| JP3748844B2 (ja) * | 2002-09-25 | 2006-02-22 | Ｎｅｃエレクトロニクス株式会社 | 半導体集積回路およびそのテスト方法 |
| JP4322508B2 (ja) * | 2003-01-15 | 2009-09-02 | 新光電気工業株式会社 | 半導体装置の製造方法 |
| JP4145301B2 (ja) * | 2003-01-15 | 2008-09-03 | 富士通株式会社 | 半導体装置及び三次元実装半導体装置 |
| SE526366C3 (sv) * | 2003-03-21 | 2005-10-26 | Silex Microsystems Ab | Elektriska anslutningar i substrat |
| JP3891299B2 (ja) * | 2003-05-06 | 2007-03-14 | セイコーエプソン株式会社 | 半導体装置の製造方法、半導体装置、半導体デバイス、電子機器 |
| JP4340517B2 (ja) * | 2003-10-30 | 2009-10-07 | Ｏｋｉセミコンダクタ株式会社 | 半導体装置及びその製造方法 |
| TWI228295B (en) * | 2003-11-10 | 2005-02-21 | Shih-Hsien Tseng | IC structure and a manufacturing method |
| JP4114660B2 (ja) * | 2003-12-16 | 2008-07-09 | セイコーエプソン株式会社 | 半導体装置の製造方法、半導体装置、回路基板、電子機器 |
| KR100569590B1 (ko) * | 2003-12-30 | 2006-04-10 | 매그나칩 반도체 유한회사 | 고주파 반도체 장치 및 그 제조방법 |
| TW200535918A (en) * | 2004-03-09 | 2005-11-01 | Japan Science & Tech Agency | Semiconductor device and methods for fabricating the same, semiconductor system having laminated structure, semiconductor interposer, and semiconductor system |
| JP3875240B2 (ja) | 2004-03-31 | 2007-01-31 | 株式会社東芝 | 電子部品の製造方法 |
| JP4492196B2 (ja) * | 2004-04-16 | 2010-06-30 | セイコーエプソン株式会社 | 半導体装置の製造方法、回路基板、並びに電子機器 |
| US7249992B2 (en) * | 2004-07-02 | 2007-07-31 | Strasbaugh | Method, apparatus and system for use in processing wafers |
| JP2006049557A (ja) * | 2004-08-04 | 2006-02-16 | Seiko Epson Corp | 半導体装置 |
| US7906363B2 (en) * | 2004-08-20 | 2011-03-15 | Zycube Co., Ltd. | Method of fabricating semiconductor device having three-dimensional stacked structure |
| JP4524156B2 (ja) * | 2004-08-30 | 2010-08-11 | 新光電気工業株式会社 | 半導体装置及びその製造方法 |
| US7767493B2 (en) * | 2005-06-14 | 2010-08-03 | John Trezza | Post & penetration interconnection |
| US7838997B2 (en) * | 2005-06-14 | 2010-11-23 | John Trezza | Remote chip attachment |
| US7488680B2 (en) | 2005-08-30 | 2009-02-10 | International Business Machines Corporation | Conductive through via process for electronic device carriers |
-
2007
- 2007-12-28 JP JP2009544291A patent/JP2010515275A/ja active Pending
- 2007-12-28 EP EP07870039A patent/EP2097924A4/en not_active Withdrawn
- 2007-12-28 WO PCT/US2007/089061 patent/WO2008083284A2/en active Application Filing
- 2007-12-28 KR KR1020097014823A patent/KR101088926B1/ko active IP Right Grant
- 2007-12-28 CN CN2007800479122A patent/CN101663742B/zh active Active
-
2013
- 2013-05-31 JP JP2013115456A patent/JP5686851B2/ja active Active
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