JP2010232314A - 電子部品モジュール - Google Patents
電子部品モジュール Download PDFInfo
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- JP2010232314A JP2010232314A JP2009076586A JP2009076586A JP2010232314A JP 2010232314 A JP2010232314 A JP 2010232314A JP 2009076586 A JP2009076586 A JP 2009076586A JP 2009076586 A JP2009076586 A JP 2009076586A JP 2010232314 A JP2010232314 A JP 2010232314A
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
- H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
- H05K1/113—Via provided in pad; Pad over filled via
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L24/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L24/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/12105—Bump connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. bumps on chip-scale packages
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
- H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
- H01L2224/241—Disposition
- H01L2224/24151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/24221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/24225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73267—Layer and HDI connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
- H01L2224/9222—Sequential connecting processes
- H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
- H01L2224/92244—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a build-up interconnect
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
- H05K1/0203—Cooling of mounted components
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09218—Conductive traces
- H05K2201/09227—Layout details of a plurality of traces, e.g. escape layout for Ball Grid Array [BGA] mounting
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09627—Special connections between adjacent vias, not for grounding vias
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10007—Types of components
- H05K2201/1003—Non-printed inductor
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10636—Leadless chip, e.g. chip capacitor or resistor
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10674—Flip chip
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/14—Related to the order of processing steps
- H05K2203/1461—Applying or finishing the circuit pattern after another process, e.g. after filling of vias with conductive paste, after making printed resistors
- H05K2203/1469—Circuit made after mounting or encapsulation of the components
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
- H05K3/3442—Leadless components having edge contacts, e.g. leadless chip capacitors, chip carriers
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Dc-Dc Converters (AREA)
Abstract
【解決手段】DC−DCコンバータ用モジュール1では、IC2の電圧出力端子である端子2cとインダクタ部品4の端子42aとを電気的に接続するための配線L1として基板3に設けられたスルーホール16aと、IC2のスイッチング端子である端子2bとインダクタ部品4の端子42bとを電気的に接続するための配線L2として基板に設けられたスルーホール16bとが、インダクタ部品において端子42aと端子42bとが対向する方向(すなわち、基板及びインダクタ部品4長手方向)と交差する方向において対向している。
【選択図】図1
Description
Claims (5)
- 回路部品を含む基板と、
前記基板の一主面側に配置され、前記回路部品と電気的に接続される受動部品と、を備え、
前記基板には、前記回路部品と前記受動部品の第1の端子とを電気的に接続するための第1の配線として、前記第1の端子と接続される第1の電極層、及び前記第1の電極層と接続される第1のスルーホールが設けられていると共に、前記回路部品と前記受動部品の第2の端子とを電気的に接続するための第2の配線として、前記第2の端子と接続される第2の電極層、及び前記第2の電極層と接続される第2のスルーホールが設けられており、
前記第1のスルーホールと前記第2のスルーホールとは、前記第1の端子と前記第2の端子とが対向する方向と交差する方向において対向している、ことを特徴とする電子部品モジュール。 - 前記第1のスルーホール及び前記第2のスルーホールは、前記一主面における前記受動部品の配置領域内に位置している、ことを特徴とする請求項1記載の電子部品モジュール。
- 前記第1の電極層は、前記第1の端子と前記第2の端子とが対向する方向において、前記第1のスルーホールから前記第2のスルーホールの反対側に広がっており、
前記第2の電極層は、前記第1の端子と前記第2の端子とが対向する方向において、前記第2のスルーホールから前記第1のスルーホールの反対側に広がっている、ことを特徴とする請求項1又は2記載の電子部品モジュール。 - 前記基板には、前記第1の配線として第3のスルーホールが設けられていると共に、前記第2の配線として第4のスルーホールが設けられており、
前記第3のスルーホール及び前記第4のスルーホールは、前記一主面に平行な方向において前記回路部品に対し一方の側に位置している、ことを特徴とする請求項1〜3のいずれか一項記載の電子部品モジュール。 - 前記回路部品の中心は、前記一主面に平行な前記方向において前記基板の中心に対し他方の側に位置している、ことを特徴とする請求項4記載の電子部品モジュール。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009076586A JP2010232314A (ja) | 2009-03-26 | 2009-03-26 | 電子部品モジュール |
US12/730,474 US8218331B2 (en) | 2009-03-26 | 2010-03-24 | Electronic component module |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009076586A JP2010232314A (ja) | 2009-03-26 | 2009-03-26 | 電子部品モジュール |
Publications (1)
Publication Number | Publication Date |
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JP2010232314A true JP2010232314A (ja) | 2010-10-14 |
Family
ID=42783980
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2009076586A Pending JP2010232314A (ja) | 2009-03-26 | 2009-03-26 | 電子部品モジュール |
Country Status (2)
Country | Link |
---|---|
US (1) | US8218331B2 (ja) |
JP (1) | JP2010232314A (ja) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103125078B (zh) * | 2010-09-29 | 2015-02-11 | 株式会社村田制作所 | 高频模块 |
US9911720B1 (en) * | 2016-08-19 | 2018-03-06 | Infineon Technologies Americas Corp. | Power switch packaging with pre-formed electrical connections for connecting inductor to one or more transistors |
US11277917B2 (en) | 2019-03-12 | 2022-03-15 | Advanced Semiconductor Engineering, Inc. | Embedded component package structure, embedded type panel substrate and manufacturing method thereof |
US11296030B2 (en) | 2019-04-29 | 2022-04-05 | Advanced Semiconductor Engineering, Inc. | Embedded component package structure and manufacturing method thereof |
US10950551B2 (en) | 2019-04-29 | 2021-03-16 | Advanced Semiconductor Engineering, Inc. | Embedded component package structure and manufacturing method thereof |
JP7222334B2 (ja) * | 2019-09-04 | 2023-02-15 | Tdk株式会社 | 電子部品実装構造 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008060426A (ja) * | 2006-08-31 | 2008-03-13 | Tdk Corp | 電子部品モジュール |
JP2008166760A (ja) * | 2007-12-17 | 2008-07-17 | Matsushita Electric Ind Co Ltd | 電解コンデンサの実装体 |
JP2008192808A (ja) * | 2007-02-05 | 2008-08-21 | Murata Mfg Co Ltd | 積層型電子部品の実装構造 |
Family Cites Families (12)
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US6201701B1 (en) * | 1998-03-11 | 2001-03-13 | Kimball International, Inc. | Integrated substrate with enhanced thermal characteristics |
US6862189B2 (en) * | 2000-09-26 | 2005-03-01 | Kabushiki Kaisha Toshiba | Electronic component, circuit device, method for manufacturing the circuit device, and semiconductor device |
JP4217438B2 (ja) | 2002-07-26 | 2009-02-04 | Fdk株式会社 | マイクロコンバータ |
JP4228677B2 (ja) * | 2002-12-06 | 2009-02-25 | パナソニック株式会社 | 回路基板 |
WO2005086978A2 (en) * | 2004-03-11 | 2005-09-22 | International Rectifier Corporation | Embedded power management control circuit |
WO2006095852A1 (ja) * | 2005-03-10 | 2006-09-14 | Kyocera Corporation | 電子部品モジュール及びその製造方法 |
JP5114041B2 (ja) * | 2006-01-13 | 2013-01-09 | 日本シイエムケイ株式会社 | 半導体素子内蔵プリント配線板及びその製造方法 |
US8064211B2 (en) * | 2006-08-31 | 2011-11-22 | Tdk Corporation | Passive component and electronic component module |
US8058960B2 (en) * | 2007-03-27 | 2011-11-15 | Alpha And Omega Semiconductor Incorporated | Chip scale power converter package having an inductor substrate |
JP4434268B2 (ja) * | 2007-11-28 | 2010-03-17 | Tdk株式会社 | 電子部品モジュール |
JP4833192B2 (ja) * | 2007-12-27 | 2011-12-07 | 新光電気工業株式会社 | 電子装置 |
KR101591492B1 (ko) * | 2008-02-25 | 2016-02-03 | 페어차일드 세미컨덕터 코포레이션 | 집적된 박막 인덕터들을 포함하는 마이크로모듈들 및 이를 제조하는 방법 |
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2009
- 2009-03-26 JP JP2009076586A patent/JP2010232314A/ja active Pending
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2010
- 2010-03-24 US US12/730,474 patent/US8218331B2/en active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008060426A (ja) * | 2006-08-31 | 2008-03-13 | Tdk Corp | 電子部品モジュール |
JP2008192808A (ja) * | 2007-02-05 | 2008-08-21 | Murata Mfg Co Ltd | 積層型電子部品の実装構造 |
JP2008166760A (ja) * | 2007-12-17 | 2008-07-17 | Matsushita Electric Ind Co Ltd | 電解コンデンサの実装体 |
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US8218331B2 (en) | 2012-07-10 |
US20100246151A1 (en) | 2010-09-30 |
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Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20121106 |