JP2010067941A - 印刷回路基板及びその製造方法 - Google Patents
印刷回路基板及びその製造方法 Download PDFInfo
- Publication number
- JP2010067941A JP2010067941A JP2009015337A JP2009015337A JP2010067941A JP 2010067941 A JP2010067941 A JP 2010067941A JP 2009015337 A JP2009015337 A JP 2009015337A JP 2009015337 A JP2009015337 A JP 2009015337A JP 2010067941 A JP2010067941 A JP 2010067941A
- Authority
- JP
- Japan
- Prior art keywords
- circuit board
- printed circuit
- insulating layer
- conductive layers
- pair
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
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Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/20—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0058—Laminating printed circuit boards onto other substrates, e.g. metallic substrates
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0271—Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/022—Processes for manufacturing precursors of printed circuits, i.e. copper-clad substrates
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0335—Layered conductors or foils
- H05K2201/0352—Differences between the conductors of different layers of a multilayer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0335—Layered conductors or foils
- H05K2201/0355—Metal foils
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09009—Substrate related
- H05K2201/09136—Means for correcting warpage
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
- H05K3/382—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Structure Of Printed Boards (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Laminated Bodies (AREA)
Abstract
【解決手段】本発明による印刷回路基板の製造方法は、一面の粗さが互いに異なるように形成された一対の導電層を提供するステップと、一対の導電層のそれぞれの一面が絶縁層の一面及び他面を向くように絶縁層に一対の導電層をそれぞれ積層するステップと、を含むことを特徴とする。
【選択図】図2
Description
このような印刷回路基板200は、絶縁層230の両面に互いに異なる粗さで形成された銅箔210,220が配置されることにより、パターニングによる各銅箔210,220の残存量が異なる場合にも、残存量の多い銅箔220の粗さを増加させて銅箔220と絶縁層230との間の接着力及び絶縁層230の支持力を増加させることができる。したがって、このような接着力及び支持力で残存量の多い銅箔220の膨脹を抑制することができ、結果的に熱による印刷回路基板200の反りを低減することができる。
110,120 導電層
130 絶縁層
Claims (4)
- 一面の粗さ(roughness)が互いに異なるように形成された一対の導電層を提供するステップと、
前記一対の導電層の一面がそれぞれ絶縁層の一面及び他面を向くように前記絶縁層に前記一対の導電層をそれぞれ積層するステップと、
を含む印刷回路基板の製造方法。 - 前記導電層が、銅箔(copper foil)であることを特徴とする請求項1に記載の印刷回路基板の製造方法。
- 前記絶縁層が、エポキシ(epoxy)樹脂を含むことを特徴とする請求項1または請求項2に記載の印刷回路基板の製造方法。
- エポキシ樹脂を含む絶縁層と、
一面の粗さが互いに異なるように形成され、それぞれの一面が前記絶縁層の一面及び他面を向くように前記絶縁層にそれぞれ積層される一対の銅箔と、
を含む印刷回路基板。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020080088177A KR100999918B1 (ko) | 2008-09-08 | 2008-09-08 | 인쇄회로기판 및 그 제조 방법 |
KR10-2008-0088177 | 2008-09-08 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2010067941A true JP2010067941A (ja) | 2010-03-25 |
JP5082117B2 JP5082117B2 (ja) | 2012-11-28 |
Family
ID=41798230
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2009015337A Expired - Fee Related JP5082117B2 (ja) | 2008-09-08 | 2009-01-27 | 印刷回路基板及びその製造方法 |
Country Status (3)
Country | Link |
---|---|
US (2) | US20100059267A1 (ja) |
JP (1) | JP5082117B2 (ja) |
KR (1) | KR100999918B1 (ja) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102012213917A1 (de) * | 2012-08-06 | 2014-02-20 | Robert Bosch Gmbh | Bauelemente-Ummantelung für ein Elektronikmodul |
JP6036083B2 (ja) * | 2012-09-21 | 2016-11-30 | 株式会社ソシオネクスト | 半導体装置及びその製造方法並びに電子装置及びその製造方法 |
US9325536B2 (en) | 2014-09-19 | 2016-04-26 | Dell Products, Lp | Enhanced receiver equalization |
US9317649B2 (en) | 2014-09-23 | 2016-04-19 | Dell Products, Lp | System and method of determining high speed resonance due to coupling from broadside layers |
US9313056B1 (en) | 2014-11-07 | 2016-04-12 | Dell Products, Lp | System aware transmitter adaptation for high speed serial interfaces |
KR102436225B1 (ko) * | 2017-07-28 | 2022-08-25 | 삼성전기주식회사 | 인쇄회로기판 |
EP3675604B1 (en) * | 2017-08-24 | 2023-02-22 | Amosense Co.,Ltd | Method for producing ceramic substrate, and ceramic substrate |
KR20200127511A (ko) * | 2019-05-02 | 2020-11-11 | 주식회사 아모센스 | 세라믹 기판 및 그의 제조방법 |
CN113540029A (zh) | 2020-04-16 | 2021-10-22 | 奥特斯奥地利科技与***技术有限公司 | 部件承载件以及制造和设计部件承载件的方法 |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH08236939A (ja) * | 1995-02-28 | 1996-09-13 | Matsushita Electric Works Ltd | 多層プリント配線板の製造方法 |
JPH0955444A (ja) * | 1995-08-11 | 1997-02-25 | Hitachi Chem Co Ltd | 半導体パッケージ |
JP2003008161A (ja) * | 2001-06-26 | 2003-01-10 | Matsushita Electric Ind Co Ltd | 導電体、および回路基板 |
JP2004207587A (ja) * | 2002-12-26 | 2004-07-22 | Dowa Mining Co Ltd | 金属−セラミックス接合基板およびその製造方法 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5912809A (en) * | 1997-01-21 | 1999-06-15 | Dell Usa, L.P. | Printed circuit board (PCB) including channeled capacitive plane structure |
CN100475005C (zh) * | 1998-02-26 | 2009-04-01 | 揖斐电株式会社 | 具有充填导电孔构造的多层印刷布线板 |
JP2001287300A (ja) * | 2000-04-04 | 2001-10-16 | Shin Etsu Polymer Co Ltd | 銅張積層基板及びその製造方法 |
KR100502179B1 (ko) | 2002-02-25 | 2005-08-08 | 스마트알앤씨 주식회사 | 인쇄회로기판용 금속 피복 적층체의 제조 방법 |
US6596384B1 (en) * | 2002-04-09 | 2003-07-22 | International Business Machines Corporation | Selectively roughening conductors for high frequency printed wiring boards |
US7001662B2 (en) * | 2003-03-28 | 2006-02-21 | Matsushita Electric Industrial Co., Ltd. | Transfer sheet and wiring board using the same, and method of manufacturing the same |
JP3979391B2 (ja) * | 2004-01-26 | 2007-09-19 | 松下電器産業株式会社 | 回路形成基板の製造方法および回路形成基板の製造用材料 |
US6964884B1 (en) * | 2004-11-19 | 2005-11-15 | Endicott Interconnect Technologies, Inc. | Circuitized substrates utilizing three smooth-sided conductive layers as part thereof, method of making same, and electrical assemblies and information handling systems utilizing same |
US7192654B2 (en) * | 2005-02-22 | 2007-03-20 | Oak-Mitsui Inc. | Multilayered construction for resistor and capacitor formation |
JP4341588B2 (ja) * | 2005-06-09 | 2009-10-07 | 株式会社デンソー | 多層基板及びその製造方法 |
-
2008
- 2008-09-08 KR KR1020080088177A patent/KR100999918B1/ko not_active IP Right Cessation
-
2009
- 2009-01-23 US US12/358,543 patent/US20100059267A1/en not_active Abandoned
- 2009-01-27 JP JP2009015337A patent/JP5082117B2/ja not_active Expired - Fee Related
-
2013
- 2013-03-07 US US13/788,916 patent/US20130186677A1/en not_active Abandoned
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH08236939A (ja) * | 1995-02-28 | 1996-09-13 | Matsushita Electric Works Ltd | 多層プリント配線板の製造方法 |
JPH0955444A (ja) * | 1995-08-11 | 1997-02-25 | Hitachi Chem Co Ltd | 半導体パッケージ |
JP2003008161A (ja) * | 2001-06-26 | 2003-01-10 | Matsushita Electric Ind Co Ltd | 導電体、および回路基板 |
JP2004207587A (ja) * | 2002-12-26 | 2004-07-22 | Dowa Mining Co Ltd | 金属−セラミックス接合基板およびその製造方法 |
Also Published As
Publication number | Publication date |
---|---|
KR100999918B1 (ko) | 2010-12-13 |
US20100059267A1 (en) | 2010-03-11 |
JP5082117B2 (ja) | 2012-11-28 |
KR20100029403A (ko) | 2010-03-17 |
US20130186677A1 (en) | 2013-07-25 |
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