JP2008091445A - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP2008091445A JP2008091445A JP2006268227A JP2006268227A JP2008091445A JP 2008091445 A JP2008091445 A JP 2008091445A JP 2006268227 A JP2006268227 A JP 2006268227A JP 2006268227 A JP2006268227 A JP 2006268227A JP 2008091445 A JP2008091445 A JP 2008091445A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- electrode
- semiconductor device
- semiconductor
- conductivity type
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 85
- 238000009792 diffusion process Methods 0.000 claims abstract description 34
- 239000000758 substrate Substances 0.000 claims description 27
- 238000000926 separation method Methods 0.000 claims description 22
- 230000003071 parasitic effect Effects 0.000 abstract description 28
- 238000002955 isolation Methods 0.000 abstract description 18
- 239000012535 impurity Substances 0.000 abstract description 17
- 238000000605 extraction Methods 0.000 abstract description 16
- 239000010410 layer Substances 0.000 description 214
- 230000015556 catabolic process Effects 0.000 description 11
- 239000011229 interlayer Substances 0.000 description 8
- 238000000034 method Methods 0.000 description 7
- -1 phosphorus ions Chemical class 0.000 description 7
- 230000001133 acceleration Effects 0.000 description 6
- 238000002513 implantation Methods 0.000 description 6
- 238000010438 heat treatment Methods 0.000 description 5
- 229910052698 phosphorus Inorganic materials 0.000 description 5
- 239000011574 phosphorus Substances 0.000 description 5
- 229910052796 boron Inorganic materials 0.000 description 4
- 238000005229 chemical vapour deposition Methods 0.000 description 4
- 238000009413 insulation Methods 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 229910000838 Al alloy Inorganic materials 0.000 description 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 230000002159 abnormal effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000005380 borophosphosilicate glass Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7816—Lateral DMOS transistors, i.e. LDMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/0843—Source or drain regions of field-effect devices
- H01L29/0847—Source or drain regions of field-effect devices of field-effect transistors with insulated gate
- H01L29/0852—Source or drain regions of field-effect devices of field-effect transistors with insulated gate of DMOS transistors
- H01L29/0873—Drain regions
- H01L29/0878—Impurity concentration or distribution
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
- H01L29/0692—Surface layout
- H01L29/0696—Surface layout of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
- H01L29/41725—Source or drain electrodes for field effect devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
- H01L29/41725—Source or drain electrodes for field effect devices
- H01L29/41758—Source or drain electrodes for field effect devices for lateral devices with structured layout for source or drain region, i.e. the source or drain region having cellular, interdigitated or ring structure or being curved or angular
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42364—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity
- H01L29/42368—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity the thickness being non-uniform
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Semiconductor Integrated Circuits (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Abstract
【解決手段】N型のエピタキシャル層2を複数の領域に分離し、隣り合う領域を絶縁するP型の絶縁分離層12を形成する。そして、エピタキシャル層2の表面であって、低濃度のドレイン層9と絶縁分離層12との間に、それらの層に隣接してN型不純物から成る高濃度拡散層13及び電極取り出し層14が形成されている。高濃度拡散層13及び電極取り出し層14はドレイン電極17と接続されている。半導体装置20のソース電極16に過大な正のサージ電圧が生じると、寄生ダイオード25,26に加えて、高濃度拡散層13及び電極取り出し層14を経路として含む寄生ダイオード27がオンしてソース電極16側からドレイン電極17側にESD電流を逃がす。
【選択図】図1
Description
8 高濃度のソース層 9 低濃度のドレイン層 10 高濃度のドレイン層
11 電位固定層 12 絶縁分離層 12a 上分離層 12b 下分離層
13 高濃度拡散層 14 電極取り出し層 15 層間絶縁膜
16 ソース電極 17 ドレイン電極 20 半導体装置
25〜27 寄生ダイオード 30 半導体装置 31〜33 寄生ダイオード
100 半導体基板 101 エピタキシャル層 102 埋め込み層
103 上分離層 104 下分離層 105 ゲート絶縁膜
106 フィールド絶縁膜 107 ゲート電極 108 ボディ層
109 高濃度のソース層 110 高濃度のドレイン層
111 低濃度のドレイン層 112 電位固定層 113 層間絶縁膜
114 ソース電極 115 ドレイン電極 120 半導体装置
121〜123 寄生ダイオード 125 半導体装置
Claims (6)
- 第1導電型の半導体基板上に形成された第2導電型の半導体層と、
前記半導体層の表面に形成されたチャネル領域を含む第1導電型のボディ層と、
前記ボディ層の表面に形成された第2導電型のソース層と、
前記ボディ層の一部上にゲート絶縁膜を介して形成されたゲート電極と、
前記半導体層の表面に形成された第2導電型のドレイン層と、
前記半導体層を複数の領域に分離し、隣り合う分離領域を絶縁する第1導電型の絶縁分離層と、
前記絶縁分離層と隣接し、ドレイン電極と接続された第2導電型の拡散層とを備えることを特徴とする半導体装置。 - 前記半導体基板の底部と前記半導体層との界面に形成された第2導電型の埋め込み層を備え、前記拡散層と前記埋め込み層が接していることを特徴とする請求項1に記載の半導体装置。
- 前記半導体基板はソース電極と接続されていることを特徴とする請求項1または請求項2に記載の半導体装置。
- 前記拡散層は、前記絶縁分離層によって分離された一つの領域の外周に沿って形成されていることを特徴とする請求項1乃至請求項3のいずれかに記載の半導体装置。
- 前記ボディ層内に、前記ソース層と隣接して第1導電型の電位固定層が形成され、
前記拡散層は、前記電位固定層と隣接し、かつ前記電位固定層と前記絶縁分離層との間に形成されていることを特徴とする請求項1乃至請求項4のいずれかに記載の半導体装置。 - 前記半導体層上に前記ゲート絶縁膜よりも厚い絶縁膜が形成され、前記ゲート電極は前記厚い絶縁膜の一部上に延在していることを特徴とする請求項1乃至請求項5のいずれかに記載の半導体装置。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006268227A JP5431637B2 (ja) | 2006-09-29 | 2006-09-29 | 半導体装置 |
US11/861,829 US8546877B2 (en) | 2006-09-29 | 2007-09-26 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006268227A JP5431637B2 (ja) | 2006-09-29 | 2006-09-29 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2008091445A true JP2008091445A (ja) | 2008-04-17 |
JP5431637B2 JP5431637B2 (ja) | 2014-03-05 |
Family
ID=39260291
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2006268227A Expired - Fee Related JP5431637B2 (ja) | 2006-09-29 | 2006-09-29 | 半導体装置 |
Country Status (2)
Country | Link |
---|---|
US (1) | US8546877B2 (ja) |
JP (1) | JP5431637B2 (ja) |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009278100A (ja) * | 2008-05-16 | 2009-11-26 | Asahi Kasei Electronics Co Ltd | 横方向半導体デバイスおよびその製造方法 |
JP2010021228A (ja) * | 2008-07-09 | 2010-01-28 | Toshiba Corp | 半導体装置 |
JP2010086988A (ja) * | 2008-09-29 | 2010-04-15 | Sanyo Electric Co Ltd | 半導体装置 |
JP2011159828A (ja) * | 2010-02-01 | 2011-08-18 | Renesas Electronics Corp | 半導体装置及び半導体装置の製造方法 |
JP2011204938A (ja) * | 2010-03-26 | 2011-10-13 | Hitachi Ltd | 半導体装置およびその製造方法 |
JP2014154883A (ja) * | 2013-02-13 | 2014-08-25 | Analog Devices Inc | 送受信機信号絶縁および電圧固定法のための装置、および同装置を形成する方法 |
JP2015216410A (ja) * | 2015-09-04 | 2015-12-03 | セイコーエプソン株式会社 | 半導体装置 |
US10224320B2 (en) | 2017-03-24 | 2019-03-05 | Kabushiki Kaisha Toshiba | Semiconductor device |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4783442B2 (ja) * | 2009-03-18 | 2011-09-28 | 株式会社東芝 | Esd保護検証装置及びesd保護検証方法 |
US9831305B1 (en) * | 2016-05-06 | 2017-11-28 | Vanguard International Semiconductor Corporation | Semiconductor device and method for manufacturing the same |
CN106449636B (zh) | 2016-10-12 | 2019-12-10 | 矽力杰半导体技术(杭州)有限公司 | Esd保护器件及其制造方法 |
JP7077194B2 (ja) * | 2018-09-14 | 2022-05-30 | キオクシア株式会社 | 半導体装置 |
Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03261176A (ja) * | 1990-03-12 | 1991-11-21 | Matsushita Electron Corp | 二重拡散mosトランジスタ |
JPH077094A (ja) * | 1992-09-21 | 1995-01-10 | Siliconix Inc | BiCDMOS構造及びその製造方法 |
JPH09213947A (ja) * | 1996-01-30 | 1997-08-15 | Matsushita Electron Corp | 駆動用半導体集積回路装置 |
JPH10284731A (ja) * | 1997-03-28 | 1998-10-23 | St Microelectron Inc | ショットキーダイオード本体構成体を有するdmosトランジスタ |
JPH10313064A (ja) * | 1997-05-13 | 1998-11-24 | Denso Corp | 半導体装置 |
JP2002026314A (ja) * | 2000-07-06 | 2002-01-25 | Toshiba Corp | 半導体装置 |
JP2002198438A (ja) * | 2000-12-26 | 2002-07-12 | Toshiba Corp | パワーmosトランジスタ |
JP2004253454A (ja) * | 2003-02-18 | 2004-09-09 | Toshiba Corp | 半導体装置 |
JP2006032682A (ja) * | 2004-07-16 | 2006-02-02 | Shindengen Electric Mfg Co Ltd | 横型短チャネルdmos |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3261176B2 (ja) | 1992-11-09 | 2002-02-25 | 太平洋セメント株式会社 | 積層型圧電アクチュエータの取付方法 |
JP2000077532A (ja) * | 1998-09-03 | 2000-03-14 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
KR100432887B1 (ko) * | 2002-03-05 | 2004-05-22 | 삼성전자주식회사 | 다중격리구조를 갖는 반도체 소자 및 그 제조방법 |
JP4171251B2 (ja) | 2002-07-02 | 2008-10-22 | 三洋電機株式会社 | 半導体装置及びその製造方法 |
US7414287B2 (en) * | 2005-02-21 | 2008-08-19 | Texas Instruments Incorporated | System and method for making a LDMOS device with electrostatic discharge protection |
JP4845410B2 (ja) * | 2005-03-31 | 2011-12-28 | 株式会社リコー | 半導体装置 |
-
2006
- 2006-09-29 JP JP2006268227A patent/JP5431637B2/ja not_active Expired - Fee Related
-
2007
- 2007-09-26 US US11/861,829 patent/US8546877B2/en active Active
Patent Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH03261176A (ja) * | 1990-03-12 | 1991-11-21 | Matsushita Electron Corp | 二重拡散mosトランジスタ |
JPH077094A (ja) * | 1992-09-21 | 1995-01-10 | Siliconix Inc | BiCDMOS構造及びその製造方法 |
JPH09213947A (ja) * | 1996-01-30 | 1997-08-15 | Matsushita Electron Corp | 駆動用半導体集積回路装置 |
JPH10284731A (ja) * | 1997-03-28 | 1998-10-23 | St Microelectron Inc | ショットキーダイオード本体構成体を有するdmosトランジスタ |
JPH10313064A (ja) * | 1997-05-13 | 1998-11-24 | Denso Corp | 半導体装置 |
JP2002026314A (ja) * | 2000-07-06 | 2002-01-25 | Toshiba Corp | 半導体装置 |
JP2002198438A (ja) * | 2000-12-26 | 2002-07-12 | Toshiba Corp | パワーmosトランジスタ |
JP2004253454A (ja) * | 2003-02-18 | 2004-09-09 | Toshiba Corp | 半導体装置 |
JP2006032682A (ja) * | 2004-07-16 | 2006-02-02 | Shindengen Electric Mfg Co Ltd | 横型短チャネルdmos |
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009278100A (ja) * | 2008-05-16 | 2009-11-26 | Asahi Kasei Electronics Co Ltd | 横方向半導体デバイスおよびその製造方法 |
JP2010021228A (ja) * | 2008-07-09 | 2010-01-28 | Toshiba Corp | 半導体装置 |
JP4595002B2 (ja) * | 2008-07-09 | 2010-12-08 | 株式会社東芝 | 半導体装置 |
JP2010086988A (ja) * | 2008-09-29 | 2010-04-15 | Sanyo Electric Co Ltd | 半導体装置 |
JP2011159828A (ja) * | 2010-02-01 | 2011-08-18 | Renesas Electronics Corp | 半導体装置及び半導体装置の製造方法 |
JP2011204938A (ja) * | 2010-03-26 | 2011-10-13 | Hitachi Ltd | 半導体装置およびその製造方法 |
JP2014154883A (ja) * | 2013-02-13 | 2014-08-25 | Analog Devices Inc | 送受信機信号絶縁および電圧固定法のための装置、および同装置を形成する方法 |
JP2015216410A (ja) * | 2015-09-04 | 2015-12-03 | セイコーエプソン株式会社 | 半導体装置 |
US10224320B2 (en) | 2017-03-24 | 2019-03-05 | Kabushiki Kaisha Toshiba | Semiconductor device |
Also Published As
Publication number | Publication date |
---|---|
JP5431637B2 (ja) | 2014-03-05 |
US8546877B2 (en) | 2013-10-01 |
US20080079073A1 (en) | 2008-04-03 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP5431637B2 (ja) | 半導体装置 | |
JP4645861B2 (ja) | 半導体装置の製造方法 | |
US10388741B2 (en) | Semiconductor device with arrangement of semiconductor regions for improving breakdown voltages | |
US9171916B1 (en) | LDMOS with thick interlayer-dielectric layer | |
US8735997B2 (en) | Semiconductor device having drain/source surrounded by impurity layer and manufacturing method thereof | |
JP2006261639A (ja) | 半導体装置、ドライバ回路及び半導体装置の製造方法 | |
US11552175B2 (en) | Semiconductor device | |
US9997625B2 (en) | Semiconductor device and method for manufacturing the same | |
US8120104B2 (en) | Semiconductor device and method of manufacturing semiconductor device | |
JP4308096B2 (ja) | 半導体装置及びその製造方法 | |
JP2014143363A (ja) | nチャネル二重拡散MOS型トランジスタおよび半導体複合素子 | |
JP6295444B2 (ja) | 半導体装置 | |
JP2007019200A (ja) | 半導体装置およびその製造方法 | |
US6818950B1 (en) | Increasing switching speed of geometric construction gate MOSFET structures | |
JP2006114768A (ja) | 半導体装置およびその製造方法 | |
JPH04154173A (ja) | 半導体装置 | |
US9911814B2 (en) | Semiconductor device and manufacturing method thereof | |
JP5431663B2 (ja) | 半導体装置及びその製造方法 | |
JP2014207324A (ja) | 半導体装置及びその製造方法 | |
US7335549B2 (en) | Semiconductor device and method for fabricating the same | |
JP2008270367A (ja) | 半導体装置 | |
JP2008153495A (ja) | 半導体装置及びその製造方法 | |
JP5553719B2 (ja) | 半導体装置 | |
JP5784269B2 (ja) | 半導体装置及びその製造方法 | |
JP2006319096A (ja) | ショットキーバリアダイオード |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20090831 |
|
A711 | Notification of change in applicant |
Free format text: JAPANESE INTERMEDIATE CODE: A711 Effective date: 20110531 |
|
RD02 | Notification of acceptance of power of attorney |
Free format text: JAPANESE INTERMEDIATE CODE: A7422 Effective date: 20110602 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20120515 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20120516 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20120807 |
|
A711 | Notification of change in applicant |
Free format text: JAPANESE INTERMEDIATE CODE: A711 Effective date: 20130207 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20130215 |
|
RD02 | Notification of acceptance of power of attorney |
Free format text: JAPANESE INTERMEDIATE CODE: A7422 Effective date: 20130301 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20130805 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20131031 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20131118 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20131205 |
|
R150 | Certificate of patent or registration of utility model |
Free format text: JAPANESE INTERMEDIATE CODE: R150 Ref document number: 5431637 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
LAPS | Cancellation because of no payment of annual fees |