JP2007299900A - 半導体装置と半導体装置の絶縁破壊防止方法 - Google Patents
半導体装置と半導体装置の絶縁破壊防止方法 Download PDFInfo
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Abstract
【解決手段】半導体基体200と該半導体基体上200に形成された内部回路4とを備えた半導体装置1において、前記内部回路4に接続されていないダミーパッド21が、前記半導体基体200に電気的に接続されたシールリング3に、電気的に接続されていることを特徴とする。
【選択図】図1
Description
(2)また、本発明に係る半導体装置の絶縁破壊防止方法は、半導体基板上に内部回路を配し、かつ該内部回路に接続されていないダミーパッドを、前記半導体基板に電気的に接続されたシールリングへ、電気的に接続することを特徴とする。
2 パッド(電極パッド)
21 ダミーパッド
22 能動パッド
3 シールリング
4 内部回路
5a 配線(能動パッド22と内部回路4との接続用)
5b 配線(ダミーパッド21とシールリング3との接続用)
6 スクライブライン
200 Si基板
201 拡散層
202 絶縁膜
203 第1層間絶縁膜
211 第1メタル
212 第2メタル
213 第3メタル
214 第4メタル
215 第5メタル
211a、212a、213a、214a、215a メタルビア
221 第2層間絶縁膜
222 第3層間絶縁膜
223 第4層間絶縁膜
224 第5層間絶縁膜
225 パッシベーション膜
Claims (2)
- 半導体基板と該半導体基板上に形成された内部回路とを備えた半導体装置において、
前記内部回路に接続されていないダミーパッドが、前記半導体基板に電気的に接続されたシールリングに、電気的に接続されていることを特徴とする半導体装置。 - 半導体基板上に内部回路を配し、
かつ該内部回路に接続されていないダミーパッドを、前記半導体基板に電気的に接続されたシールリングへ、電気的に接続することを特徴とする半導体装置の絶縁破壊防止方法。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006126104A JP4820683B2 (ja) | 2006-04-28 | 2006-04-28 | 半導体装置と半導体装置の絶縁破壊防止方法 |
US11/790,035 US7567484B2 (en) | 2006-04-28 | 2007-04-23 | Method of preventing dielectric breakdown of semiconductor device and semiconductor device preventing dielectric breakdown |
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JP2006126104A JP4820683B2 (ja) | 2006-04-28 | 2006-04-28 | 半導体装置と半導体装置の絶縁破壊防止方法 |
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JP2007299900A true JP2007299900A (ja) | 2007-11-15 |
JP2007299900A5 JP2007299900A5 (ja) | 2009-03-26 |
JP4820683B2 JP4820683B2 (ja) | 2011-11-24 |
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JP (1) | JP4820683B2 (ja) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2011222939A (ja) * | 2010-03-24 | 2011-11-04 | Fujitsu Semiconductor Ltd | 半導体ウエハとその製造方法、及び半導体チップ |
JP2015023159A (ja) * | 2013-07-19 | 2015-02-02 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
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KR101470530B1 (ko) * | 2008-10-24 | 2014-12-08 | 삼성전자주식회사 | 일체화된 가드 링 패턴과 공정 모니터링 패턴을 포함하는 반도체 웨이퍼 및 반도체 소자 |
JP5452290B2 (ja) * | 2010-03-05 | 2014-03-26 | ラピスセミコンダクタ株式会社 | 表示パネル |
TWI447889B (zh) * | 2011-08-05 | 2014-08-01 | Chipmos Technologies Inc | 晶片封裝結構 |
US9478505B2 (en) * | 2012-04-12 | 2016-10-25 | Taiwan Semiconductor Manufacturing Co., Ltd. | Guard ring design structure for semiconductor devices |
KR102071336B1 (ko) * | 2013-09-30 | 2020-01-30 | 에스케이하이닉스 주식회사 | 반도체 메모리 장치 |
KR102352316B1 (ko) | 2015-08-11 | 2022-01-18 | 삼성전자주식회사 | 인쇄 회로 기판 |
JP6783648B2 (ja) * | 2016-12-26 | 2020-11-11 | 新光電気工業株式会社 | 配線基板、半導体装置 |
CN110223969B (zh) * | 2018-03-01 | 2021-07-13 | 联华电子股份有限公司 | 具静电放电防护功能的半导体装置及静电放电的测试方法 |
CN113809051B (zh) * | 2021-08-31 | 2022-02-18 | 深圳市时代速信科技有限公司 | 一种半导体器件结构及其制造方法 |
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JPS63141331A (ja) * | 1986-12-03 | 1988-06-13 | Nec Corp | テ−プキヤリア半導体装置用リ−ドフレ−ム |
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JP2004253555A (ja) | 2003-02-19 | 2004-09-09 | Matsushita Electric Ind Co Ltd | 半導体装置及びその製造方法 |
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JP4675159B2 (ja) | 2005-05-26 | 2011-04-20 | パナソニック株式会社 | 半導体装置 |
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2006
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2007
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JPS63141331A (ja) * | 1986-12-03 | 1988-06-13 | Nec Corp | テ−プキヤリア半導体装置用リ−ドフレ−ム |
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Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2011222939A (ja) * | 2010-03-24 | 2011-11-04 | Fujitsu Semiconductor Ltd | 半導体ウエハとその製造方法、及び半導体チップ |
US8742547B2 (en) | 2010-03-24 | 2014-06-03 | Fujitsu Semiconductor Limited | Semiconductor wafer and its manufacture method, and semiconductor chip |
US9685416B2 (en) | 2010-03-24 | 2017-06-20 | Fujitsu Semiconductor Limited | Semiconductor wafer and its manufacture method, and semiconductor chip |
JP2015023159A (ja) * | 2013-07-19 | 2015-02-02 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
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US20070253276A1 (en) | 2007-11-01 |
US7567484B2 (en) | 2009-07-28 |
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