JP2007149955A - Terminal resistance substrate for high frequency and electronic device - Google Patents

Terminal resistance substrate for high frequency and electronic device Download PDF

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JP2007149955A
JP2007149955A JP2005342177A JP2005342177A JP2007149955A JP 2007149955 A JP2007149955 A JP 2007149955A JP 2005342177 A JP2005342177 A JP 2005342177A JP 2005342177 A JP2005342177 A JP 2005342177A JP 2007149955 A JP2007149955 A JP 2007149955A
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conductor
substrate
dielectric substrate
frequency
ground conductor
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Michinobu Iino
道信 飯野
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Kyocera Corp
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Kyocera Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched

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Abstract

<P>PROBLEM TO BE SOLVED: To provide a terminal resistance substrate for high frequency capable of preventing the effect of high frequency signal to the operation of an electronic component, by reflecting and entering a high frequency signal component into the electronic component even in the high frequency signal not less than 10 GHz. <P>SOLUTION: The terminal resistance substrate for high frequency 5 is equipped with a dielectric substrate 5c; a line conductor 5a for high frequency signal transmission formed on one main surface of the dielectric substrate 5c; a high resistor 7 formed on one main surface of the dielectric substrate 5c, and connected to one terminal of the line conductor 5a; and a ground conductor G arranged from the high resistor 7 to the other main surface of the dielectric substrate 5c while being formed so as to be superposed with the line conductor 5a in a plan view from one main surface side of the dielectric substrate 5c. In such a terminal resistance substrate for high frequency 5, a length from the connecting part of the ground conductor G and the high resistor 7 to a site immediately below the connecting part in the other main surface of the dielectric substrate 5c of the ground conductor G is 1/2 times or less of the wavelength of the high frequency signal. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明は、高抵抗体部により高周波信号を終端する機能を有する高周波用終端抵抗基板、特に10ＧＨｚ以上の高周波帯域で使用される高周波用終端抵抗基板およびそれを用いた電子装置に関するものである。   The present invention relates to a high-frequency termination resistor substrate having a function of terminating a high-frequency signal by a high resistance portion, particularly to a high-frequency termination resistor substrate used in a high-frequency band of 10 GHz or more and an electronic device using the same.

従来の高周波用終端抵抗基板を用いた電子装置の使用例として、光通信や無線通信分野に用いられる半導体素子装置を例に説明する。   As an example of use of an electronic device using a conventional high-frequency termination resistor substrate, a semiconductor element device used in the fields of optical communication and wireless communication will be described as an example.

各種半導体素子を収納する半導体素子収納用パッケージには、半導体素子を電気的に接続するための導体パターンとしての線路導体等の配線導体が設けられている。このような半導体素子収納用パッケージの断面図を図５に平面図を図６に示す。同図において、101は基体、102は金属製の枠体、103は蓋体、104は高周波用配線基板、105は高周波用終端抵抗基板である。   A semiconductor element housing package for housing various semiconductor elements is provided with a wiring conductor such as a line conductor as a conductor pattern for electrically connecting the semiconductor elements. A sectional view of such a package for housing a semiconductor element is shown in FIG. 5, and a plan view thereof is shown in FIG. In this figure, 101 is a base, 102 is a metal frame, 103 is a lid, 104 is a high-frequency wiring board, and 105 is a high-frequency termination resistor board.

基体101は鉄（Ｆｅ）−ニッケル（Ｎｉ）−コバルト（Ｃｏ）合金や銅（Ｃｕ）−タングステン（Ｗ）等の金属から成る四角形状の板状体であり、その上側主面には、ＩＣ，ＬＳＩ，半導体レーザ（ＬＤ），フォトダイオード（ＰＤ）等の半導体素子110や、高周波用配線基板104、誘電体基板105を載置する載置部101ａが形成されている。半導体素子110や高周波用配線基板104、高周波用終端抵抗基板105は、載置部101ａに、例えば銀（Ａｇ）ろう，Ａｇ−Ｃｕろう等のろう材や半田、樹脂接着剤によって強固に接着固定される。   The substrate 101 is a quadrangular plate-like body made of a metal such as iron (Fe) -nickel (Ni) -cobalt (Co) alloy or copper (Cu) -tungsten (W). , LSI, semiconductor laser (LD), photodiode (PD) and other semiconductor elements 110, a high-frequency wiring substrate 104, and a mounting portion 101a for mounting the dielectric substrate 105 are formed. The semiconductor element 110, the high-frequency wiring substrate 104, and the high-frequency termination resistor substrate 105 are firmly fixed to the mounting portion 101a with, for example, a brazing material such as silver (Ag) brazing or Ag-Cu brazing, solder, or a resin adhesive. Is done.

半導体素子110は、その電極が高周波用配線基板104および高周波用終端抵抗基板105の表面に被着されている図６の如く配線用線路導体104ａおよび線路導体105ａにそれぞれボンディングワイヤ106ａ，106ｂを介して電気的に接続されている。   The semiconductor element 110 has electrodes connected to the surfaces of the high-frequency wiring substrate 104 and the high-frequency termination resistor substrate 105, as shown in FIG. 6, via the bonding wires 106a and 106b, respectively, to the wiring line conductor 104a and the line conductor 105a. Are electrically connected.

さらに、線路導体105ａと表面接地導体108とは、高抵抗体部107を介して終端接続されており、表面接地導体108は、高周波用終端抵抗基板105の側面やスルーホールなどの表裏導通導体109を介して高周波用終端抵抗基板105の裏面にある裏面接地導体105ｂに電気的に接続され、さらに裏面接地導体105ｂを介して基体101に電気的に接続されている。このように線路導体105ａの終端を高抵抗体部107を介して同一面接地導体108に接続することにより、線路導体105ａに流れる高周波信号の反射を防ぎ、半導体素子110が誤動作するのを防いでいる。   Further, the line conductor 105a and the surface ground conductor 108 are terminated and connected via a high resistance portion 107, and the surface ground conductor 108 is a front and back conductive conductor 109 such as a side surface or a through hole of the high-frequency termination resistor substrate 105. Is electrically connected to the back surface ground conductor 105b on the back surface of the high-frequency termination resistor substrate 105, and is further electrically connected to the base 101 via the back surface ground conductor 105b. In this way, the end of the line conductor 105a is connected to the ground conductor 108 on the same plane via the high resistance portion 107, thereby preventing reflection of the high-frequency signal flowing through the line conductor 105a and preventing the semiconductor element 110 from malfunctioning. Yes.

基体101の上側主面の外周部には載置部101ａを囲繞するようにして枠体102が立設されており、枠体102は基体101とともにその内側に半導体素子110を収容する空所を形成する。枠体102は基体101と同様にＦｅ−Ｎｉ−Ｃｏ合金やＣｕ−Ｗの焼結材等から成り、基体101と一体成形されるか、または基体101にＡｇろう，Ａｇ−Ｃｕろう等のろう材を介してろう付けされるか、またはシーム溶接法等の溶接法により接合されることによって、基体101の上側主面の外周部に立設される。   A frame body 102 is erected on the outer peripheral portion of the upper main surface of the base body 101 so as to surround the mounting portion 101a. The frame body 102 has a space for accommodating the semiconductor element 110 inside thereof together with the base body 101. Form. The frame 102 is made of an Fe—Ni—Co alloy, a Cu—W sintered material, or the like, similar to the base 101, and is integrally formed with the base 101, or is brazed to the base 101 such as Ag solder, Ag—Cu solder, or the like. It is erected on the outer peripheral portion of the upper main surface of the base 101 by being brazed through a material or joined by a welding method such as a seam welding method.

枠体102の側面にはグラスビーズ111が嵌着される貫通孔102ａが形成されており、貫通孔102ａ内にグラスビーズ111を嵌め込むとともに半田等の封着材を貫通孔102ａ内の隙間に挿入し、しかる後、加熱して封着材を溶融させ、溶融した封着材を毛細管現象によりグラスビーズ111と貫通孔102ａの内壁との隙間に充填させることによって、グラスビーズ111が貫通孔102ａ内に封着材を介して嵌着接合される。   A through hole 102a into which the glass beads 111 are fitted is formed on the side surface of the frame 102. The glass beads 111 are fitted into the through holes 102a, and a sealing material such as solder is placed in the gaps in the through holes 102a. The glass beads 111 are inserted into the through-holes 102a by heating and melting the sealing material and filling the melted sealing material into the gap between the glass beads 111 and the inner walls of the through-holes 102a by capillary action. It is fitted and joined through a sealing material.

グラスビーズ111には、中心軸部分に信号線路としてＦｅ−Ｎｉ−Ｃｏ合金等の金属から成る棒状の中心導体が絶縁体であるホウケイ酸ガラスなどを介して固定されている。中心導体は半田等から成る導電性接着材を介して高周波用配線基板104の配線用線路導体104ａに電気的に接続される。このグラスビーズ111には、外部電気回路（図示せず）に接続された同軸ケーブル（図示せず）が装着されることによって、内部に収納された半導体素子110がグラスビーズ111の中心導体を介して外部電気回路に電気的に接続されることとなる。   A rod-shaped center conductor made of a metal such as an Fe—Ni—Co alloy is fixed to the glass bead 111 as a signal line on the center axis portion via a borosilicate glass as an insulator. The central conductor is electrically connected to the wiring line conductor 104a of the high-frequency wiring board 104 through a conductive adhesive made of solder or the like. The glass bead 111 is attached with a coaxial cable (not shown) connected to an external electric circuit (not shown), so that the semiconductor element 110 accommodated therein passes through the central conductor of the glass bead 111. Thus, it is electrically connected to an external electric circuit.

最後に、基体101および枠体102から成る容器内部に半導体素子110を収容し、枠体102の上面に蓋体103をろう付け法やシームウエルド法等の溶接法により接合し、容器内部を気密に封止することによって製品としての半導体装置となる。
特開2005-159127号公報 Finally, the semiconductor element 110 is accommodated inside the container composed of the base body 101 and the frame body 102, and the lid body 103 is joined to the upper surface of the frame body 102 by a welding method such as a brazing method or a seam weld method. By being sealed in, a semiconductor device as a product is obtained.
JP 2005-159127 A

しかしながら、従来の高周波用終端抵抗基板105を使用した半導体素子収納用パッケージにおいては、半導体素子110の高周波化が進むにつれ、高抵抗体部107から基体101にかけて形成される表面接地導体108および表裏導通導体109の寄生インダクタンス成分によって、高抵抗体部107から見たインピーダンス値が変動し、高抵抗体部107の反射損失が増大するという新たな問題が発生してきた。   However, in the package for housing a semiconductor element using the conventional high-frequency termination resistor substrate 105, the surface ground conductor 108 and the front-back conduction formed from the high-resistance part 107 to the base 101 as the frequency of the semiconductor element 110 increases. Due to the parasitic inductance component of the conductor 109, the impedance value viewed from the high resistance portion 107 fluctuates, and a new problem has arisen that the reflection loss of the high resistance portion 107 increases.

本発明は上記問題点に鑑み完成されたものであり、その目的は、高抵抗体部から基体にかけて形成される同一面接地導体および接続導体の寄生インダクタンス成分を打ち消すことにより、10ＧＨｚ以上の高周波信号においても、高抵抗体部で終端し、半導体素子へ高周波信号成分が反射して入り込んで半導体素子の作動に影響を与えるのを防ぐことができる高周波用終端抵抗基板を提供することにある。   The present invention has been completed in view of the above problems, and its purpose is to cancel a parasitic inductance component of the same-surface ground conductor and connection conductor formed from the high-resistance body portion to the base body, thereby enabling a high-frequency signal of 10 GHz or more. However, it is an object of the present invention to provide a high-frequency termination resistor substrate that can be terminated at a high-resistance body portion and prevent the high-frequency signal component from reflecting and entering the semiconductor element to affect the operation of the semiconductor element.

本発明の高周波用終端抵抗基板は、誘電体基板と、該誘電体基板の一主面に形成された高周波信号伝送用の線路導体と、前記誘電体基板の前記一主面に形成されるとともに前記線路導体の一端部に接続された高抵抗体部と、該高抵抗体部から前記誘電体基板の他主面にかけて配設されるとともに、前記誘電体基板の前記一主面側から平面透視して前記線路導体と重なるように形成された接地導体とを具備している高周波用終端抵抗基板において、前記接地導体の前記高抵抗体部との接続部から前記接地導体の前記誘電体基板の他主面における前記接続部直下の部位までの長さが前記高周波信号の波長の１／２倍以下であることを特徴とする高周波用終端抵抗基板。   The high-frequency termination resistor substrate of the present invention is formed on a dielectric substrate, a line conductor for high-frequency signal transmission formed on one principal surface of the dielectric substrate, and the one principal surface of the dielectric substrate. A high resistance portion connected to one end portion of the line conductor, and disposed from the high resistance portion to the other main surface of the dielectric substrate, and in a plan view from the one main surface side of the dielectric substrate A high-frequency terminating resistor substrate having a ground conductor formed so as to overlap the line conductor, and from the connecting portion of the ground conductor to the high-resistance body portion of the dielectric substrate of the ground conductor. A high frequency termination resistor substrate, wherein a length of the other main surface to a portion immediately below the connection portion is ½ times or less of a wavelength of the high frequency signal.

本発明の高周波用終端抵抗基板は、接地導体の高抵抗体部との接続部から接地導体の誘電体基板の他主面における上記接続部直下の部位までの長さが高周波信号の波長の１／２倍以下であることから、線路導体と接地導体が電磁的な結合をバランスよく維持することができ、良好なマイクロストリップラインのＴＥＭモードで伝播することができる。   In the high-frequency termination resistor substrate of the present invention, the length from the connection portion of the ground conductor to the high resistance portion to the portion directly below the connection portion on the other main surface of the dielectric substrate of the ground conductor is 1 of the wavelength of the high-frequency signal. Therefore, the line conductor and the ground conductor can maintain electromagnetic coupling in a well-balanced manner, and can propagate in a good microstrip line TEM mode.

よって、従来の構成に比較して10ＧＨｚ以上の高周波信号においても伝送損失をきわめて少なくして半導体素子を良好に作動させることができる。   Therefore, the semiconductor element can be operated satisfactorily with a very small transmission loss even for a high-frequency signal of 10 GHz or higher as compared with the conventional configuration.

本発明の高周波用終端抵抗基板を用いた電子装置について以下に詳細に説明する。本例では電子部品として半導体素子を用いた半導体装置の例を示す。図１は本発明の高周波用終端抵抗基板を用いた電子装置の実施の形態の一例を示す断面図、図２は図１の高周波用終端抵抗基板の平面図、図３はその断面図であり、１は基体、２は枠体、３は蓋体、４は高周波用配線基板、５は高周波用終端抵抗基板である。   The electronic device using the high-frequency termination resistor substrate of the present invention will be described in detail below. In this example, an example of a semiconductor device using a semiconductor element as an electronic component is shown. FIG. 1 is a cross-sectional view showing an example of an embodiment of an electronic device using the high-frequency termination resistor substrate of the present invention, FIG. 2 is a plan view of the high-frequency termination resistor substrate of FIG. 1, and FIG. 1 is a base, 2 is a frame, 3 is a lid, 4 is a high-frequency wiring board, and 5 is a high-frequency terminating resistor board.

基体１は、Ｆｅ−Ｎｉ−Ｃｏ合金等の金属やＣｕ−Ｗの焼結材等の金属やセラミックス等の誘電体から成る四角形状の板状体であり、そのインゴットに圧延加工や打ち抜き加工等の従来周知の金属加工法、または射出成形と切削加工等を施すことによって、所定の形状に製作される。基体１の上側主面の中央部には、電子部品としてのＩＣ，ＬＳＩ，ＬＤ，ＰＤ等の半導体素子10、高周波用配線基板４および高周波用終端抵抗基板５を載置するための載置部１ａが形成されており、例えばＡｇろう，Ａｇ−Ｃｕろう等のろう材やＡｕ−Ｓｎ半田，Ｐｂ−Ｓｎ半田等の半田、樹脂系接着剤によって強固に接着固定される。   The substrate 1 is a quadrangular plate-like body made of a metal such as a Fe—Ni—Co alloy, a metal such as a sintered material of Cu—W, or a dielectric such as ceramics, and the ingot is rolled or punched. These are manufactured into a predetermined shape by performing a conventionally known metal processing method or injection molding and cutting. In the central portion of the upper main surface of the base 1, a mounting portion for mounting a semiconductor element 10 such as an IC, LSI, LD, or PD as an electronic component, a high-frequency wiring substrate 4, and a high-frequency termination resistor substrate 5. 1a is formed, and is firmly bonded and fixed by, for example, a brazing material such as Ag brazing or Ag-Cu brazing, solder such as Au-Sn solder or Pb-Sn solder, or a resin adhesive.

なお、基体１は、セラミックス等の誘電体材料から成る場合、その表面にメタライズ層等の導体層が形成されているのが好ましい。基体１は、金属から成るか、または表面に導体層が形成された誘電体材料から成ることにより、内部の半導体素子10によって発生する放射ノイズまでも効果的に接地することができ、さらに半導体素子10の動作を安定化させることが可能となる。   In addition, when the base | substrate 1 consists of dielectric materials, such as ceramics, it is preferable that conductor layers, such as a metallization layer, are formed in the surface. The substrate 1 is made of a metal or a dielectric material having a conductor layer formed on the surface thereof, so that even radiation noise generated by the internal semiconductor element 10 can be effectively grounded. 10 operations can be stabilized.

高周波用配線基板４を形成する誘電体基板４ｃおよび高周波用終端抵抗基板５を形成する誘電体基板５ｃは、セラミックスや樹脂等の誘電体材料から成り、誘電体基板４ｃおよび５ｃが、例えば、アルミナ（Ａｌ２Ｏ３）質セラミックスから成る場合、以下のようにして作製される。まず、Ａｌ２Ｏ３，酸化珪素（ＳｉＯ２），酸化カルシウム（ＣａＯ），酸化マグネシウム（ＭｇＯ）等の原料粉末に適当な有機バインダや可塑剤，分散剤，溶剤等を添加混合して泥漿状となす。これを従来周知のドクターブレード法でシート状となすことによってセラミックグリーンシートを得る。しかる後、このセラミックグリーンシートに適当な打ち抜き加工を施すことによって所定の形状に成形する。または、Ａｌ２Ｏ３，ＳｉＯ２，ＣａＯ，ＭｇＯ等の原料粉末を金型に充填しプレス成型することによって所定の形状に成形する。そして、このセラミックグリーンシートに配線用線路導体４ａ、線路導体５ａ、接地導体Ｇとなる金属ペーストを印刷塗布し、還元雰囲気中で約1600℃の温度で焼成することによって製作される。 The dielectric substrate 4c forming the high-frequency wiring substrate 4 and the dielectric substrate 5c forming the high-frequency termination resistor substrate 5 are made of a dielectric material such as ceramics or resin, and the dielectric substrates 4c and 5c are made of, for example, alumina. When made of (Al 2 O 3 ) ceramics, it is produced as follows. First, a suitable organic binder, plasticizer, dispersant, solvent, etc. are added to and mixed with raw material powders such as Al 2 O 3 , silicon oxide (SiO 2 ), calcium oxide (CaO), magnesium oxide (MgO), etc. And A ceramic green sheet is obtained by making this into a sheet by a conventionally known doctor blade method. Thereafter, the ceramic green sheet is formed into a predetermined shape by performing an appropriate punching process. Alternatively, a raw material powder such as Al 2 O 3 , SiO 2 , CaO, MgO or the like is filled in a mold and press-molded to form a predetermined shape. The ceramic green sheet is manufactured by printing and applying a metal paste to be the wiring line conductor 4a, the line conductor 5a, and the ground conductor G, and firing it at a temperature of about 1600 ° C. in a reducing atmosphere.

誘電体基板４ｃには配線用線路導体４ａが形成されている。また、誘電体基板５ｃには線路導体５ａおよび接地導体Ｇが形成されている。図３の例では接地導体Ｇは、誘電体基板５ｃの表面（一主面）に形成された表面接地導体８と、誘電体基板５ｃの裏面（他主面）に形成された裏面接地導体５ｂと、誘電体基板５ｃの側面に形成された表裏導通導体９とから構成されている。   A wiring line conductor 4a is formed on the dielectric substrate 4c. A line conductor 5a and a ground conductor G are formed on the dielectric substrate 5c. In the example of FIG. 3, the ground conductor G includes a front surface ground conductor 8 formed on the surface (one main surface) of the dielectric substrate 5c and a back surface ground conductor 5b formed on the back surface (the other main surface) of the dielectric substrate 5c. And the front and back conductive conductors 9 formed on the side surface of the dielectric substrate 5c.

また、図４に示す本発明の高周波用終端抵抗基板５の実施形態の他の例では、接地導体Ｇは、誘電体基板５ｃの裏面（他主面）に形成された裏面接地導体５ｂと、誘電体基板５ｃの側面に形成された表裏導通導体９とから構成されている。   Further, in another example of the embodiment of the high-frequency termination resistor substrate 5 of the present invention shown in FIG. 4, the ground conductor G includes a back surface ground conductor 5b formed on the back surface (other main surface) of the dielectric substrate 5c, The front and back conductive conductors 9 are formed on the side surface of the dielectric substrate 5c.

配線用線路導体４ａ，線路導体５ａ、表面接地導体８、表裏導通導体９および裏面接地導体５ｂは、例えば金属ペーストを焼成することにより形成されており、このような金属ペーストは、Ｗ，モリブデン（Ｍｏ），マンガン（Ｍｎ）等の高融点金属粉末に適当な有機バインダや溶剤を添加混合してペースト状となしたものを従来周知のスクリーン印刷法を採用して印刷することにより、セラミックグリーンシートまたはセラミックスの成形体に印刷塗布される。   The wiring line conductor 4a, the line conductor 5a, the front surface ground conductor 8, the front and back conductive conductors 9 and the back surface ground conductor 5b are formed, for example, by firing a metal paste. Such a metal paste includes W, molybdenum ( Ceramic green sheets are printed by using a well-known screen-printing method by printing a paste obtained by adding an appropriate organic binder or solvent to a high melting point metal powder such as Mo) or manganese (Mn). Alternatively, it is printed and applied to a ceramic body.

なお、配線用線路導体４ａ，線路導体５ａ、表面接地導体８および表裏導通導体９は薄膜形成法によって形成されていても良く、その場合、配線用線路導体４ａ、線路導体５ａ、表面接地導体８および表裏導通導体９は、窒化タンタル（Ｔａ２Ｎ），ニクロム（Ｎｉ−Ｃｒ合金），チタン（Ｔｉ），パラジウム（Ｐｄ），白金（Ｐｔ），Ａｕ等から形成され、セラミックグリーンシートを焼成した後に形成される。 The wiring line conductor 4a, the line conductor 5a, the surface ground conductor 8, and the front and back conductive conductors 9 may be formed by a thin film forming method. In this case, the wiring line conductor 4a, the line conductor 5a, and the surface ground conductor 8 The front and back conductive conductors 9 are made of tantalum nitride (Ta 2 N), nichrome (Ni—Cr alloy), titanium (Ti), palladium (Pd), platinum (Pt), Au, etc., and fired a ceramic green sheet Later formed.

また、高抵抗体部７は、Ｔａ２Ｎ，Ｎｉ−Ｃｒ合金等の材料から成り、例えば高抵抗金属ペーストを誘電体基板５に印刷塗布した後に焼成して形成されるか、薄膜形成法により形成される。また、高抵抗体部７による終端抵抗値は、伝送される高周波信号の周波数や線路導体５ａの特性インピーダンスに応じて、高抵抗体部７の厚みや幅，形状を適宜設定することによって、所望の値に設定される。例えば、抵抗値を微小調整するために、高抵抗体部７の一部をレーザ加工によって除去し、精度よく抵抗値を調整することもできる。 Further, the high resistance portion 7 is made of a material such as Ta 2 N, Ni—Cr alloy, and is formed by, for example, printing and applying a high resistance metal paste to the dielectric substrate 5 or by baking, or by a thin film forming method. It is formed. Further, the termination resistance value by the high resistance portion 7 is set by appropriately setting the thickness, width, and shape of the high resistance portion 7 in accordance with the frequency of the transmitted high frequency signal and the characteristic impedance of the line conductor 5a. Is set to the value of For example, in order to finely adjust the resistance value, a part of the high resistance portion 7 can be removed by laser processing, and the resistance value can be adjusted with high accuracy.

なお、高抵抗体部７は、ボンディングワイヤ６ｂを介して半導体素子10に接続される線路導体５ａの端部に対して反対側の端部に形成される。   The high resistance portion 7 is formed at the end opposite to the end of the line conductor 5a connected to the semiconductor element 10 via the bonding wire 6b.

また、基体１の上側主面の外周部には載置部１ａを囲繞するようにして枠体２が立設するように接合されており、枠体２は基体１とともにその内側に半導体素子10を収容する空所を形成する。この枠体２は、基体１と同様にＦｅ−Ｎｉ−Ｃｏ合金やＣｕ−Ｗの焼結材等の金属やセラミックス等の誘電体から成り、基体１と一体成形される、または基体１にＡｇろう等のろう材を介してろう付けされる、またはシーム溶接法等の溶接法により接合されることによって、基体１の上側主面の外周部に立設される。   Further, a frame body 2 is joined to an outer peripheral portion of the upper main surface of the base body 1 so as to surround the mounting portion 1a, and the frame body 2 is joined together with the base body 1 to the semiconductor element 10 inside thereof. Forming a void to accommodate The frame body 2 is made of a dielectric material such as a metal such as Fe-Ni-Co alloy or Cu-W sintered material, ceramics, and the like in the same manner as the base body 1, and is integrally formed with the base body 1 or Ag on the base body 1. It is erected on the outer peripheral portion of the upper main surface of the base body 1 by being brazed via a brazing material such as brazing or by a welding method such as a seam welding method.

なお、枠体２は、セラミックス等の誘電体材料から成る場合、その表面にメタライズ層等の導体層が形成されているのが好ましい。枠体２は、金属から成るか、または表面に導体層が形成された誘電体材料から成ることにより、内部の半導体素子10によって発生する放射ノイズまでも効果的に接地することができ、さらに半導体素子10の動作を安定化させることが可能となる。   In addition, when the frame body 2 consists of dielectric materials, such as ceramics, it is preferable that conductor layers, such as a metallization layer, are formed in the surface. The frame 2 is made of a metal or a dielectric material having a conductor layer formed on the surface thereof, so that even the radiation noise generated by the internal semiconductor element 10 can be effectively grounded. The operation of the element 10 can be stabilized.

また、外部より半導体素子10に駆動信号等を入力させる入出力端子として、例えばグラスビーズ11が用いられ、以下のようにして枠体２に設置される。まず、枠体２の側面にグラスビーズ11が嵌着される貫通孔２ａを形成し、貫通孔２ａ内にグラスビーズ11を嵌め込むとともにＡｕ−Ｓｎ半田やＰｂ−Ｓｎ半田等の封着材を貫通孔２ａとの隙間に挿入する。しかる後、加熱して封着材を溶融させ、溶融した封着材を毛細管現象によりグラスビーズ11と貫通孔２ａの内壁との隙間に充填することによって、グラスビーズ11が貫通孔２ａ内に半田等の封着材を介して嵌着接合される。   Further, for example, glass beads 11 are used as input / output terminals for inputting drive signals and the like to the semiconductor element 10 from the outside, and are installed in the frame 2 as follows. First, a through hole 2a into which the glass beads 11 are fitted is formed on the side surface of the frame 2, and the glass beads 11 are fitted into the through holes 2a and a sealing material such as Au-Sn solder or Pb-Sn solder is used. It inserts in the clearance gap with the through-hole 2a. Thereafter, the sealing material is heated to melt, and the molten sealing material is filled in the gap between the glass beads 11 and the inner walls of the through holes 2a by capillary action, so that the glass beads 11 are soldered into the through holes 2a. It is fitted and joined via a sealing material such as.

グラスビーズ11は、内部に収容する半導体素子10を外部電気回路に接続された同軸ケーブルに電気的に接続するものであり、Ｆｅ−Ｎｉ−Ｃｏ合金等の金属から成る円筒形等の筒状の外周導体にガラス等の絶縁体が充填され、中心軸にＦｅ−Ｎｉ−Ｃｏ合金等の金属から成る中心導体が固定されて成る。この中心導体は半田等から成る導電性接着材を介して高周波用配線基板４の配線用線路導体４ａに電気的に接続される。このグラスビーズ11に同軸ケーブルが装着されることによって、半導体パッケージの内部に収納された半導体素子10がグラスビーズ11の中心導体を介して外部電気回路に電気的に接続されることとなる。   The glass beads 11 are for electrically connecting the semiconductor element 10 accommodated therein to a coaxial cable connected to an external electric circuit, and have a cylindrical shape such as a cylindrical shape made of a metal such as an Fe-Ni-Co alloy. An outer conductor is filled with an insulator such as glass, and a central conductor made of a metal such as Fe—Ni—Co alloy is fixed to the central axis. This central conductor is electrically connected to the wiring line conductor 4a of the high frequency wiring board 4 through a conductive adhesive made of solder or the like. By attaching a coaxial cable to the glass beads 11, the semiconductor element 10 housed in the semiconductor package is electrically connected to an external electric circuit through the central conductor of the glass beads 11.

半導体素子10は図２の如く、その電極が高周波用配線基板４の表面に被着形成されている線路導体４ａおよび高周波用終端抵抗基板５の表面に被着形成されている線路導体５ａにそれぞれボンディングワイヤ６ａ，６ｂを介して電気的に接続される。   As shown in FIG. 2, the semiconductor element 10 has a line conductor 4a whose electrodes are formed on the surface of the high-frequency wiring board 4 and a line conductor 5a which is formed on the surface of the high-frequency termination resistor board 5, respectively. They are electrically connected via bonding wires 6a and 6b.

そして、基体１および枠体２から成る容器内部に半導体素子10を収容し、枠体２の上面に金属やセラミックスなどから成る蓋体３をろう付け法やシームウエルド法等の溶接法により接合し、容器内部を気密に封止することによって製品としての半導体装置（電子装置）となる。   Then, the semiconductor element 10 is accommodated in the container composed of the base body 1 and the frame body 2, and the lid body 3 made of metal or ceramics is joined to the upper surface of the frame body 2 by a welding method such as a brazing method or a seam weld method. By sealing the inside of the container in an airtight manner, a semiconductor device (electronic device) as a product is obtained.

図３に示すように本発明の高周波用終端抵抗基板５は、誘電体基板５ｃの一主面に、高周波信号伝送用の線路導体５ａと、線路導体５ａの一端部に電気的に接続する高抵抗体部７と、高抵抗体部７を介して線路導体５ａに電気的に接続する表面接地導体８とを具備している。また、誘電体基板５ｃの裏面に裏面接地導体５ｂを具備しており、誘電体基板５ｃの側面（図３参照）または内部（例えばビアホールなどを用いる）に表面接地導体８と裏面接地導体５ｂとを電気的に接続する表裏導通導体９を具備している。   As shown in FIG. 3, the high-frequency termination resistor substrate 5 of the present invention has a high-frequency signal transmission line conductor 5a on one main surface of a dielectric substrate 5c and a high-level electrical connection to one end of the line conductor 5a. A resistor portion 7 and a surface ground conductor 8 electrically connected to the line conductor 5a through the high resistor portion 7 are provided. Further, the back surface ground conductor 5b is provided on the back surface of the dielectric substrate 5c, and the front surface ground conductor 8 and the back surface ground conductor 5b are provided on the side surface (see FIG. 3) or inside (for example, using via holes) of the dielectric substrate 5c. The front and back conducting conductors 9 are electrically connected.

本発明の高周波用終端抵抗基板５において、接地導体Ｇと高抵抗体部８との接続部から、接地導体Ｇの誘電体基板５ｃの他主面における高抵抗体部８と接地導体Ｇとの接続部直下の部位までの、接地導体Ｇの長さが前記高周波信号の波長の１／２倍以下である。   In the high-frequency termination resistor substrate 5 of the present invention, the connection between the ground conductor G and the high resistance body portion 8 connects the high resistance portion 8 and the ground conductor G on the other main surface of the dielectric substrate 5c of the ground conductor G. The length of the ground conductor G up to the portion directly below the connection portion is ½ times or less the wavelength of the high-frequency signal.

すなわち、図３の例では、接地導体Ｇと高抵抗体部８との接続部から、接地導体Ｇの誘電体基板５ｃの他主面における高抵抗体部８と接地導体Ｇとの接続部直下の部位までの、接地導体Ｇの長さＬは、表面接地導体８の高抵抗体部７との接続部から表裏導通導体９との接続部までの長さＬ１と、表裏導通導体９の誘電体基板５ｃの厚み方向の長さＬ２と、裏面接地導体５ｂの表裏導通導体９との接続部から、表面接地導体９および高抵抗体部７の接続部直下の部位までの長さＬ３との合計であり、Ｌ＝Ｌ１＋Ｌ２＋Ｌ３となっている。   That is, in the example of FIG. 3, from the connection portion between the ground conductor G and the high resistance portion 8, directly below the connection portion between the high resistance portion 8 and the ground conductor G on the other main surface of the dielectric substrate 5 c of the ground conductor G. The length L of the grounding conductor G up to the portion of the surface ground conductor 8 is the length L1 from the connection portion of the surface ground conductor 8 to the high resistance portion 7 to the connection portion of the front and back conductive conductor 9 and the dielectric of the front and back conductive conductor 9. The length L2 in the thickness direction of the body substrate 5c and the length L3 from the connection portion between the front and back conductive conductors 9 of the back surface ground conductor 5b to the portion immediately below the connection portion of the front surface ground conductor 9 and the high resistance body portion 7 The sum is L = L1 + L2 + L3.

また、図４の例では、接地導体Ｇと高抵抗体部８との接続部から、接地導体Ｇの誘電体基板５ｃの他主面における高抵抗体部８と接地導体Ｇとの接続部直下の部位までの、接地導体Ｇの長さＬは、表裏導通導体９の誘電体基板５ｃの厚み方向の長さＬ２であり、Ｌ＝Ｌ２となっている。   Further, in the example of FIG. 4, the connection portion between the ground conductor G and the high resistance portion 8 is directly below the connection portion between the high resistance portion 8 and the ground conductor G on the other main surface of the dielectric substrate 5 c of the ground conductor G. The length L of the ground conductor G up to this point is the length L2 of the front and back conductive conductors 9 in the thickness direction of the dielectric substrate 5c, and L = L2.

これらの構成により、線路導体５ａと長さＬの接地導体が電磁的な結合をバランスよく維持することができ、良好なマイクロストリップラインのＴＥＭモードで伝播することができる。   With these configurations, the line conductor 5a and the ground conductor of length L can maintain electromagnetic coupling in a well-balanced manner, and can propagate in a good microstrip line TEM mode.

よって、従来の構成に比較して良好な伝送特性が実現でき、10ＧＨｚ以上の高周波信号においても伝送損失をきわめて少なくして半導体素子10を良好に作動させることができる。   Therefore, it is possible to realize good transmission characteristics as compared with the conventional configuration, and it is possible to operate the semiconductor element 10 satisfactorily with extremely low transmission loss even for a high-frequency signal of 10 GHz or higher.

本発明および比較例の高周波用終端抵抗基板を以下のように構成した。まず、誘電体基板５として、比誘電率が9.8のアルミナ質セラミックからなる縦６ｍｍ×横２ｍｍ×厚み１ｍｍの誘電体基板５ｃを用意し、この誘電体基板５ｃ上に、幅が0.98ｍｍ、厚みが0.002ｍｍの線路導体５ａを形成した。   The high-frequency termination resistor substrates of the present invention and the comparative example were configured as follows. First, as the dielectric substrate 5, a dielectric substrate 5c made of alumina ceramic having a relative dielectric constant of 9.8 and having a length of 6 mm, a width of 2 mm, and a thickness of 1 mm is prepared, and a width of 0.98 mm and a thickness of the dielectric substrate 5c are prepared. A line conductor 5a having a thickness of 0.002 mm was formed.

次に、線路導体５ａと同一面上に表面接地導体８を形成し、線路導体５ａと表面接地導体８とを高抵抗体７によって電気的に接続した。   Next, the surface ground conductor 8 was formed on the same plane as the line conductor 5 a, and the line conductor 5 a and the surface ground conductor 8 were electrically connected by the high resistance body 7.

また、表面接地導体８と誘電体基板５の裏面に形成した裏面接地導体５ｂとを誘電体基板５の側面に形成した表裏導通導体９にて電気的に接続した。   Further, the front surface ground conductor 8 and the back surface ground conductor 5 b formed on the back surface of the dielectric substrate 5 were electrically connected by the front and back conductive conductors 9 formed on the side surface of the dielectric substrate 5.

ここで、表面接地導体８の高抵抗体部７との接続部から表裏導通導体９との接続部までの長さＬ１と、表裏導通導体９の誘電体基板５ｃの厚み方向の長さＬ２と、裏面接地導体５ｂの表裏導通導体９との接続部から、表面接地導体９および高抵抗体部７の接続部直下の部位までの長さＬ３との合計Ｌ＝Ｌ１＋Ｌ２＋Ｌ３を表１に示したように７通り設定した。Ｌ１、Ｌ２、Ｌ３の単位はｍｍとする。これにより試料１〜７を得た。なお、試料７は図４に示すような高抵抗体部７が誘電体基板５の端部に達するもので、Ｌ１、Ｌ３の各長さが０の場合である。   Here, the length L1 from the connection portion of the surface ground conductor 8 to the high resistance portion 7 to the connection portion of the front and back conductive conductor 9, and the length L2 of the front and back conductive conductor 9 in the thickness direction of the dielectric substrate 5c As shown in Table 1, the total L = L1 + L2 + L3 of the length L3 from the connecting portion of the back surface ground conductor 5b to the front and back conductive conductors 9 to the portion immediately below the connecting portion of the surface ground conductor 9 and the high resistance portion 7 is shown in Table 1. 7 types were set. The unit of L1, L2, and L3 is mm. This obtained Samples 1-7. In the sample 7, the high resistance portion 7 as shown in FIG. 4 reaches the end of the dielectric substrate 5, and the lengths of L1 and L3 are zero.

これら、本発明および比較例の高周波用終端抵抗基板である試料１〜７を、高周波３次元構造シミュレータ（Ａｎｓｏｆｔ社製ＨＦＳＳ）を用いて15ＧＨｚの反射損失Ｓ11を得た。なお、15ＧＨｚにおける実効波長は約6.40ｍｍとなり、１／２波長は3.20ｍｍとなる。   The reflection loss S11 of 15 GHz was obtained from Samples 1 to 7 which are the high-frequency termination resistor substrates of the present invention and Comparative Example using a high-frequency three-dimensional structure simulator (HFSS manufactured by Ansoft). The effective wavelength at 15 GHz is about 6.40 mm, and the half wavelength is 3.20 mm.

各試料における上記周波数範囲における最も悪い反射損失Ｓ11を表１に示す。表１より、本発明の高周波用終端抵抗基板である、試料３、４、５、６、７については、反射損失Ｓ11が−15ｄＢ以下と良好な特性が得られることが分かった。これに対し、比較例の試料１、２においては、反射損失Ｓ11が増大しており、−15ｄＢを超えていることが分かった。

Figure 2007149955
Table 1 shows the worst reflection loss S11 in the above frequency range for each sample. From Table 1, it was found that Samples 3, 4, 5, 6, and 7, which are high-frequency termination resistor substrates of the present invention, have a good characteristic with a reflection loss S11 of -15 dB or less. On the other hand, in samples 1 and 2 of the comparative example, it was found that the reflection loss S11 increased and exceeded -15 dB.
Figure 2007149955

なお、本発明は、上述の実施の形態の一例および実施例に限定されるものではなく、本発明の要旨を逸脱しない範囲であれば種々の変更は可能である。   The present invention is not limited to the above-described embodiments and examples, and various modifications can be made without departing from the gist of the present invention.

本発明の電子装置の実施の形態の一例を示す断面図である。It is sectional drawing which shows an example of embodiment of the electronic device of this invention. 図１の本発明の高周波用終端抵抗基板の平面図である。FIG. 2 is a plan view of the high-frequency termination resistor substrate of the present invention shown in FIG. 1. 図１の本発明の高周波用終端抵抗基板の断面図である。FIG. 2 is a cross-sectional view of the high-frequency termination resistor substrate of the present invention in FIG. 1. 本発明の高周波用終端抵抗基板の実施の形態の他の例を示す断面図である。It is sectional drawing which shows the other example of embodiment of the high frequency termination resistance board | substrate of this invention. 従来の電子装置の断面図である。It is sectional drawing of the conventional electronic device. 図５の高周波用終端抵抗基板の平面図である。FIG. 6 is a plan view of the high-frequency termination resistor substrate of FIG. 5.

符号の説明Explanation of symbols

１・・・・・・・基体
１ａ・・・・・・載置部
２・・・・・・・枠体
３・・・・・・・蓋体
４・・・・・・・高周波用配線基板
４ａ・・・・・・配線用線路導体
４ｃ・・・・・・誘電体基板
５・・・・・・・高周波用終端抵抗基板
５ａ・・・・・・線路導体
５ｃ・・・・・・誘電体基板
６ａ・・・・・・ボンディングワイヤ
６ｂ・・・・・・ボンディングワイヤ
７・・・・・・・高抵抗体部
10・・・・・・・電子部品（半導体素子）
Ｇ・・・・・・・接地導体
５ｂ・・・・接地導体（裏面接地導体）
８・・・・・接地導体（表面接地導体）
９・・・・・接地導体（表裏導通導体） 1 .... Base 1a ... Mounting part 2 .... Frame 3 ... Lid 4 ... High frequency wiring Substrate 4a ··· Wiring line conductor 4c ··· Dielectric substrate 5 ······ High-frequency terminating resistor substrate 5a ···· Line conductor 5c ···・ Dielectric substrate 6a ・ ・ ・ ・ ・ ・ Bonding wire 6b ・ ・ ・ ・ ・ ・ Bonding wire 7 ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ ・ High resistance part
10 ・ ・ ・ ・ ・ ・ ・ Electronic components (semiconductor elements)
G ... Grounding conductor 5b ... Grounding conductor (Back grounding conductor)
8: Ground conductor (surface ground conductor)
9. Ground conductor (front and back conductive conductor)

Claims (2)

誘電体基板と、該誘電体基板の一主面に形成された高周波信号伝送用の線路導体と、前記誘電体基板の前記一主面に形成されるとともに前記線路導体の一端部に接続された高抵抗体部と、該高抵抗体部から前記誘電体基板の他主面にかけて配設されるとともに、前記誘電体基板の前記一主面側から平面透視して前記線路導体と重なるように形成された接地導体とを具備している高周波用終端抵抗基板において、前記接地導体の前記高抵抗体部との接続部から前記接地導体の前記誘電体基板の他主面における前記接続部直下の部位までの長さが前記高周波信号の波長の１／２倍以下であることを特徴とする高周波用終端抵抗基板。 A dielectric substrate, a line conductor for high-frequency signal transmission formed on one principal surface of the dielectric substrate, and formed on the one principal surface of the dielectric substrate and connected to one end of the line conductor A high-resistance body portion, which is disposed from the high-resistance body portion to the other main surface of the dielectric substrate, and is formed so as to overlap the line conductor as seen in a plan view from the one main surface side of the dielectric substrate. In the high-frequency termination resistor substrate comprising a grounded conductor, a portion immediately below the connection portion on the other main surface of the dielectric substrate of the ground conductor from a connection portion of the ground conductor to the high resistance portion The terminal resistor substrate for high frequency, wherein the length is up to ½ times the wavelength of the high frequency signal. 電子部品の載置部を有する基体と、該基体の上面に前記載置部を取り囲むように設けられた枠体と、前記載置部に載置された請求項１記載の高周波用終端抵抗基板と、前記搭載部に載置されるとともに前記高周波用終端抵抗基板の前記線路導体に電気的に接続された電子部品と、前記枠体を塞ぐように設けられた蓋体とを具備することを特徴とする電子装置。 2. A high-frequency terminating resistor substrate according to claim 1, wherein the base has an electronic component mounting portion, a frame provided on the upper surface of the base so as to surround the mounting portion, and the high-frequency termination resistor substrate mounted on the mounting portion. And an electronic component mounted on the mounting portion and electrically connected to the line conductor of the high-frequency termination resistor substrate, and a lid provided so as to close the frame. Electronic device characterized.
JP2005342177A 2005-11-28 2005-11-28 Terminal resistance substrate for high frequency and electronic device Pending JP2007149955A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2005342177A JP2007149955A (en) 2005-11-28 2005-11-28 Terminal resistance substrate for high frequency and electronic device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005342177A JP2007149955A (en) 2005-11-28 2005-11-28 Terminal resistance substrate for high frequency and electronic device

Publications (1)

Publication Number Publication Date
JP2007149955A true JP2007149955A (en) 2007-06-14

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Family Applications (1)

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JP2005342177A Pending JP2007149955A (en) 2005-11-28 2005-11-28 Terminal resistance substrate for high frequency and electronic device

Country Status (1)

Country Link
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010135738A (en) * 2008-10-28 2010-06-17 Kyocera Corp Wiring board, active element housing package using the same, and active element apparatus

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010135738A (en) * 2008-10-28 2010-06-17 Kyocera Corp Wiring board, active element housing package using the same, and active element apparatus

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