JP2007116569A - オペアンプの開放利得調整回路 - Google Patents
オペアンプの開放利得調整回路 Download PDFInfo
- Publication number
- JP2007116569A JP2007116569A JP2005308016A JP2005308016A JP2007116569A JP 2007116569 A JP2007116569 A JP 2007116569A JP 2005308016 A JP2005308016 A JP 2005308016A JP 2005308016 A JP2005308016 A JP 2005308016A JP 2007116569 A JP2007116569 A JP 2007116569A
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- Prior art keywords
- amplifier
- circuit
- bias
- operational amplifier
- common source
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-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
- H03F3/45179—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using MOSFET transistors as the active amplifying circuit
- H03F3/45183—Long tailed pairs
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/08—Modifications of amplifiers to reduce detrimental influences of internal impedances of amplifying elements
- H03F1/083—Modifications of amplifiers to reduce detrimental influences of internal impedances of amplifying elements in transistor amplifiers
- H03F1/086—Modifications of amplifiers to reduce detrimental influences of internal impedances of amplifying elements in transistor amplifiers with FET's
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
- H03F2203/45—Indexing scheme relating to differential amplifiers
- H03F2203/45244—Indexing scheme relating to differential amplifiers the differential amplifier contains one or more explicit bias circuits, e.g. to bias the tail current sources, to bias the load transistors
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
- H03F2203/45—Indexing scheme relating to differential amplifiers
- H03F2203/45596—Indexing scheme relating to differential amplifiers the IC comprising one or more biasing resistors
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
- H03F2203/45—Indexing scheme relating to differential amplifiers
- H03F2203/45701—Indexing scheme relating to differential amplifiers the LC comprising one resistor
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
- H03F2203/45—Indexing scheme relating to differential amplifiers
- H03F2203/45732—Indexing scheme relating to differential amplifiers the LC comprising a voltage generating circuit
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Amplifiers (AREA)
Abstract
【解決手段】 2つの入力端子IN1,IN2より入力される信号の差分に基づいて差動増幅動作を行う差動増幅回路11と、差動増幅回路11の出力に接続されたソース接地アンプM5とを備えたオペアンプにおいて、ソース接地アンプM5のゲートに接続されたバイアス抵抗Rbと、バイアス抵抗Rbに接続されたバイアス回路M20とを備え、ソース接地アンプM5のゲートバイアスを、バイアス回路M20からバイアス抵抗Rbを介して供給することにより、ソース接地アンプM5の入力抵抗がバイアス抵抗Rbにより決まるようにし、ソース接地アンプM5の入力抵抗を小さくすることができるようにする。
【選択図】 図1
Description
M5 ソース接地アンプ
M20 バイアス回路
Rb バイアス抵抗
Claims (3)
- 2つの入力端子より入力される信号の差分に基づいて差動増幅動作を行う差動増幅回路と、上記差動増幅回路の出力に接続されたソース接地アンプとを備えたオペアンプに対して適用される開放利得調整回路であって、
上記ソース接地アンプのゲートに接続されたバイアス抵抗と、
上記バイアス抵抗に接続されたバイアス回路とを備えたことを特徴とするオペアンプの開放利得調整回路。 - 上記バイアス回路は、ゲートとドレインとを接続したトランジスタにより構成され、当該トランジスタのゲートに上記バイアス抵抗を接続したことを特徴とする請求項1に記載のオペアンプの開放利得調整回路。
- 上記ソース接地アンプとトランジスタサイズと上記バイアス回路のトランジスタサイズとを同一にしたことを特徴とする請求項2に記載のオペアンプの開放利得調整回路。
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005308016A JP2007116569A (ja) | 2005-10-24 | 2005-10-24 | オペアンプの開放利得調整回路 |
US12/091,294 US20090261905A1 (en) | 2005-10-24 | 2006-07-12 | Open gain adjustment circuit for operational amplifier |
PCT/JP2006/314199 WO2007049386A1 (ja) | 2005-10-24 | 2006-07-12 | オペアンプの開放利得調整回路 |
CNA2006800396479A CN101366175A (zh) | 2005-10-24 | 2006-07-12 | 运算放大器的开路增益调整电路 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005308016A JP2007116569A (ja) | 2005-10-24 | 2005-10-24 | オペアンプの開放利得調整回路 |
Publications (1)
Publication Number | Publication Date |
---|---|
JP2007116569A true JP2007116569A (ja) | 2007-05-10 |
Family
ID=37967507
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2005308016A Pending JP2007116569A (ja) | 2005-10-24 | 2005-10-24 | オペアンプの開放利得調整回路 |
Country Status (4)
Country | Link |
---|---|
US (1) | US20090261905A1 (ja) |
JP (1) | JP2007116569A (ja) |
CN (1) | CN101366175A (ja) |
WO (1) | WO2007049386A1 (ja) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2012027900A (ja) * | 2010-06-25 | 2012-02-09 | Intel Corp | オンダイ電圧スケーリングのための分散型給電スキーム |
JP2015144427A (ja) * | 2013-12-25 | 2015-08-06 | パナソニック株式会社 | Dcオフセットキャンセル回路 |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8963613B2 (en) | 2011-08-11 | 2015-02-24 | Qualcomm Incorporated | Canceling third order non-linearity in current mirror-based circuits |
US9176511B1 (en) | 2014-04-16 | 2015-11-03 | Qualcomm Incorporated | Band-gap current repeater |
CN105142073A (zh) * | 2015-09-23 | 2015-12-09 | 成都乐维斯科技有限公司 | 一种结构简单、制作方便的音频功放电路 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0294805A (ja) * | 1988-09-30 | 1990-04-05 | Toshiba Corp | 差動増幅器 |
JPH0993051A (ja) * | 1995-09-22 | 1997-04-04 | Denso Corp | 差動増幅回路 |
JP2004215168A (ja) * | 2003-01-08 | 2004-07-29 | Matsushita Electric Ind Co Ltd | エミッタ接地増幅回路、移動無線端末装置および無線基地局装置 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4375619A (en) * | 1980-06-26 | 1983-03-01 | Bell Telephone Laboratories, Incorporated | FET Operational amplifier with increased output swing |
JPH0642637B2 (ja) * | 1988-08-12 | 1994-06-01 | 三洋電機株式会社 | 低周波電力増幅用パワーセイブ回路 |
JPH0585124U (ja) * | 1992-04-16 | 1993-11-16 | 日立電子株式会社 | 平衡不平衡変換回路 |
JP3300534B2 (ja) * | 1993-09-13 | 2002-07-08 | 株式会社東芝 | 電子回路 |
JP3559532B2 (ja) * | 1994-03-10 | 2004-09-02 | 松下電器産業株式会社 | 電力増幅器 |
JP3338280B2 (ja) * | 1996-03-19 | 2002-10-28 | 東芝デジタルメディアエンジニアリング株式会社 | 増幅器及び半導体装置 |
JP3435292B2 (ja) * | 1996-08-29 | 2003-08-11 | 富士通株式会社 | オペアンプ回路 |
JP3545142B2 (ja) * | 1996-11-25 | 2004-07-21 | 三菱電機株式会社 | 差動増幅器 |
US7064609B1 (en) * | 2004-08-17 | 2006-06-20 | Ami Semiconductor, Inc. | High voltage, low-offset operational amplifier with rail-to-rail common mode input range in a digital CMOS process |
KR100804546B1 (ko) * | 2005-08-26 | 2008-02-20 | 인티그런트 테크놀로지즈(주) | 선형성을 개선한 차동 증폭회로 |
-
2005
- 2005-10-24 JP JP2005308016A patent/JP2007116569A/ja active Pending
-
2006
- 2006-07-12 CN CNA2006800396479A patent/CN101366175A/zh active Pending
- 2006-07-12 WO PCT/JP2006/314199 patent/WO2007049386A1/ja active Application Filing
- 2006-07-12 US US12/091,294 patent/US20090261905A1/en not_active Abandoned
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0294805A (ja) * | 1988-09-30 | 1990-04-05 | Toshiba Corp | 差動増幅器 |
JPH0993051A (ja) * | 1995-09-22 | 1997-04-04 | Denso Corp | 差動増幅回路 |
JP2004215168A (ja) * | 2003-01-08 | 2004-07-29 | Matsushita Electric Ind Co Ltd | エミッタ接地増幅回路、移動無線端末装置および無線基地局装置 |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2012027900A (ja) * | 2010-06-25 | 2012-02-09 | Intel Corp | オンダイ電圧スケーリングのための分散型給電スキーム |
JP2015144427A (ja) * | 2013-12-25 | 2015-08-06 | パナソニック株式会社 | Dcオフセットキャンセル回路 |
Also Published As
Publication number | Publication date |
---|---|
US20090261905A1 (en) | 2009-10-22 |
WO2007049386A1 (ja) | 2007-05-03 |
CN101366175A (zh) | 2009-02-11 |
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