JP2007042719A - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP2007042719A JP2007042719A JP2005222608A JP2005222608A JP2007042719A JP 2007042719 A JP2007042719 A JP 2007042719A JP 2005222608 A JP2005222608 A JP 2005222608A JP 2005222608 A JP2005222608 A JP 2005222608A JP 2007042719 A JP2007042719 A JP 2007042719A
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- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
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- H01L2224/732—Location after the connecting process
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- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
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Abstract
【解決手段】中央部に半導体素子1を収めかつ半導体素子1と接着された接着面を持つ凹部5bと凹部の外周部に半導体パッケージ基板3と接着された接着面3aを持つつば部5aとを有するリッド5を、つば部5aの接着面から凹部5bの接着面までの深さd1(μm)と、つば部5aが接着された半導体パッケージ基板3の接着面から凹部5bと接着された半導体素子1の接着面までの高さに接着剤6aの厚さを加えた長さd2(μm)との関係が、25μm≦d2−d1≦300μmであるように形成し、半導体パッケージ基板3とリッド5のつば部5aとの間に25μm以上300μm以下の隙間を有する半導体装置9を構成する。
【選択図】図1
Description
25μm≦d2−d1≦300μm
である。
25μm≦d2−d1≦300μm
であるため、リッド5を半導体素子1を搭載した半導体パッケージ基板3に接着する場合に、リッド5の凹部5bと半導体素子1は接着剤6aに密着する。このため、半導体素子1とリッド5を確実に接着することが出来る。
25μm≦d2−d1≦300μm ・・・式(1)
であるように加工される。ここでd2−d1は、リッド5のつば部5aと半導体パッケージ基板3との接着面との隙間の厚さでもあり、リッド5のつば部5aと半導体パッケージ基板3との接着面3aとの隙間に充填される接着剤6bの厚さでもある。リッド5の凹部5bと半導体素子1とを接着する接着剤6aの厚さは隙間の厚さd2−d1に比べて十分小さいので、リッド5と半導体素子1を十分に密着させることが可能である。
2 半田バンプ
3 半導体パッケージ基板
3a 接着面
4 充填樹脂
5 リッド
5a つば部
5b 凹部
6a、6b 接着剤
7 アウターボール
8 プリント板
9、9b、9c 半導体装置
51 半導体素子
52 半田バンプ
53 半導体パッケージ基板
53a 接着面
54 充填樹脂
55 リッド
55a つば部
55b 凹部
56a、56b 接着剤
59 半導体装置
Claims (8)
- 半導体素子が搭載された半導体パッケージ基板と、
中央部に前記半導体素子を収めかつ前記半導体素子と接着された接着面を持つ凹部と前記凹部の外周部に前記半導体パッケージ基板と接着された接着面を持つつば部とを有するリッドとを備え、
前記半導体素子を前記半導体パッケージ基板と前記リッドとで覆う半導体装置であって、
前記つば部の接着面から前記凹部の接着面までの深さd1(μm)と、前記つば部が接着された前記半導体パッケージ基板の接着面から前記凹部と接着された前記半導体素子の接着面までの高さに前記半導体素子と前記凹部の間に充填された接着剤の厚さを加えた長さd2(μm)との関係が、
25μm≦d2−d1≦300μm
である半導体装置。 - 前記半導体パッケージ基板と前記リッドのつば部とを接着する接着剤の弾性率が、1MPa以上3GPa以下である請求項1記載の半導体装置。
- 前記リッドは金属板を絞り加工して前記凹部と前記つば部とを形成したことを特徴とする請求項2記載の半導体装置。
- 前記リッドのつば部の先端を折り曲げ、つば部にフィンを形成したことを特長とする請求項3記載の半導体装置
- 前記リッドは金属板であって、
前記半導体素子を接着する接着面を備える凹部は、前記金属板の中央部をくり貫いて形成し、前記金属板の外周部が前記半導体パッケージ基板と接着された前記つば部となることを特徴とする請求項2記載の半導体装置。 - 前記半導体パッケージと前記つば部とを接着する接着剤がシリコーン樹脂又はエポキシ樹脂であることを特徴とする請求項2記載の半導体装置。
- 前記リッドは放熱板であることを特徴とする請求項2記載の半導体装置。
- 前記半導体パッケージと前記つば部とを接着する接着剤の弾性率は、0℃から125℃までの温度範囲内で1MPa以上3GPa以下である請求項2記載の半導体装置。
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005222608A JP2007042719A (ja) | 2005-08-01 | 2005-08-01 | 半導体装置 |
TW095127949A TWI312559B (en) | 2005-08-01 | 2006-07-31 | Semiconductor package featuring metal lid member |
US11/495,737 US7253515B2 (en) | 2005-08-01 | 2006-07-31 | Semiconductor package featuring metal lid member |
CNB2006101009795A CN100456456C (zh) | 2005-08-01 | 2006-08-01 | 以金属盖部件为特征的半导体封装 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005222608A JP2007042719A (ja) | 2005-08-01 | 2005-08-01 | 半導体装置 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2011243075A Division JP2012054597A (ja) | 2011-11-07 | 2011-11-07 | 半導体装置 |
Publications (1)
Publication Number | Publication Date |
---|---|
JP2007042719A true JP2007042719A (ja) | 2007-02-15 |
Family
ID=37700261
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2005222608A Withdrawn JP2007042719A (ja) | 2005-08-01 | 2005-08-01 | 半導体装置 |
Country Status (4)
Country | Link |
---|---|
US (1) | US7253515B2 (ja) |
JP (1) | JP2007042719A (ja) |
CN (1) | CN100456456C (ja) |
TW (1) | TWI312559B (ja) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2011074221A1 (ja) * | 2009-12-14 | 2011-06-23 | パナソニック株式会社 | 半導体装置 |
US7986038B2 (en) | 2008-10-30 | 2011-07-26 | Renesas Electronics Corporation | Electronic device and lid |
JP2017112241A (ja) * | 2015-12-17 | 2017-06-22 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
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JP5738532B2 (ja) * | 2007-03-19 | 2015-06-24 | コンティ テミック マイクロエレクトロニック ゲゼルシャフト ミットベシュレンクテル ハフツングConti Temic microelectronic GmbH | 電子部品を持つハウジング |
EP2071620A1 (en) * | 2007-12-12 | 2009-06-17 | Wen-Long Chyn | Heat sink having enhanced heat dissipation capacity |
JP5280079B2 (ja) * | 2008-03-25 | 2013-09-04 | 新光電気工業株式会社 | 配線基板の製造方法 |
CN102324407A (zh) * | 2011-09-22 | 2012-01-18 | 日月光半导体制造股份有限公司 | 半导体封装件及其制造方法 |
US9155188B2 (en) * | 2011-11-04 | 2015-10-06 | Apple Inc. | Electromagnetic interference shielding techniques |
US20130258610A1 (en) * | 2012-03-29 | 2013-10-03 | Jianguo Li | Semiconductor chip device with vented lid |
US20140091461A1 (en) * | 2012-09-30 | 2014-04-03 | Yuci Shen | Die cap for use with flip chip package |
JP6199601B2 (ja) | 2013-05-01 | 2017-09-20 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
CN103441108A (zh) * | 2013-08-28 | 2013-12-11 | 江苏长电科技股份有限公司 | 一种芯片正装bga封装结构 |
CN103441106A (zh) * | 2013-08-28 | 2013-12-11 | 江苏长电科技股份有限公司 | 一种芯片倒装bga封装结构 |
JP6157998B2 (ja) | 2013-09-03 | 2017-07-05 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
JP6221690B2 (ja) * | 2013-11-29 | 2017-11-01 | 日立金属株式会社 | ろう材付き基材およびろう材付き基材の製造方法 |
WO2015109577A1 (zh) * | 2014-01-26 | 2015-07-30 | 上海瑞丰光电子有限公司 | 一种led及其制备方法 |
TWI587550B (zh) * | 2014-02-10 | 2017-06-11 | 旭宏科技有限公司 | 散熱片及使用該散熱片的封裝結構 |
US9355997B2 (en) | 2014-03-12 | 2016-05-31 | Invensas Corporation | Integrated circuit assemblies with reinforcement frames, and methods of manufacture |
US20150262902A1 (en) * | 2014-03-12 | 2015-09-17 | Invensas Corporation | Integrated circuits protected by substrates with cavities, and methods of manufacture |
US9165793B1 (en) | 2014-05-02 | 2015-10-20 | Invensas Corporation | Making electrical components in handle wafers of integrated circuit packages |
US9741649B2 (en) | 2014-06-04 | 2017-08-22 | Invensas Corporation | Integrated interposer solutions for 2D and 3D IC packaging |
US9412806B2 (en) | 2014-06-13 | 2016-08-09 | Invensas Corporation | Making multilayer 3D capacitors using arrays of upstanding rods or ridges |
US9252127B1 (en) | 2014-07-10 | 2016-02-02 | Invensas Corporation | Microelectronic assemblies with integrated circuits and interposers with cavities, and methods of manufacture |
US9799626B2 (en) * | 2014-09-15 | 2017-10-24 | Invensas Corporation | Semiconductor packages and other circuit modules with porous and non-porous stabilizing layers |
US9478504B1 (en) | 2015-06-19 | 2016-10-25 | Invensas Corporation | Microelectronic assemblies with cavities, and methods of fabrication |
US9741620B2 (en) | 2015-06-24 | 2017-08-22 | Invensas Corporation | Structures and methods for reliable packages |
US11631624B2 (en) | 2018-12-11 | 2023-04-18 | Advanced Micro Devices, Inc. | Semiconductor chip package with spring biased lid |
JP2022002237A (ja) * | 2020-06-19 | 2022-01-06 | 日本電気株式会社 | 量子デバイス及びその製造方法 |
US11923331B2 (en) * | 2021-02-25 | 2024-03-05 | Taiwan Semiconductor Manufacturing Co., Ltd. | Die attached leveling control by metal stopper bumps |
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JPH11163186A (ja) * | 1997-12-01 | 1999-06-18 | Toshiba Corp | 半導体装置 |
JP2004055774A (ja) * | 2002-07-19 | 2004-02-19 | Senju Metal Ind Co Ltd | 板状基板封止用リッドおよびその製造方法 |
WO2004109759A2 (en) * | 2003-05-30 | 2004-12-16 | Honeywell International Inc. | Integrated heat spreader lid |
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JP2001210761A (ja) | 2000-01-24 | 2001-08-03 | Shinko Electric Ind Co Ltd | 半導体装置及びその製造方法 |
US6292369B1 (en) * | 2000-08-07 | 2001-09-18 | International Business Machines Corporation | Methods for customizing lid for improved thermal performance of modules using flip chips |
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2005
- 2005-08-01 JP JP2005222608A patent/JP2007042719A/ja not_active Withdrawn
-
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- 2006-07-31 US US11/495,737 patent/US7253515B2/en not_active Expired - Fee Related
- 2006-07-31 TW TW095127949A patent/TWI312559B/zh not_active IP Right Cessation
- 2006-08-01 CN CNB2006101009795A patent/CN100456456C/zh not_active Expired - Fee Related
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JPH11163186A (ja) * | 1997-12-01 | 1999-06-18 | Toshiba Corp | 半導体装置 |
JP2004055774A (ja) * | 2002-07-19 | 2004-02-19 | Senju Metal Ind Co Ltd | 板状基板封止用リッドおよびその製造方法 |
WO2004109759A2 (en) * | 2003-05-30 | 2004-12-16 | Honeywell International Inc. | Integrated heat spreader lid |
JP2006528846A (ja) * | 2003-05-30 | 2006-12-21 | ハネウエル・インターナシヨナル・インコーポレーテツド | 集積型熱拡散器リッド |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7986038B2 (en) | 2008-10-30 | 2011-07-26 | Renesas Electronics Corporation | Electronic device and lid |
WO2011074221A1 (ja) * | 2009-12-14 | 2011-06-23 | パナソニック株式会社 | 半導体装置 |
JPWO2011074221A1 (ja) * | 2009-12-14 | 2013-04-25 | パナソニック株式会社 | 半導体装置 |
US8598701B2 (en) | 2009-12-14 | 2013-12-03 | Panasonic Corporation | Semiconductor device |
JP2017112241A (ja) * | 2015-12-17 | 2017-06-22 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
Also Published As
Publication number | Publication date |
---|---|
CN1909216A (zh) | 2007-02-07 |
TW200735291A (en) | 2007-09-16 |
CN100456456C (zh) | 2009-01-28 |
US7253515B2 (en) | 2007-08-07 |
US20070045798A1 (en) | 2007-03-01 |
TWI312559B (en) | 2009-07-21 |
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